From 24abc92308ac4ca6e3dc7cedb8f276f4922956e4 Mon Sep 17 00:00:00 2001 From: purplerain Date: Sun, 3 Mar 2024 03:47:26 +0000 Subject: [PATCH] sync with OpenBSD -current --- distrib/sets/lists/man/mi | 1 + share/man/man4/Makefile | 4 +- share/man/man4/iic.4 | 6 +- share/man/man4/rkpmic.4 | 7 +- share/man/man4/rkspi.4 | 43 ++++ sys/arch/arm64/conf/GENERIC | 4 +- sys/arch/arm64/conf/RAMDISK | 4 +- sys/dev/fdt/files.fdt | 11 +- sys/dev/fdt/rkclock.c | 27 ++- sys/dev/fdt/rkclock_clocks.h | 5 + sys/dev/fdt/rkpmic.c | 254 +++++++++++++++++++----- sys/dev/fdt/rkspi.c | 369 +++++++++++++++++++++++++++++++++++ usr.bin/signify/signify.1 | 4 +- usr.sbin/smtpd/smtpd.h | 4 +- 14 files changed, 682 insertions(+), 61 deletions(-) create mode 100644 share/man/man4/rkspi.4 create mode 100644 sys/dev/fdt/rkspi.c diff --git a/distrib/sets/lists/man/mi b/distrib/sets/lists/man/mi index 02042a21a..bd0cf84a7 100644 --- a/distrib/sets/lists/man/mi +++ b/distrib/sets/lists/man/mi @@ -1905,6 +1905,7 @@ ./usr/share/man/man4/rkpmic.4 ./usr/share/man/man4/rkpwm.4 ./usr/share/man/man4/rkrng.4 +./usr/share/man/man4/rkspi.4 ./usr/share/man/man4/rktcphy.4 ./usr/share/man/man4/rktemp.4 ./usr/share/man/man4/rkusbphy.4 diff --git a/share/man/man4/Makefile b/share/man/man4/Makefile index 6091a8827..2407c0b42 100644 --- a/share/man/man4/Makefile +++ b/share/man/man4/Makefile @@ -1,4 +1,4 @@ -# $OpenBSD: Makefile,v 1.846 2024/02/15 15:07:55 deraadt Exp $ +# $OpenBSD: Makefile,v 1.847 2024/03/02 20:21:33 kettenis Exp $ MAN= aac.4 abcrtc.4 abl.4 ac97.4 acphy.4 acrtc.4 \ acpi.4 acpiac.4 acpials.4 acpiasus.4 acpibat.4 \ @@ -81,7 +81,7 @@ MAN= aac.4 abcrtc.4 abl.4 ac97.4 acphy.4 acrtc.4 \ rkdrm.4 rkdwhdmi.4 rkdwusb.4 \ rkemmcphy.4 rkgpio.4 rkgrf.4 rkiic.4 rkiis.4 rkiovd.4 \ rkpcie.4 rkpciephy.4 rkpinctrl.4 rkpmic.4 rkpwm.4 \ - rkrng.4 rktcphy.4 rktemp.4 rkusbphy.4 rkvop.4 \ + rkrng.4 rkspi.4 rktcphy.4 rktemp.4 rkusbphy.4 rkvop.4 \ rl.4 rlphy.4 route.4 rsu.4 rtsx.4 rum.4 run.4 rtw.4 rtwn.4 \ safte.4 sbus.4 schsio.4 scmi.4 scsi.4 sd.4 \ sdmmc.4 sdhc.4 se.4 sec.4 ses.4 sf.4 sili.4 \ diff --git a/share/man/man4/iic.4 b/share/man/man4/iic.4 index 5a0247d1d..4683a5ace 100644 --- a/share/man/man4/iic.4 +++ b/share/man/man4/iic.4 @@ -1,4 +1,4 @@ -.\" $OpenBSD: iic.4,v 1.134 2023/07/08 05:35:24 jmc Exp $ +.\" $OpenBSD: iic.4,v 1.135 2024/03/02 22:08:50 jmc Exp $ .\" .\" Copyright (c) 2004, 2006 Alexander Yurchenko .\" @@ -14,7 +14,7 @@ .\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF .\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. .\" -.Dd $Mdocdate: July 8 2023 $ +.Dd $Mdocdate: March 2 2024 $ .Dt IIC 4 .Os .Sh NAME @@ -125,6 +125,8 @@ Intel PIIX SMBus controller Rockchip I2C controller .It Xr qciic 4 Qualcomm Snapdragon GENI I2C controller +.It Xr rkpmic 4 +Rockchip RK8xx Power Management IC .It Xr smu 4 Apple System Management Unit .It Xr sxitwi 4 diff --git a/share/man/man4/rkpmic.4 b/share/man/man4/rkpmic.4 index 00078bd85..ecb17288f 100644 --- a/share/man/man4/rkpmic.4 +++ b/share/man/man4/rkpmic.4 @@ -1,4 +1,4 @@ -.\" $OpenBSD: rkpmic.4,v 1.2 2021/03/08 12:55:48 kurt Exp $ +.\" $OpenBSD: rkpmic.4,v 1.3 2024/03/02 20:22:13 kettenis Exp $ .\" .\" Copyright (c) 2018 Jonathan Gray .\" @@ -14,7 +14,7 @@ .\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF .\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. .\" -.Dd $Mdocdate: March 8 2021 $ +.Dd $Mdocdate: March 2 2024 $ .Dt RKPMIC 4 .Os .Sh NAME @@ -22,11 +22,12 @@ .Nd Rockchip RK8xx Power Management IC .Sh SYNOPSIS .Cd "rkpmic* at iic?" +.Cd "rkpmic* at spi?" .Sh DESCRIPTION The .Nm driver provides support for the voltage regulators and real-time clock in the -Rockchip RK805, RK808 and RK809 Power Management ICs. +Rockchip RK805, RK806, RK808 and RK809 Power Management ICs. .Sh SEE ALSO .Xr iic 4 , .Xr intro 4 diff --git a/share/man/man4/rkspi.4 b/share/man/man4/rkspi.4 new file mode 100644 index 000000000..1b8482ed3 --- /dev/null +++ b/share/man/man4/rkspi.4 @@ -0,0 +1,43 @@ +.\" $OpenBSD: rkspi.4,v 1.1 2024/03/02 20:21:33 kettenis Exp $ +.\" +.\" Copyright (c) 2024 Mark Kettenis +.\" +.\" Permission to use, copy, modify, and distribute this software for any +.\" purpose with or without fee is hereby granted, provided that the above +.\" copyright notice and this permission notice appear in all copies. +.\" +.\" THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES +.\" WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF +.\" MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR +.\" ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +.\" WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN +.\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF +.\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. +.\" +.Dd $Mdocdate: March 2 2024 $ +.Dt RKSPI 4 +.Os +.Sh NAME +.Nm rkspi +.Nd Rockchip SPI controller +.Sh SYNOPSIS +.Cd "rkspi* at fdt?" +.Sh DESCRIPTION +The +.Nm +driver provides support for the SPI controller integrated on various +Rockchip SoCs. +.Sh SEE ALSO +.Xr intro 4 +.Sh HISTORY +The +.Nm +driver first appeared in +.Ox 7.5 . +.Sh AUTHORS +The +.Nm +driver was written by +.An Patrick Wildt Aq Mt patrick@blueri.se +and +.An Mark Kettenis Aq Mt kettenis@openbsd.org . diff --git a/sys/arch/arm64/conf/GENERIC b/sys/arch/arm64/conf/GENERIC index e05665139..4b7b56e9d 100644 --- a/sys/arch/arm64/conf/GENERIC +++ b/sys/arch/arm64/conf/GENERIC @@ -1,4 +1,4 @@ -# $OpenBSD: GENERIC,v 1.283 2024/02/15 16:33:54 deraadt Exp $ +# $OpenBSD: GENERIC,v 1.284 2024/03/02 19:53:17 kettenis Exp $ # # GENERIC machine description file # @@ -319,6 +319,8 @@ rkpcie* at fdt? pci* at rkpcie? rkpwm* at fdt? rkrng* at fdt? +rkspi* at fdt? +rkpmic* at spi? rktemp* at fdt? rkvop* at fdt? rkdwusb* at fdt? diff --git a/sys/arch/arm64/conf/RAMDISK b/sys/arch/arm64/conf/RAMDISK index 4264eda3d..8ad74f255 100644 --- a/sys/arch/arm64/conf/RAMDISK +++ b/sys/arch/arm64/conf/RAMDISK @@ -1,4 +1,4 @@ -# $OpenBSD: RAMDISK,v 1.213 2024/02/15 16:33:54 deraadt Exp $ +# $OpenBSD: RAMDISK,v 1.214 2024/03/02 19:53:17 kettenis Exp $ machine arm64 maxusers 4 @@ -242,6 +242,8 @@ rkpcie* at fdt? pci* at rkpcie? rkpwm* at fdt? rkrng* at fdt? +rkspi* at fdt? +rkpmic* at spi? rkdwusb* at fdt? dwmmc* at fdt? sdmmc* at dwmmc? diff --git a/sys/dev/fdt/files.fdt b/sys/dev/fdt/files.fdt index 9cc1a3637..722818fae 100644 --- a/sys/dev/fdt/files.fdt +++ b/sys/dev/fdt/files.fdt @@ -1,8 +1,9 @@ -# $OpenBSD: files.fdt,v 1.199 2024/01/16 23:37:50 jsg Exp $ +# $OpenBSD: files.fdt,v 1.201 2024/03/02 19:52:41 kettenis Exp $ # # Config file and device description for machine-independent FDT code. # Included by ports that need it. +define spi {} define spmi {} device iicmux: i2cbus @@ -398,7 +399,8 @@ attach rkpinctrl at fdt file dev/fdt/rkpinctrl.c rkpinctrl device rkpmic -attach rkpmic at i2c +attach rkpmic at spi with rkpmic_spi +attach rkpmic at i2c with rkpmic_i2c file dev/fdt/rkpmic.c rkpmic device rkpwm @@ -409,6 +411,10 @@ device rkrng attach rkrng at fdt file dev/fdt/rkrng.c rkrng +device rkspi: spi +attach rkspi at fdt +file dev/fdt/rkspi.c rkspi + device rktcphy: fdt attach rktcphy at fdt file dev/fdt/rktcphy.c rktcphy @@ -440,7 +446,6 @@ device dwpcie: pcibus attach dwpcie at fdt file dev/fdt/dwpcie.c dwpcie -define spi {} device moxtet attach moxtet at spi file dev/fdt/moxtet.c moxtet diff --git a/sys/dev/fdt/rkclock.c b/sys/dev/fdt/rkclock.c index 3c141cfff..084945324 100644 --- a/sys/dev/fdt/rkclock.c +++ b/sys/dev/fdt/rkclock.c @@ -1,4 +1,4 @@ -/* $OpenBSD: rkclock.c,v 1.85 2024/02/26 18:54:25 kettenis Exp $ */ +/* $OpenBSD: rkclock.c,v 1.86 2024/03/02 19:48:13 kettenis Exp $ */ /* * Copyright (c) 2017, 2018 Mark Kettenis * @@ -3897,6 +3897,31 @@ const struct rkclock rk3588_clocks[] = { SEL(13, 13), 0, { RK3588_CLK_200M_SRC , RK3588_CLK_100M_SRC }, }, + { + RK3588_CLK_SPI0, RK3588_CRU_CLKSEL_CON(59), + SEL(3, 2), 0, + { RK3588_CLK_200M_SRC, RK3588_CLK_150M_SRC, RK3588_XIN24M }, + }, + { + RK3588_CLK_SPI1, RK3588_CRU_CLKSEL_CON(59), + SEL(5, 4), 0, + { RK3588_CLK_200M_SRC, RK3588_CLK_150M_SRC, RK3588_XIN24M }, + }, + { + RK3588_CLK_SPI2, RK3588_CRU_CLKSEL_CON(59), + SEL(7, 6), 0, + { RK3588_CLK_200M_SRC, RK3588_CLK_150M_SRC, RK3588_XIN24M }, + }, + { + RK3588_CLK_SPI3, RK3588_CRU_CLKSEL_CON(59), + SEL(9, 8), 0, + { RK3588_CLK_200M_SRC, RK3588_CLK_150M_SRC, RK3588_XIN24M }, + }, + { + RK3588_CLK_SPI4, RK3588_CRU_CLKSEL_CON(59), + SEL(11, 10), 0, + { RK3588_CLK_200M_SRC, RK3588_CLK_150M_SRC, RK3588_XIN24M }, + }, { RK3588_CLK_UART1_SRC, RK3588_CRU_CLKSEL_CON(41), SEL(14, 14), DIV(13, 9), diff --git a/sys/dev/fdt/rkclock_clocks.h b/sys/dev/fdt/rkclock_clocks.h index 0c9bf1b23..423fbbebb 100644 --- a/sys/dev/fdt/rkclock_clocks.h +++ b/sys/dev/fdt/rkclock_clocks.h @@ -406,6 +406,11 @@ #define RK3588_CLK_I2C6 136 #define RK3588_CLK_I2C7 137 #define RK3588_CLK_I2C8 138 +#define RK3588_CLK_SPI0 151 +#define RK3588_CLK_SPI1 152 +#define RK3588_CLK_SPI2 153 +#define RK3588_CLK_SPI3 154 +#define RK3588_CLK_SPI4 155 #define RK3588_CLK_UART1_SRC 168 #define RK3588_CLK_UART1_FRAC 169 #define RK3588_CLK_UART1 170 diff --git a/sys/dev/fdt/rkpmic.c b/sys/dev/fdt/rkpmic.c index 4b467270b..2c13ba60d 100644 --- a/sys/dev/fdt/rkpmic.c +++ b/sys/dev/fdt/rkpmic.c @@ -1,4 +1,4 @@ -/* $OpenBSD: rkpmic.c,v 1.13 2023/04/10 04:21:20 jsg Exp $ */ +/* $OpenBSD: rkpmic.c,v 1.14 2024/03/02 19:52:41 kettenis Exp $ */ /* * Copyright (c) 2017 Mark Kettenis * @@ -25,6 +25,7 @@ #include #include +#include #include @@ -47,6 +48,9 @@ #define RK809_RTC_STATUS 0x0e #define RK80X_RTC_STATUS_POWER_UP 0x80 +#define RKSPI_CMD_READ (0 << 7) +#define RKSPI_CMD_WRITE (1 << 7) + struct rkpmic_vsel_range { uint32_t base, delta; uint8_t vsel_min, vsel_max; @@ -99,6 +103,55 @@ const struct rkpmic_regdata rk805_regdata[] = { { } }; +/* + * Used by RK806 for BUCK + * 0-159: 0.5V-1.5V, step=6.25mV + * 160-236: 1.5V-3.4V, step=25mV + * 237-255: 3.4V-3.4V, step=0mV + */ +const struct rkpmic_vsel_range rk806_vsel_range1[] = { + { 500000, 6250, 0, 159 }, + { 1500000, 25000, 160, 236 }, + { 3400000, 0, 237, 255 }, + {} +}; + +/* + * Used by RK806 for LDO + * 0-232: 0.5V-3.4V, step=12.5mV + * 233-255: 3.4V-3.4V, step=0mV + */ +const struct rkpmic_vsel_range rk806_vsel_range2[] = { + { 500000, 12500, 0, 232 }, + { 3400000, 0, 233, 255 }, + {} +}; + +const struct rkpmic_regdata rk806_regdata[] = { + { "dcdc-reg1", 0x1a, 0xff, rk806_vsel_range1 }, + { "dcdc-reg2", 0x1b, 0xff, rk806_vsel_range1 }, + { "dcdc-reg3", 0x1c, 0xff, rk806_vsel_range1 }, + { "dcdc-reg4", 0x1d, 0xff, rk806_vsel_range1 }, + { "dcdc-reg5", 0x1e, 0xff, rk806_vsel_range1 }, + { "dcdc-reg6", 0x1f, 0xff, rk806_vsel_range1 }, + { "dcdc-reg7", 0x20, 0xff, rk806_vsel_range1 }, + { "dcdc-reg8", 0x21, 0xff, rk806_vsel_range1 }, + { "dcdc-reg9", 0x22, 0xff, rk806_vsel_range1 }, + { "dcdc-reg10", 0x23, 0xff, rk806_vsel_range1 }, + { "nldo-reg1", 0x43, 0xff, rk806_vsel_range2 }, + { "nldo-reg2", 0x44, 0xff, rk806_vsel_range2 }, + { "nldo-reg3", 0x45, 0xff, rk806_vsel_range2 }, + { "nldo-reg4", 0x46, 0xff, rk806_vsel_range2 }, + { "nldo-reg5", 0x47, 0xff, rk806_vsel_range2 }, + { "pldo-reg1", 0x4e, 0xff, rk806_vsel_range2 }, + { "pldo-reg2", 0x4f, 0xff, rk806_vsel_range2 }, + { "pldo-reg3", 0x50, 0xff, rk806_vsel_range2 }, + { "pldo-reg4", 0x51, 0xff, rk806_vsel_range2 }, + { "pldo-reg5", 0x52, 0xff, rk806_vsel_range2 }, + { "pldo-reg6", 0x53, 0xff, rk806_vsel_range2 }, + { } +}; + /* * Used by RK808 for BUCK1 & BUCK2 * 0-63: 0.7125V-1.5V, step=12.5mV @@ -256,19 +309,39 @@ const struct rkpmic_regdata rk817_regdata[] = { struct rkpmic_softc { struct device sc_dev; - i2c_tag_t sc_tag; - i2c_addr_t sc_addr; + int sc_node; + + i2c_tag_t sc_i2c_tag; + i2c_addr_t sc_i2c_addr; + spi_tag_t sc_spi_tag; + struct spi_config sc_spi_conf; int sc_rtc_ctrl_reg, sc_rtc_status_reg; struct todr_chip_handle sc_todr; const struct rkpmic_regdata *sc_regdata; + + int (*sc_read)(struct rkpmic_softc *, uint8_t, void *, size_t); + int (*sc_write)(struct rkpmic_softc *, uint8_t, void *, size_t); }; -int rkpmic_match(struct device *, void *, void *); +int rkpmic_i2c_match(struct device *, void *, void *); +void rkpmic_i2c_attach(struct device *, struct device *, void *); +int rkpmic_i2c_read(struct rkpmic_softc *, uint8_t, void *, size_t); +int rkpmic_i2c_write(struct rkpmic_softc *, uint8_t, void *, size_t); + +int rkpmic_spi_match(struct device *, void *, void *); +void rkpmic_spi_attach(struct device *, struct device *, void *); +int rkpmic_spi_read(struct rkpmic_softc *, uint8_t, void *, size_t); +int rkpmic_spi_write(struct rkpmic_softc *, uint8_t, void *, size_t); + void rkpmic_attach(struct device *, struct device *, void *); -const struct cfattach rkpmic_ca = { - sizeof(struct rkpmic_softc), rkpmic_match, rkpmic_attach +const struct cfattach rkpmic_i2c_ca = { + sizeof(struct rkpmic_softc), rkpmic_i2c_match, rkpmic_i2c_attach +}; + +const struct cfattach rkpmic_spi_ca = { + sizeof(struct rkpmic_softc), rkpmic_spi_match, rkpmic_spi_attach }; struct cfdriver rkpmic_cd = { @@ -284,7 +357,7 @@ int rkpmic_gettime(struct todr_chip_handle *, struct timeval *); int rkpmic_settime(struct todr_chip_handle *, struct timeval *); int -rkpmic_match(struct device *parent, void *match, void *aux) +rkpmic_i2c_match(struct device *parent, void *match, void *aux) { struct i2c_attach_args *ia = aux; @@ -295,33 +368,68 @@ rkpmic_match(struct device *parent, void *match, void *aux) } void -rkpmic_attach(struct device *parent, struct device *self, void *aux) +rkpmic_i2c_attach(struct device *parent, struct device *self, void *aux) { struct rkpmic_softc *sc = (struct rkpmic_softc *)self; struct i2c_attach_args *ia = aux; - int node = *(int *)ia->ia_cookie; + + sc->sc_i2c_tag = ia->ia_tag; + sc->sc_i2c_addr = ia->ia_addr; + sc->sc_node = *(int *)ia->ia_cookie; + sc->sc_read = rkpmic_i2c_read; + sc->sc_write = rkpmic_i2c_write; + + rkpmic_attach(parent, self, aux); +} + +int +rkpmic_spi_match(struct device *parent, void *match, void *aux) +{ + struct spi_attach_args *sa = aux; + + return (strcmp(sa->sa_name, "rockchip,rk806") == 0); +} + +void +rkpmic_spi_attach(struct device *parent, struct device *self, void *aux) +{ + struct rkpmic_softc *sc = (struct rkpmic_softc *)self; + struct spi_attach_args *sa = aux; + + sc->sc_spi_tag = sa->sa_tag; + sc->sc_node = *(int *)sa->sa_cookie; + sc->sc_read = rkpmic_spi_read; + sc->sc_write = rkpmic_spi_write; + + sc->sc_spi_conf.sc_bpw = 8; + sc->sc_spi_conf.sc_freq = + OF_getpropint(sc->sc_node, "spi-max-frequency", 1000000); + sc->sc_spi_conf.sc_cs = OF_getpropint(sc->sc_node, "reg", 0); + + rkpmic_attach(parent, self, aux); +} + +void +rkpmic_attach(struct device *parent, struct device *self, void *aux) +{ + struct rkpmic_softc *sc = (struct rkpmic_softc *)self; const char *chip; + int node; - sc->sc_tag = ia->ia_tag; - sc->sc_addr = ia->ia_addr; - - sc->sc_todr.cookie = sc; - sc->sc_todr.todr_gettime = rkpmic_gettime; - sc->sc_todr.todr_settime = rkpmic_settime; - sc->sc_todr.todr_quality = 0; - todr_attach(&sc->sc_todr); - - if (OF_is_compatible(node, "rockchip,rk805")) { + if (OF_is_compatible(sc->sc_node, "rockchip,rk805")) { chip = "RK805"; sc->sc_rtc_ctrl_reg = RK805_RTC_CTRL; sc->sc_rtc_status_reg = RK805_RTC_STATUS; sc->sc_regdata = rk805_regdata; - } else if (OF_is_compatible(node, "rockchip,rk808")) { + } else if (OF_is_compatible(sc->sc_node, "rockchip,rk806")) { + chip = "RK806"; + sc->sc_regdata = rk806_regdata; + } else if (OF_is_compatible(sc->sc_node, "rockchip,rk808")) { chip = "RK808"; sc->sc_rtc_ctrl_reg = RK808_RTC_CTRL; sc->sc_rtc_status_reg = RK808_RTC_STATUS; sc->sc_regdata = rk808_regdata; - } else if (OF_is_compatible(node, "rockchip,rk809")) { + } else if (OF_is_compatible(sc->sc_node, "rockchip,rk809")) { chip = "RK809"; sc->sc_rtc_ctrl_reg = RK809_RTC_CTRL; sc->sc_rtc_status_reg = RK809_RTC_STATUS; @@ -334,7 +442,15 @@ rkpmic_attach(struct device *parent, struct device *self, void *aux) } printf(": %s\n", chip); - node = OF_getnodebyname(node, "regulators"); + if (sc->sc_rtc_ctrl_reg) { + sc->sc_todr.cookie = sc; + sc->sc_todr.todr_gettime = rkpmic_gettime; + sc->sc_todr.todr_settime = rkpmic_settime; + sc->sc_todr.todr_quality = 0; + todr_attach(&sc->sc_todr); + } + + node = OF_getnodebyname(sc->sc_node, "regulators"); if (node == 0) return; for (node = OF_child(node); node; node = OF_peer(node)) @@ -519,14 +635,8 @@ rkpmic_reg_read(struct rkpmic_softc *sc, int reg) { uint8_t cmd = reg; uint8_t val; - int error; - iic_acquire_bus(sc->sc_tag, I2C_F_POLL); - error = iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_addr, - &cmd, sizeof cmd, &val, sizeof val, I2C_F_POLL); - iic_release_bus(sc->sc_tag, I2C_F_POLL); - - if (error) { + if (sc->sc_read(sc, cmd, &val, sizeof(val))) { printf("%s: can't read register 0x%02x\n", sc->sc_dev.dv_xname, reg); val = 0xff; @@ -539,14 +649,8 @@ void rkpmic_reg_write(struct rkpmic_softc *sc, int reg, uint8_t val) { uint8_t cmd = reg; - int error; - iic_acquire_bus(sc->sc_tag, I2C_F_POLL); - error = iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP, sc->sc_addr, - &cmd, sizeof cmd, &val, sizeof val, I2C_F_POLL); - iic_release_bus(sc->sc_tag, I2C_F_POLL); - - if (error) { + if (sc->sc_write(sc, cmd, &val, sizeof(val))) { printf("%s: can't write register 0x%02x\n", sc->sc_dev.dv_xname, reg); } @@ -560,10 +664,7 @@ rkpmic_clock_read(struct rkpmic_softc *sc, struct clock_ymdhms *dt) uint8_t status; int error; - iic_acquire_bus(sc->sc_tag, I2C_F_POLL); - error = iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_addr, - &cmd, sizeof(cmd), regs, RK80X_NRTC_REGS, I2C_F_POLL); - iic_release_bus(sc->sc_tag, I2C_F_POLL); + error = sc->sc_read(sc, cmd, regs, RK80X_NRTC_REGS); if (error) { printf("%s: can't read RTC\n", sc->sc_dev.dv_xname); @@ -610,10 +711,7 @@ rkpmic_clock_write(struct rkpmic_softc *sc, struct clock_ymdhms *dt) /* Stop RTC such that we can write to it. */ rkpmic_reg_write(sc, sc->sc_rtc_ctrl_reg, RK80X_RTC_CTRL_STOP_RTC); - iic_acquire_bus(sc->sc_tag, I2C_F_POLL); - error = iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP, sc->sc_addr, - &cmd, sizeof(cmd), regs, RK80X_NRTC_REGS, I2C_F_POLL); - iic_release_bus(sc->sc_tag, I2C_F_POLL); + error = sc->sc_write(sc, cmd, regs, RK80X_NRTC_REGS); /* Restart RTC. */ rkpmic_reg_write(sc, sc->sc_rtc_ctrl_reg, 0); @@ -628,3 +726,71 @@ rkpmic_clock_write(struct rkpmic_softc *sc, struct clock_ymdhms *dt) return 0; } + +int +rkpmic_i2c_read(struct rkpmic_softc *sc, uint8_t cmd, void *buf, size_t buflen) +{ + int error; + + iic_acquire_bus(sc->sc_i2c_tag, I2C_F_POLL); + error = iic_exec(sc->sc_i2c_tag, I2C_OP_READ_WITH_STOP, + sc->sc_i2c_addr, &cmd, sizeof(cmd), buf, buflen, I2C_F_POLL); + iic_release_bus(sc->sc_i2c_tag, I2C_F_POLL); + + return error; +} + +int +rkpmic_i2c_write(struct rkpmic_softc *sc, uint8_t cmd, void *buf, size_t buflen) +{ + int error; + + iic_acquire_bus(sc->sc_i2c_tag, I2C_F_POLL); + error = iic_exec(sc->sc_i2c_tag, I2C_OP_WRITE_WITH_STOP, + sc->sc_i2c_addr, &cmd, sizeof(cmd), buf, buflen, I2C_F_POLL); + iic_release_bus(sc->sc_i2c_tag, I2C_F_POLL); + + return error; +} + +int +rkpmic_spi_read(struct rkpmic_softc *sc, uint8_t cmd, void *buf, size_t buflen) +{ + uint8_t cmdbuf[3]; + int error; + + cmdbuf[0] = RKSPI_CMD_READ | (buflen - 1); + cmdbuf[1] = cmd; /* 16-bit addr low */ + cmdbuf[2] = 0x00; /* 16-bit addr high */ + + spi_acquire_bus(sc->sc_spi_tag, 0); + spi_config(sc->sc_spi_tag, &sc->sc_spi_conf); + error = spi_transfer(sc->sc_spi_tag, cmdbuf, NULL, sizeof(cmdbuf), + SPI_KEEP_CS); + if (!error) + error = spi_read(sc->sc_spi_tag, buf, buflen); + spi_release_bus(sc->sc_spi_tag, 0); + + return error; +} + +int +rkpmic_spi_write(struct rkpmic_softc *sc, uint8_t cmd, void *buf, size_t buflen) +{ + uint8_t cmdbuf[3]; + int error; + + cmdbuf[0] = RKSPI_CMD_WRITE | (buflen - 1); + cmdbuf[1] = cmd; /* 16-bit addr low */ + cmdbuf[2] = 0x00; /* 16-bit addr high */ + + spi_acquire_bus(sc->sc_spi_tag, 0); + spi_config(sc->sc_spi_tag, &sc->sc_spi_conf); + error = spi_transfer(sc->sc_spi_tag, cmdbuf, NULL, sizeof(cmdbuf), + SPI_KEEP_CS); + if (!error) + error = spi_write(sc->sc_spi_tag, buf, buflen); + spi_release_bus(sc->sc_spi_tag, 0); + + return error; +} diff --git a/sys/dev/fdt/rkspi.c b/sys/dev/fdt/rkspi.c new file mode 100644 index 000000000..0f0fc4d30 --- /dev/null +++ b/sys/dev/fdt/rkspi.c @@ -0,0 +1,369 @@ +/* $OpenBSD: rkspi.c,v 1.1 2024/03/02 19:50:30 kettenis Exp $ */ +/* + * Copyright (c) 2018,2023 Patrick Wildt + * Copyright (c) 2024 Mark Kettenis + * + * Permission to use, copy, modify, and distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#include +#include +#include + +#include +#include + +#include +#include +#include +#include +#include + +/* registers */ +#define SPI_CTRLR0 0x0000 +#define SPI_CTRLR0_DFS_4BIT (0x0 << 0) +#define SPI_CTRLR0_DFS_8BIT (0x1 << 0) +#define SPI_CTRLR0_DFS_16BIT (0x2 << 0) +#define SPI_CTRLR0_SCPH (0x1 << 6) +#define SPI_CTRLR0_SCPOL (0x1 << 7) +#define SPI_CTRLR0_CSM_KEEP (0x0 << 8) +#define SPI_CTRLR0_CSM_HALF (0x1 << 8) +#define SPI_CTRLR0_CSM_ONE (0x2 << 8) +#define SPI_CTRLR0_SSD_HALF (0x0 << 10) +#define SPI_CTRLR0_SSD_ONE (0x1 << 10) +#define SPI_CTRLR0_EM_LITTLE (0x0 << 11) +#define SPI_CTRLR0_EM_BIG (0x1 << 11) +#define SPI_CTRLR0_FBM_MSB (0x0 << 12) +#define SPI_CTRLR0_FBM_LSB (0x1 << 12) +#define SPI_CTRLR0_BHT_16BIT (0x0 << 13) +#define SPI_CTRLR0_BHT_8BIT (0x1 << 13) +#define SPI_CTRLR0_RSD(x) ((x) << 14) +#define SPI_CTRLR0_FRF_SPI (0x0 << 16) +#define SPI_CTRLR0_FRF_SSP (0x1 << 16) +#define SPI_CTRLR0_FRF_MICROWIRE (0x2 << 16) +#define SPI_CTRLR0_XFM_TR (0x0 << 18) +#define SPI_CTRLR0_XFM_TO (0x1 << 18) +#define SPI_CTRLR0_XFM_RO (0x2 << 18) +#define SPI_CTRLR0_SOI(x) ((1 << (x)) << 23) +#define SPI_CTRLR1 0x0004 +#define SPI_ENR 0x0008 +#define SPI_SER 0x000c +#define SPI_SER_CS(x) ((1 << (x)) << 0) +#define SPI_BAUDR 0x0010 +#define SPI_TXFTLR 0x0014 +#define SPI_RXFTLR 0x0018 +#define SPI_TXFLR 0x001c +#define SPI_RXFLR 0x0020 +#define SPI_SR 0x0024 +#define SPI_SR_BSF (1 << 0) +#define SPI_SR_TFF (1 << 1) +#define SPI_SR_TFE (1 << 2) +#define SPI_SR_RFE (1 << 3) +#define SPI_SR_RFF (1 << 4) +#define SPI_IPR 0x0028 +#define SPI_IMR 0x002c +#define SPI_ISR 0x0030 +#define SPI_RISR 0x0034 +#define SPI_ICR 0x0038 +#define SPI_ICR_MASK (0x7f << 0) +#define SPI_DMACR 0x003c +#define SPI_DMATDLR 0x0040 +#define SPI_DMARDLR 0x0044 +#define SPI_VERSION 0x0048 +#define SPI_TXDR 0x0400 +#define SPI_RXDR 0x0800 + +#define DEVNAME(sc) ((sc)->sc_dev.dv_xname) + +struct rkspi_softc { + struct device sc_dev; + bus_space_tag_t sc_iot; + bus_space_handle_t sc_ioh; + bus_size_t sc_ios; + int sc_node; + + struct rwlock sc_buslock; + struct spi_controller sc_tag; + + int sc_ridx; + int sc_widx; + int sc_cs; + u_int sc_cs_delay; + u_int sc_spi_freq; +}; + +int rkspi_match(struct device *, void *, void *); +void rkspi_attach(struct device *, struct device *, void *); +int rkspi_detach(struct device *, int); +int rkspi_intr(void *); + +void rkspi_config(void *, struct spi_config *); +int rkspi_transfer(void *, char *, char *, int, int); +int rkspi_acquire_bus(void *, int); +void rkspi_release_bus(void *, int); + +int rkspi_wait_state(struct rkspi_softc *, uint32_t, uint32_t); + +void rkspi_scan(struct rkspi_softc *); + +#define HREAD4(sc, reg) \ + (bus_space_read_4((sc)->sc_iot, (sc)->sc_ioh, (reg))) +#define HWRITE4(sc, reg, val) \ + bus_space_write_4((sc)->sc_iot, (sc)->sc_ioh, (reg), (val)) +#define HSET4(sc, reg, bits) \ + HWRITE4((sc), (reg), HREAD4((sc), (reg)) | (bits)) +#define HCLR4(sc, reg, bits) \ + HWRITE4((sc), (reg), HREAD4((sc), (reg)) & ~(bits)) + +const struct cfattach rkspi_ca = { + sizeof(struct rkspi_softc), rkspi_match, rkspi_attach, + rkspi_detach +}; + +struct cfdriver rkspi_cd = { + NULL, "rkspi", DV_DULL +}; + +int +rkspi_match(struct device *parent, void *match, void *aux) +{ + struct fdt_attach_args *faa = aux; + + return OF_is_compatible(faa->fa_node, "rockchip,rk3066-spi"); +} + +void +rkspi_attach(struct device *parent, struct device *self, void *aux) +{ + struct rkspi_softc *sc = (struct rkspi_softc *)self; + struct fdt_attach_args *faa = aux; + + if (faa->fa_nreg < 1) + return; + + sc->sc_iot = faa->fa_iot; + sc->sc_ios = faa->fa_reg[0].size; + sc->sc_node = faa->fa_node; + if (bus_space_map(sc->sc_iot, faa->fa_reg[0].addr, + faa->fa_reg[0].size, 0, &sc->sc_ioh)) { + printf(": can't map registers\n"); + return; + } + + pinctrl_byname(sc->sc_node, "default"); + clock_set_assigned(sc->sc_node); + clock_enable(sc->sc_node, "apb_pclk"); + clock_enable(sc->sc_node, "spiclk"); + + sc->sc_spi_freq = clock_get_frequency(sc->sc_node, "spiclk"); + + printf("\n"); + + HWRITE4(sc, SPI_ENR, 0); + HWRITE4(sc, SPI_DMACR, 0); + HWRITE4(sc, SPI_DMATDLR, 0); + HWRITE4(sc, SPI_DMARDLR, 0); + HWRITE4(sc, SPI_IPR, 0); + HWRITE4(sc, SPI_IMR, 0); + HWRITE4(sc, SPI_ICR, SPI_ICR_MASK); + + rw_init(&sc->sc_buslock, sc->sc_dev.dv_xname); + + sc->sc_tag.sc_cookie = sc; + sc->sc_tag.sc_config = rkspi_config; + sc->sc_tag.sc_transfer = rkspi_transfer; + sc->sc_tag.sc_acquire_bus = rkspi_acquire_bus; + sc->sc_tag.sc_release_bus = rkspi_release_bus; + + rkspi_scan(sc); +} + +int +rkspi_detach(struct device *self, int flags) +{ + struct rkspi_softc *sc = (struct rkspi_softc *)self; + + HWRITE4(sc, SPI_ENR, 0); + HWRITE4(sc, SPI_IMR, 0); + bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_ios); + return 0; +} + +void +rkspi_config(void *cookie, struct spi_config *conf) +{ + struct rkspi_softc *sc = cookie; + uint32_t ctrlr0; + uint16_t div; + int cs; + + div = 2; + while ((sc->sc_spi_freq / div) > conf->sc_freq) + div++; + /* Clock divider needs to be even. */ + if (div & 1) + div++; + + cs = conf->sc_cs; + if (cs >= 2) { + printf("%s: invalid chip-select (%d)\n", DEVNAME(sc), cs); + return; + } + sc->sc_cs = cs; + sc->sc_cs_delay = conf->sc_cs_delay; + + ctrlr0 = SPI_CTRLR0_BHT_8BIT | SPI_CTRLR0_SSD_ONE | SPI_CTRLR0_EM_BIG; + if (conf->sc_flags & SPI_CONFIG_CPHA) + ctrlr0 |= SPI_CTRLR0_SCPH; + if (conf->sc_flags & SPI_CONFIG_CPOL) + ctrlr0 |= SPI_CTRLR0_SCPOL; + switch (conf->sc_bpw) { + case 4: + ctrlr0 |= SPI_CTRLR0_DFS_4BIT; + break; + case 8: + ctrlr0 |= SPI_CTRLR0_DFS_8BIT; + break; + case 16: + ctrlr0 |= SPI_CTRLR0_DFS_16BIT; + break; + default: + printf("%s: invalid bits-per-word (%d)\n", DEVNAME(sc), + conf->sc_bpw); + return; + } + + HWRITE4(sc, SPI_ENR, 0); + HWRITE4(sc, SPI_SER, 0); + HWRITE4(sc, SPI_CTRLR0, ctrlr0); + HWRITE4(sc, SPI_BAUDR, div); +} + +int +rkspi_wait_state(struct rkspi_softc *sc, uint32_t mask, uint32_t value) +{ + int timeout; + + for (timeout = 1000; timeout > 0; timeout--) { + if ((HREAD4(sc, SPI_SR) & mask) == value) + return 0; + delay(10); + } + + return ETIMEDOUT; +} + +int +rkspi_transfer(void *cookie, char *out, char *in, int len, int flags) +{ + struct rkspi_softc *sc = cookie; + int i; + + sc->sc_ridx = sc->sc_widx = 0; + + /* drain input buffer */ + while (!(HREAD4(sc, SPI_SR) & SPI_SR_RFE)) + HREAD4(sc, SPI_RXDR); + + if (out) + HCLR4(sc, SPI_CTRLR0, SPI_CTRLR0_XFM_RO); + else + HSET4(sc, SPI_CTRLR0, SPI_CTRLR0_XFM_RO); + HWRITE4(sc, SPI_CTRLR1, len - 1); + + HSET4(sc, SPI_SER, SPI_SER_CS(sc->sc_cs)); + delay(sc->sc_cs_delay); + + HWRITE4(sc, SPI_ENR, 1); + + while (sc->sc_ridx < len || sc->sc_widx < len) { + for (i = sc->sc_widx; i < len; i++) { + if (rkspi_wait_state(sc, SPI_SR_TFF, 0)) + goto err; + if (out) + HWRITE4(sc, SPI_TXDR, out[i]); + sc->sc_widx++; + } + + for (i = sc->sc_ridx; i < sc->sc_widx; i++) { + if (rkspi_wait_state(sc, SPI_SR_RFE, 0)) + goto err; + if (in) + in[i] = HREAD4(sc, SPI_RXDR); + else + HREAD4(sc, SPI_RXDR); + sc->sc_ridx++; + } + + if (rkspi_wait_state(sc, SPI_SR_BSF, 0)) + goto err; + } + + HWRITE4(sc, SPI_ENR, 0); + + if (!ISSET(flags, SPI_KEEP_CS)) + HCLR4(sc, SPI_SER, SPI_SER_CS(sc->sc_cs)); + return 0; + +err: + HWRITE4(sc, SPI_ENR, 0); + + HCLR4(sc, SPI_SER, SPI_SER_CS(sc->sc_cs)); + return ETIMEDOUT; +} + +int +rkspi_acquire_bus(void *cookie, int flags) +{ + struct rkspi_softc *sc = cookie; + + rw_enter(&sc->sc_buslock, RW_WRITE); + return 0; +} + +void +rkspi_release_bus(void *cookie, int flags) +{ + struct rkspi_softc *sc = cookie; + + rw_exit(&sc->sc_buslock); +} + +void +rkspi_scan(struct rkspi_softc *sc) +{ + struct spi_attach_args sa; + uint32_t reg[1]; + char name[32]; + int node; + + for (node = OF_child(sc->sc_node); node; node = OF_peer(node)) { + memset(name, 0, sizeof(name)); + memset(reg, 0, sizeof(reg)); + + if (OF_getprop(node, "compatible", name, sizeof(name)) == -1) + continue; + if (name[0] == '\0') + continue; + + if (OF_getprop(node, "reg", ®, sizeof(reg)) != sizeof(reg)) + continue; + + memset(&sa, 0, sizeof(sa)); + sa.sa_tag = &sc->sc_tag; + sa.sa_name = name; + sa.sa_cookie = &node; + + config_found(&sc->sc_dev, &sa, NULL); + } +} diff --git a/usr.bin/signify/signify.1 b/usr.bin/signify/signify.1 index ac34beb57..a1056a22c 100644 --- a/usr.bin/signify/signify.1 +++ b/usr.bin/signify/signify.1 @@ -1,4 +1,4 @@ -.\" $OpenBSD: signify.1,v 1.58 2024/02/17 16:13:24 deraadt Exp $ +.\" $OpenBSD: signify.1,v 1.59 2024/03/02 23:38:00 benno Exp $ .\" .\"Copyright (c) 2013 Marc Espie .\"Copyright (c) 2013 Ted Unangst @@ -14,7 +14,7 @@ .\"WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN .\"ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF .\"OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -.Dd $Mdocdate: February 17 2024 $ +.Dd $Mdocdate: March 2 2024 $ .Dt SIGNIFY 1 .Os .Sh NAME diff --git a/usr.sbin/smtpd/smtpd.h b/usr.sbin/smtpd/smtpd.h index b4df56c77..db7a8bacd 100644 --- a/usr.sbin/smtpd/smtpd.h +++ b/usr.sbin/smtpd/smtpd.h @@ -1,4 +1,4 @@ -/* $OpenBSD: smtpd.h,v 1.682 2024/02/11 09:24:26 op Exp $ */ +/* $OpenBSD: smtpd.h,v 1.683 2024/03/02 22:40:28 op Exp $ */ /* * Copyright (c) 2008 Gilles Chehade @@ -55,7 +55,7 @@ #define SMTPD_QUEUE_EXPIRY (4 * 24 * 60 * 60) #define SMTPD_SOCKET "/var/run/smtpd.sock" #define SMTPD_NAME "OpenSMTPD" -#define SMTPD_VERSION "7.4.0" +#define SMTPD_VERSION "7.5.0" #define SMTPD_SESSION_TIMEOUT 300 #define SMTPD_BACKLOG 5