sync with OpenBSD -current
This commit is contained in:
parent
9adc065819
commit
710bf2c3ae
@ -1,4 +1,4 @@
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/* $OpenBSD: cversion.c,v 1.18 2023/07/08 08:28:23 beck Exp $ */
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/* $OpenBSD: cversion.c,v 1.19 2024/03/16 21:42:20 tb Exp $ */
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/* Copyright (C) 1995-1998 Eric Young (eay@cryptsoft.com)
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* All rights reserved.
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*
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@ -68,15 +68,15 @@ SSLeay_version(int t)
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case SSLEAY_VERSION:
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return OPENSSL_VERSION_TEXT;
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case SSLEAY_BUILT_ON:
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return("built on: date not available");
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return "built on: date not available";
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case SSLEAY_CFLAGS:
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return("compiler: information not available");
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return "compiler: information not available";
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case SSLEAY_PLATFORM:
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return("platform: information not available");
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return "platform: information not available";
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case SSLEAY_DIR:
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return "OPENSSLDIR: \"" OPENSSLDIR "\"";
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}
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return("not available");
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return "not available";
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}
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LCRYPTO_ALIAS(SSLeay_version);
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@ -94,17 +94,17 @@ OpenSSL_version(int t)
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case OPENSSL_VERSION:
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return OPENSSL_VERSION_TEXT;
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case OPENSSL_BUILT_ON:
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return("built on: date not available");
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return "built on: date not available";
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case OPENSSL_CFLAGS:
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return("compiler: information not available");
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return "compiler: information not available";
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case OPENSSL_PLATFORM:
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return("platform: information not available");
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return "platform: information not available";
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case OPENSSL_DIR:
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return "OPENSSLDIR: \"" OPENSSLDIR "\"";
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case OPENSSL_ENGINES_DIR:
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return "ENGINESDIR: N/A";
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}
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return("not available");
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return "not available";
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}
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LCRYPTO_ALIAS(OpenSSL_version);
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@ -1,4 +1,4 @@
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/* $OpenBSD: rsa_ameth.c,v 1.57 2024/01/10 14:59:19 tb Exp $ */
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/* $OpenBSD: rsa_ameth.c,v 1.58 2024/03/17 07:10:00 tb Exp $ */
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/* Written by Dr Stephen N Henson (steve@openssl.org) for the OpenSSL
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* project 2006.
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*/
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@ -605,6 +605,10 @@ rsa_md_to_algor(const EVP_MD *md, X509_ALGOR **out_alg)
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if ((alg = X509_ALGOR_new()) == NULL)
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goto err;
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/*
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* XXX - This omits the parameters, whereas RFC 4055, section 2.1
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* explicitly states that an explicit ASN.1 NULL is required.
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*/
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if (!X509_ALGOR_set_evp_md(alg, md))
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goto err;
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@ -640,6 +644,10 @@ rsa_mgf1md_to_maskGenAlgorithm(const EVP_MD *mgf1md, X509_ALGOR **out_alg)
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if ((inner_alg = X509_ALGOR_new()) == NULL)
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goto err;
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/*
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* XXX - This omits the parameters, whereas RFC 4055, section 2.1
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* explicitly states that an explicit ASN.1 NULL is required.
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*/
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if (!X509_ALGOR_set_evp_md(inner_alg, mgf1md))
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goto err;
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if ((astr = ASN1_item_pack(inner_alg, &X509_ALGOR_it, NULL)) == NULL)
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@ -1,4 +1,4 @@
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/* $OpenBSD: cpu.c,v 1.183 2024/02/25 22:33:09 guenther Exp $ */
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/* $OpenBSD: cpu.c,v 1.184 2024/03/17 05:49:41 guenther Exp $ */
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/* $NetBSD: cpu.c,v 1.1 2003/04/26 18:39:26 fvdl Exp $ */
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/*-
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@ -299,7 +299,8 @@ replacemds(void)
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CPU_INFO_ITERATOR cii;
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void *handler = NULL, *vmm_handler = NULL;
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const char *type;
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int has_verw, s;
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int use_verw = 0, s;
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uint32_t cap = 0;
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/* ci_mds_tmp must be 32byte aligned for AVX instructions */
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CTASSERT((offsetof(struct cpu_info, ci_mds_tmp) -
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@ -309,20 +310,22 @@ replacemds(void)
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return;
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replacedone = 1;
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if (strcmp(cpu_vendor, "GenuineIntel") != 0 ||
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((ci->ci_feature_sefflags_edx & SEFF0EDX_ARCH_CAP) &&
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(rdmsr(MSR_ARCH_CAPABILITIES) & ARCH_CAP_MDS_NO))) {
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if (strcmp(cpu_vendor, "GenuineIntel") != 0)
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goto notintel; /* VERW only needed on Intel */
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if ((ci->ci_feature_sefflags_edx & SEFF0EDX_ARCH_CAP))
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cap = rdmsr(MSR_ARCH_CAPABILITIES);
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if (cap & ARCH_CAP_MDS_NO) {
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/* Unaffected, nop out the handling code */
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has_verw = 0;
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} else if (ci->ci_feature_sefflags_edx & SEFF0EDX_MD_CLEAR) {
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/* new firmware, use VERW */
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has_verw = 1;
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use_verw = 1;
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} else {
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int family = ci->ci_family;
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int model = ci->ci_model;
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int stepping = CPUID2STEPPING(ci->ci_signature);
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has_verw = 0;
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if (family == 0x6 &&
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(model == 0x2e || model == 0x1e || model == 0x1f ||
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model == 0x1a || model == 0x2f || model == 0x25 ||
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@ -395,15 +398,24 @@ replacemds(void)
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}
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}
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/* Register File Data Sampling (RFDS) also has a VERW workaround */
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if ((cap & ARCH_CAP_RFDS_NO) == 0 && (cap & ARCH_CAP_RFDS_CLEAR))
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use_verw = 1;
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if (handler != NULL) {
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printf("cpu0: using %s MDS workaround%s\n", type, "");
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s = splhigh();
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codepatch_call(CPTAG_MDS, handler);
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codepatch_call(CPTAG_MDS_VMM, vmm_handler);
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splx(s);
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} else if (has_verw) {
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/* The new firmware enhances L1D_FLUSH MSR to flush MDS too */
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if (cpu_info_primary.ci_vmm_cap.vcc_vmx.vmx_has_l1_flush_msr == 1) {
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} else if (use_verw) {
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/*
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* The new firmware enhances L1D_FLUSH MSR to flush MDS too,
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* but keep the verw if affected by RFDS
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*/
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if ((cap & ARCH_CAP_RFDS_NO) == 0 && (cap & ARCH_CAP_RFDS_CLEAR)) {
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type = "";
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} else if (cpu_info_primary.ci_vmm_cap.vcc_vmx.vmx_has_l1_flush_msr == 1) {
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s = splhigh();
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codepatch_nop(CPTAG_MDS_VMM);
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splx(s);
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@ -413,6 +425,7 @@ replacemds(void)
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}
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printf("cpu0: using %s MDS workaround%s\n", "VERW", type);
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} else {
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notintel:
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s = splhigh();
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codepatch_nop(CPTAG_MDS);
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codepatch_nop(CPTAG_MDS_VMM);
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@ -1,4 +1,4 @@
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/* $OpenBSD: identcpu.c,v 1.138 2023/09/03 09:30:43 mlarkin Exp $ */
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/* $OpenBSD: identcpu.c,v 1.139 2024/03/17 05:49:41 guenther Exp $ */
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/* $NetBSD: identcpu.c,v 1.1 2003/04/26 18:39:28 fvdl Exp $ */
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/*
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@ -274,6 +274,8 @@ const struct {
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{ ARCH_CAP_PBRSB_NO, "PBRSB_NO" },
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{ ARCH_CAP_GDS_CTRL, "GDS_CTRL" },
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{ ARCH_CAP_GDS_NO, "GDS_NO" },
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{ ARCH_CAP_RFDS_NO, "RFDS_NO" },
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{ ARCH_CAP_RFDS_CLEAR, "RFDS_CLEAR" },
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};
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int
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@ -1,4 +1,4 @@
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/* $OpenBSD: locore.S,v 1.146 2024/02/25 22:33:09 guenther Exp $ */
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/* $OpenBSD: locore.S,v 1.147 2024/03/17 05:49:41 guenther Exp $ */
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/* $NetBSD: locore.S,v 1.13 2004/03/25 18:33:17 drochner Exp $ */
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/*
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@ -616,8 +616,15 @@ GENTRY(Xsyscall)
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movq TF_R13(%rsp),%r13
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movq TF_R14(%rsp),%r14
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movq TF_R15(%rsp),%r15
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movq TF_RBX(%rsp),%rbx
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movq TF_RDX(%rsp),%rdx
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CODEPATCH_START
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xorl %edi,%edi
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xorl %esi,%esi
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xorl %r11d,%r11d
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xorl %eax,%eax
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xorl %ecx,%ecx
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movw %ds,TF_R8(%rsp)
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verw TF_R8(%rsp)
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CODEPATCH_END(CPTAG_MDS)
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@ -625,7 +632,6 @@ GENTRY(Xsyscall)
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movq TF_RDI(%rsp),%rdi
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movq TF_RSI(%rsp),%rsi
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movq TF_RBP(%rsp),%rbp
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movq TF_RBX(%rsp),%rbx
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/*
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* We need to finish reading from the trapframe, then switch
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@ -635,7 +641,6 @@ GENTRY(Xsyscall)
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* user page tables, so save it in CPUVAR(SCRATCH) across
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* the switch.
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*/
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movq TF_RDX(%rsp),%rdx
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movq TF_RAX(%rsp),%rax
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movq TF_RIP(%rsp),%rcx
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movq TF_RFLAGS(%rsp),%r11
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@ -806,8 +811,15 @@ intr_user_exit_post_ast:
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movq TF_R13(%rsp),%r13
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movq TF_R14(%rsp),%r14
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movq TF_R15(%rsp),%r15
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movq TF_RBX(%rsp),%rbx
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CODEPATCH_START
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xorl %edi,%edi
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xorl %esi,%esi
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xorl %r11d,%r11d
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xorl %eax,%eax
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xorl %edx,%edx
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xorl %ecx,%ecx
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movw %ds,TF_R8(%rsp)
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verw TF_R8(%rsp)
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CODEPATCH_END(CPTAG_MDS)
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@ -815,7 +827,6 @@ intr_user_exit_post_ast:
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movq TF_RDI(%rsp),%rdi
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movq TF_RSI(%rsp),%rsi
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movq TF_RBP(%rsp),%rbp
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movq TF_RBX(%rsp),%rbx
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/*
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* To get the final value for the register that was used
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@ -1,4 +1,4 @@
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/* $OpenBSD: vmm_support.S,v 1.25 2024/02/25 22:33:09 guenther Exp $ */
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/* $OpenBSD: vmm_support.S,v 1.26 2024/03/17 05:49:41 guenther Exp $ */
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/*
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* Copyright (c) 2014 Mike Larkin <mlarkin@openbsd.org>
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*
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@ -247,6 +247,23 @@ skip_init:
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* XXX information yet to make the correct choices.
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*/
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CODEPATCH_START
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xorl %eax,%eax
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xorl %ebx,%ebx
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xorl %ecx,%ecx
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xorl %edx,%edx
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xorl %esi,%esi
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xorl %edi,%edi
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xorl %ebp,%ebp
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/*
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* r8 is a boolean flagging launch or resume
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* r9 is 0-2 about the CPU
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*/
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xorl %r10d,%r10d
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xorl %r11d,%r11d
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xorl %r12d,%r12d
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xorl %r13d,%r13d
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xorl %r14d,%r14d
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xorl %r15d,%r15d
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subq $8, %rsp
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movw %ds, (%rsp)
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verw (%rsp)
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@ -1,4 +1,4 @@
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/* $OpenBSD: specialreg.h,v 1.109 2023/09/03 09:30:43 mlarkin Exp $ */
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/* $OpenBSD: specialreg.h,v 1.110 2024/03/17 05:49:41 guenther Exp $ */
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/* $NetBSD: specialreg.h,v 1.1 2003/04/26 18:39:48 fvdl Exp $ */
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/* $NetBSD: x86/specialreg.h,v 1.2 2003/04/25 21:54:30 fvdl Exp $ */
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@ -428,6 +428,8 @@
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#define ARCH_CAP_PBRSB_NO (1 << 24) /* PBSR safe */
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#define ARCH_CAP_GDS_CTRL (1 << 25) /* has GDS_MITG_DIS/LOCK */
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#define ARCH_CAP_GDS_NO (1 << 26) /* GDS safe */
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#define ARCH_CAP_RFDS_NO (1 << 27) /* RFDS safe */
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#define ARCH_CAP_RFDS_CLEAR (1 << 28) /* use VERW for RFDS */
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#define MSR_FLUSH_CMD 0x10b
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#define FLUSH_CMD_L1D_FLUSH 0x1 /* (1ULL << 0) */
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#define MSR_BBL_CR_ADDR 0x116 /* PII+ only */
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@ -1,4 +1,4 @@
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/* $OpenBSD: cpu.c,v 1.110 2024/03/16 09:15:04 jsg Exp $ */
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/* $OpenBSD: cpu.c,v 1.111 2024/03/17 13:05:40 kettenis Exp $ */
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/*
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* Copyright (c) 2016 Dale Rahn <drahn@dalerahn.com>
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@ -821,11 +821,11 @@ cpu_identify(struct cpu_info *ci)
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sep = ",";
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}
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if (ID_AA64PFR1_SBSS(id) >= ID_AA64PFR1_SBSS_PSTATE) {
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printf("%sSBSS", sep);
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if (ID_AA64PFR1_SSBS(id) >= ID_AA64PFR1_SSBS_PSTATE) {
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printf("%sSSBS", sep);
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sep = ",";
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}
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if (ID_AA64PFR1_SBSS(id) >= ID_AA64PFR1_SBSS_PSTATE_MSR)
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if (ID_AA64PFR1_SSBS(id) >= ID_AA64PFR1_SSBS_PSTATE_MSR)
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printf("+MSR");
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if (ID_AA64PFR1_MTE(id) >= ID_AA64PFR1_MTE_IMPL) {
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@ -1,4 +1,4 @@
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/* $OpenBSD: machdep.c,v 1.87 2024/03/13 14:57:08 kettenis Exp $ */
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/* $OpenBSD: machdep.c,v 1.88 2024/03/17 13:05:40 kettenis Exp $ */
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/*
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* Copyright (c) 2014 Patrick Wildt <patrick@blueri.se>
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* Copyright (c) 2021 Mark Kettenis <kettenis@openbsd.org>
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@ -367,7 +367,7 @@ cpu_sysctl(int *name, u_int namelen, void *oldp, size_t *oldlenp, void *newp,
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case CPU_ID_AA64PFR1:
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value = 0;
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value |= cpu_id_aa64pfr1 & ID_AA64PFR1_BT_MASK;
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value |= cpu_id_aa64pfr1 & ID_AA64PFR1_SBSS_MASK;
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value |= cpu_id_aa64pfr1 & ID_AA64PFR1_SSBS_MASK;
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return sysctl_rdquad(oldp, oldlenp, newp, value);
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case CPU_ID_AA64ISAR2:
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case CPU_ID_AA64MMFR0:
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|
@ -1,4 +1,4 @@
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/* $OpenBSD: armreg.h,v 1.31 2024/03/05 18:42:20 kettenis Exp $ */
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/* $OpenBSD: armreg.h,v 1.32 2024/03/17 13:05:40 kettenis Exp $ */
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/*-
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* Copyright (c) 2013, 2014 Andrew Turner
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* Copyright (c) 2015 The FreeBSD Foundation
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@ -582,12 +582,12 @@
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#define ID_AA64PFR1_BT(x) ((x) & ID_AA64PFR1_BT_MASK)
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#define ID_AA64PFR1_BT_NONE (0x0ULL << ID_AA64PFR1_BT_SHIFT)
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#define ID_AA64PFR1_BT_IMPL (0x1ULL << ID_AA64PFR1_BT_SHIFT)
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#define ID_AA64PFR1_SBSS_SHIFT 4
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#define ID_AA64PFR1_SBSS_MASK (0xfULL << ID_AA64PFR1_SBSS_SHIFT)
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#define ID_AA64PFR1_SBSS(x) ((x) & ID_AA64PFR1_SBSS_MASK)
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#define ID_AA64PFR1_SBSS_NONE (0x0ULL << ID_AA64PFR1_SBSS_SHIFT)
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#define ID_AA64PFR1_SBSS_PSTATE (0x1ULL << ID_AA64PFR1_SBSS_SHIFT)
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#define ID_AA64PFR1_SBSS_PSTATE_MSR (0x2ULL << ID_AA64PFR1_SBSS_SHIFT)
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#define ID_AA64PFR1_SSBS_SHIFT 4
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#define ID_AA64PFR1_SSBS_MASK (0xfULL << ID_AA64PFR1_SSBS_SHIFT)
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#define ID_AA64PFR1_SSBS(x) ((x) & ID_AA64PFR1_SSBS_MASK)
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#define ID_AA64PFR1_SSBS_NONE (0x0ULL << ID_AA64PFR1_SSBS_SHIFT)
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#define ID_AA64PFR1_SSBS_PSTATE (0x1ULL << ID_AA64PFR1_SSBS_SHIFT)
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#define ID_AA64PFR1_SSBS_PSTATE_MSR (0x2ULL << ID_AA64PFR1_SSBS_SHIFT)
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#define ID_AA64PFR1_MTE_SHIFT 8
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#define ID_AA64PFR1_MTE_MASK (0xfULL << ID_AA64PFR1_MTE_SHIFT)
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#define ID_AA64PFR1_MTE(x) ((x) & ID_AA64PFR1_MTE_MASK)
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|
@ -1,4 +1,4 @@
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/* $OpenBSD: eephy.c,v 1.64 2024/01/23 11:51:53 uwe Exp $ */
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/* $OpenBSD: eephy.c,v 1.65 2024/03/17 00:06:43 patrick Exp $ */
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/*
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* Principal Author: Parag Patel
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* Copyright (c) 2001
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@ -55,6 +55,11 @@
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#include <dev/mii/eephyreg.h>
|
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|
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#ifdef __HAVE_FDT
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#include <machine/fdt.h>
|
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#include <dev/ofw/openfirm.h>
|
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#endif
|
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|
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int eephy_match(struct device *, void *, void *);
|
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void eephy_attach(struct device *, struct device *, void *);
|
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|
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@ -70,6 +75,10 @@ int eephy_service(struct mii_softc *, struct mii_data *, int);
|
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void eephy_status(struct mii_softc *);
|
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void eephy_reset(struct mii_softc *);
|
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|
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#ifdef __HAVE_FDT
|
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void eephy_fdt_reg_init(struct mii_softc *);
|
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#endif
|
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|
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const struct mii_phy_funcs eephy_funcs = {
|
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eephy_service, eephy_status, eephy_reset,
|
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};
|
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@ -213,6 +222,10 @@ eephy_attach(struct device *parent, struct device *self, void *aux)
|
||||
PHY_WRITE(sc, E1000_EADR, page);
|
||||
}
|
||||
|
||||
#ifdef __HAVE_FDT
|
||||
eephy_fdt_reg_init(sc);
|
||||
#endif
|
||||
|
||||
PHY_RESET(sc);
|
||||
|
||||
sc->mii_capabilities = PHY_READ(sc, E1000_SR) & ma->mii_capmask;
|
||||
@ -428,3 +441,40 @@ eephy_status(struct mii_softc *sc)
|
||||
mii->mii_media_active |= IFM_ETH_MASTER;
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef __HAVE_FDT
|
||||
void eephy_fdt_reg_init(struct mii_softc *sc)
|
||||
{
|
||||
uint32_t *prop, opage;
|
||||
int i, len;
|
||||
|
||||
if (!sc->mii_pdata->mii_node)
|
||||
return;
|
||||
|
||||
len = OF_getproplen(sc->mii_pdata->mii_node, "marvell,reg-init");
|
||||
if (len <= 0 || len % (4 * sizeof(uint32_t)) != 0)
|
||||
return;
|
||||
|
||||
opage = PHY_READ(sc, E1000_EADR);
|
||||
prop = malloc(len, M_TEMP, M_WAITOK);
|
||||
OF_getpropintarray(sc->mii_pdata->mii_node, "marvell,reg-init",
|
||||
prop, len);
|
||||
for (i = 0; i < len; i += 4) {
|
||||
uint32_t page = prop[i + 0];
|
||||
uint32_t reg = prop[i + 1];
|
||||
uint32_t keep = prop[i + 2];
|
||||
uint32_t set = prop[i + 3];
|
||||
uint32_t val = 0;
|
||||
|
||||
PHY_WRITE(sc, E1000_EADR, page);
|
||||
if (keep) {
|
||||
val = PHY_READ(sc, reg);
|
||||
val &= keep;
|
||||
}
|
||||
val |= set;
|
||||
PHY_WRITE(sc, reg, val);
|
||||
}
|
||||
free(prop, M_TEMP, len);
|
||||
PHY_WRITE(sc, E1000_EADR, opage);
|
||||
}
|
||||
#endif
|
||||
|
@ -1,4 +1,4 @@
|
||||
/* $OpenBSD: uipc_usrreq.c,v 1.200 2023/11/28 09:29:20 jsg Exp $ */
|
||||
/* $OpenBSD: uipc_usrreq.c,v 1.201 2024/03/17 19:47:08 mvs Exp $ */
|
||||
/* $NetBSD: uipc_usrreq.c,v 1.18 1996/02/09 19:00:50 christos Exp $ */
|
||||
|
||||
/*
|
||||
@ -415,6 +415,8 @@ uipc_listen(struct socket *so)
|
||||
{
|
||||
struct unpcb *unp = sotounpcb(so);
|
||||
|
||||
if (unp->unp_flags & (UNP_BINDING | UNP_CONNECTING))
|
||||
return (EINVAL);
|
||||
if (unp->unp_vnode == NULL)
|
||||
return (EINVAL);
|
||||
return (0);
|
||||
|
@ -1,4 +1,4 @@
|
||||
/* $OpenBSD: extern.h,v 1.210 2024/02/26 15:40:33 job Exp $ */
|
||||
/* $OpenBSD: extern.h,v 1.211 2024/03/17 01:44:59 tb Exp $ */
|
||||
/*
|
||||
* Copyright (c) 2019 Kristaps Dzonsons <kristaps@bsd.lv>
|
||||
*
|
||||
@ -24,14 +24,6 @@
|
||||
#include <openssl/x509.h>
|
||||
#include <openssl/x509v3.h>
|
||||
|
||||
/*
|
||||
* Enumeration for ASN.1 explicit tags in RSC eContent
|
||||
*/
|
||||
enum rsc_resourceblock_tag {
|
||||
RSRCBLK_TYPE_ASID,
|
||||
RSRCBLK_TYPE_IPADDRBLK,
|
||||
};
|
||||
|
||||
enum cert_as_type {
|
||||
CERT_AS_ID, /* single identifier */
|
||||
CERT_AS_INHERIT, /* inherit from parent */
|
||||
|
Loading…
Reference in New Issue
Block a user