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sync code with last fixes and improvements from OpenBSD

This commit is contained in:
purplerain 2023-06-12 03:32:40 +00:00
parent bf0676207f
commit 8f31919cdb
Signed by: purplerain
GPG Key ID: F42C07F07E2E35B7
325 changed files with 2094 additions and 51856 deletions
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19
bin/ksh/c_test.c
View File

@ -1,4 +1,4 @@
/* $OpenBSD: c_test.c,v 1.27 2019/06/28 13:34:59 deraadt Exp $ */
/* $OpenBSD: c_test.c,v 1.28 2023/06/10 07:24:21 op Exp $ */
/*
* test(1); version 7-like -- author Erik Baalbergen
@ -156,12 +156,6 @@ c_test(char **wp)
}
if (argc == 1) {
opnd1 = (*te.getopnd)(&te, TO_NONOP, 1);
/* Historically, -t by itself test if fd 1
* is a file descriptor, but POSIX says its
* a string test...
*/
if (!Flag(FPOSIX) && strcmp(opnd1, "-t") == 0)
break;
res = (*te.eval)(&te, TO_STNZE, opnd1,
NULL, 1);
if (invert & 1)
@ -271,14 +265,11 @@ test_eval(Test_env *te, Test_op op, const char *opnd1, const char *opnd2,
case TO_FILGZ: /* -s */
return stat(opnd1, &b1) == 0 && b1.st_size > 0L;
case TO_FILTT: /* -t */
if (opnd1 && !bi_getn(opnd1, &res)) {
if (!bi_getn(opnd1, &res)) {
te->flags |= TEF_ERROR;
res = 0;
} else {
/* generate error if in FPOSIX mode? */
res = isatty(opnd1 ? res : 0);
return 0;
}
return res;
return isatty(res);
case TO_FILUID: /* -O */
return stat(opnd1, &b1) == 0 && b1.st_uid == ksheuid;
case TO_FILGID: /* -G */
@ -527,7 +518,7 @@ static const char *
ptest_getopnd(Test_env *te, Test_op op, int do_eval)
{
if (te->pos.wp >= te->wp_end)
return op == TO_FILTT ? "1" : NULL;
return NULL;
return *te->pos.wp++;
}

26
bin/ksh/ksh.1
View File

@ -1,8 +1,8 @@
.\" $OpenBSD: ksh.1,v 1.218 2022/12/26 17:45:27 jmc Exp $
.\" $OpenBSD: ksh.1,v 1.219 2023/06/10 07:24:21 op Exp $
.\"
.\" Public Domain
.\"
.Dd $Mdocdate: December 26 2022 $
.Dd $Mdocdate: June 10 2023 $
.Dt KSH 1
.Os
.Sh NAME
@ -2569,20 +2569,6 @@ in non-POSIX mode:
alias a='for ' i='j'
a i in 1 2; do echo i=$i j=$j; done
.Ed
.It
.Ic test .
In POSIX mode, the expression
.Sq Fl t
(preceded by some number of
.Sq \&!
arguments) is always true as it is a non-zero length string;
in non-POSIX mode, it tests if file descriptor 1 is a
.Xr tty 4
(i.e. the
.Ar fd
argument to the
.Fl t
test may be left out and defaults to 1).
.El
.Ss Strict Bourne shell mode
When the
@ -3857,18 +3843,12 @@ socket.
.It Fl s Ar file
.Ar file
is not empty.
.It Fl t Op Ar fd
.It Fl t Ar fd
File descriptor
.Ar fd
is a
.Xr tty 4
device.
If the
.Ic posix
option is not set,
.Ar fd
may be left out, in which case it is taken to be 1 (the behaviour differs due
to the special POSIX rules described above).
.It Fl u Ar file
.Ar file Ns 's
mode has the setuid bit set.

6
bin/test/test.1
View File

@ -1,4 +1,4 @@
.\" $OpenBSD: test.1,v 1.33 2016/08/16 18:51:25 schwarze Exp $
.\" $OpenBSD: test.1,v 1.34 2023/06/10 07:19:39 op Exp $
.\" $NetBSD: test.1,v 1.6 1995/03/21 07:04:03 cgd Exp $
.\"
.\" Copyright (c) 1991, 1993
@ -33,7 +33,7 @@
.\"
.\" @(#)test.1 8.1 (Berkeley) 5/31/93
.\"
.Dd $Mdocdate: August 16 2016 $
.Dd $Mdocdate: June 10 2023 $
.Dt TEST 1
.Os
.Sh NAME
@ -153,7 +153,7 @@ than zero.
True if the file whose file descriptor number
is
.Ar file_descriptor
(default 1) is open and is associated with a terminal.
is open and is associated with a terminal.
.It Fl u Ar file
True if
.Ar file

5
distrib/amd64/ramdiskA/Makefile
View File

@ -1,8 +1,7 @@
# $OpenBSD: Makefile,v 1.20 2023/04/28 18:14:59 krw Exp $
# $OpenBSD: Makefile,v 1.21 2023/06/11 14:00:04 krw Exp $
FS= floppy${OSrev}.img
FSSIZE= 2880
FSDISKTYPE= floppy3
MOUNT_POINT= /mnt
MTREE= ${UTILS}/mtree.conf
RAMDISK= RAMDISK
@ -17,7 +16,7 @@ all: ${FS}
${FS}: bsd.gz
dd if=/dev/zero of=${FS} bs=512 count=${FSSIZE}
vnconfig -v ${FS} > vnd
disklabel -w `cat vnd` ${FSDISKTYPE}
echo '/ *' | disklabel -wAT- `cat vnd`
newfs -O 1 -m 0 -o space -i 524288 -c ${FSSIZE} -b 4096 -f 512 /dev/r`cat vnd`a
mount /dev/`cat vnd`a ${MOUNT_POINT}
objcopy -S -R .comment ${DESTDIR}/usr/mdec/fdboot ${.OBJDIR}/boot

5
distrib/i386/ramdisk/Makefile
View File

@ -1,8 +1,7 @@
# $OpenBSD: Makefile,v 1.21 2023/04/28 18:14:59 krw Exp $
# $OpenBSD: Makefile,v 1.22 2023/06/11 14:00:04 krw Exp $
FS= floppy${OSrev}.img
FSSIZE= 2880
FSDISKTYPE= floppy3
MOUNT_POINT= /mnt
MTREE= ${UTILS}/mtree.conf
RAMDISK= RAMDISK
@ -15,7 +14,7 @@ all: ${FS}
${FS}: bsd.gz
dd if=/dev/zero of=${FS} bs=512 count=${FSSIZE}
vnconfig -v ${FS} > vnd
disklabel -w `cat vnd` ${FSDISKTYPE}
echo '/ *' | disklabel -wAT- `cat vnd`
newfs -O 1 -m 0 -o space -i 524288 -c ${FSSIZE} -b 4096 -f 512 /dev/r`cat vnd`a
mount /dev/`cat vnd`a ${MOUNT_POINT}
objcopy -S -R .comment ${DESTDIR}/usr/mdec/fdboot ${.OBJDIR}/boot

3
lib/libcrypto/Makefile
View File

@ -1,4 +1,4 @@
# $OpenBSD: Makefile,v 1.129 2023/05/07 14:39:55 tb Exp $
# $OpenBSD: Makefile,v 1.130 2023/06/11 05:35:43 tb Exp $
LIB= crypto
LIBREBUILD=y
@ -236,7 +236,6 @@ SRCS+= cmac.c
# cms/
SRCS+= cms_asn1.c
SRCS+= cms_att.c
SRCS+= cms_cd.c
SRCS+= cms_dd.c
SRCS+= cms_enc.c
SRCS+= cms_env.c

128
lib/libcrypto/cms/cms_cd.c
View File

@ -1,128 +0,0 @@
/* $OpenBSD: cms_cd.c,v 1.16 2022/11/26 16:08:51 tb Exp $ */
/*
* Written by Dr Stephen N Henson (steve@openssl.org) for the OpenSSL
* project.
*/
/* ====================================================================
* Copyright (c) 2008 The OpenSSL Project. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
*
* 3. All advertising materials mentioning features or use of this
* software must display the following acknowledgment:
* "This product includes software developed by the OpenSSL Project
* for use in the OpenSSL Toolkit. (http://www.OpenSSL.org/)"
*
* 4. The names "OpenSSL Toolkit" and "OpenSSL Project" must not be used to
* endorse or promote products derived from this software without
* prior written permission. For written permission, please contact
* licensing@OpenSSL.org.
*
* 5. Products derived from this software may not be called "OpenSSL"
* nor may "OpenSSL" appear in their names without prior written
* permission of the OpenSSL Project.
*
* 6. Redistributions of any form whatsoever must retain the following
* acknowledgment:
* "This product includes software developed by the OpenSSL Project
* for use in the OpenSSL Toolkit (http://www.OpenSSL.org/)"
*
* THIS SOFTWARE IS PROVIDED BY THE OpenSSL PROJECT ``AS IS'' AND ANY
* EXPRESSED OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE OpenSSL PROJECT OR
* ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE.
* ====================================================================
*/
#include "cryptlib.h"
#include <openssl/asn1t.h>
#include <openssl/pem.h>
#include <openssl/x509v3.h>
#include <openssl/err.h>
#include <openssl/cms.h>
#include <openssl/bio.h>
#include <openssl/comp.h>
#include "cms_local.h"
#ifdef ZLIB
/* CMS CompressedData Utilities */
CMS_ContentInfo *
cms_CompressedData_create(int comp_nid)
{
CMS_ContentInfo *cms;
CMS_CompressedData *cd;
/*
* Will need something cleverer if there is ever more than one
* compression algorithm or parameters have some meaning...
*/
if (comp_nid != NID_zlib_compression) {
CMSerror(CMS_R_UNSUPPORTED_COMPRESSION_ALGORITHM);
return NULL;
}
cms = CMS_ContentInfo_new();
if (cms == NULL)
return NULL;
cd = (CMS_CompressedData *)ASN1_item_new(&CMS_CompressedData_it);
if (cd == NULL)
goto err;
cms->contentType = OBJ_nid2obj(NID_id_smime_ct_compressedData);
cms->d.compressedData = cd;
cd->version = 0;
X509_ALGOR_set0(cd->compressionAlgorithm,
OBJ_nid2obj(NID_zlib_compression), V_ASN1_UNDEF, NULL);
cd->encapContentInfo->eContentType = OBJ_nid2obj(NID_pkcs7_data);
return cms;
err:
CMS_ContentInfo_free(cms);
return NULL;
}
BIO *
cms_CompressedData_init_bio(CMS_ContentInfo *cms)
{
CMS_CompressedData *cd;
const ASN1_OBJECT *compoid;
if (OBJ_obj2nid(cms->contentType) != NID_id_smime_ct_compressedData) {
CMSerror(CMS_R_CONTENT_TYPE_NOT_COMPRESSED_DATA);
return NULL;
}
cd = cms->d.compressedData;
X509_ALGOR_get0(&compoid, NULL, NULL, cd->compressionAlgorithm);
if (OBJ_obj2nid(compoid) != NID_zlib_compression) {
CMSerror(CMS_R_UNSUPPORTED_COMPRESSION_ALGORITHM);
return NULL;
}
return BIO_new(BIO_f_zlib());
}
#endif

7
lib/libcrypto/cms/cms_lib.c
View File

@ -1,4 +1,4 @@
/* $OpenBSD: cms_lib.c,v 1.16 2022/11/26 16:08:51 tb Exp $ */
/* $OpenBSD: cms_lib.c,v 1.17 2023/06/11 05:35:43 tb Exp $ */
/*
* Written by Dr Stephen N Henson (steve@openssl.org) for the OpenSSL
* project.
@ -160,11 +160,6 @@ CMS_dataInit(CMS_ContentInfo *cms, BIO *icont)
case NID_pkcs7_digest:
cmsbio = cms_DigestedData_init_bio(cms);
break;
#ifdef ZLIB
case NID_id_smime_ct_compressedData:
cmsbio = cms_CompressedData_init_bio(cms);
break;
#endif
case NID_pkcs7_encrypted:
cmsbio = cms_EncryptedData_init_bio(cms);

53
lib/libcrypto/cms/cms_smime.c
View File

@ -1,4 +1,4 @@
/* $OpenBSD: cms_smime.c,v 1.25 2022/11/26 16:08:51 tb Exp $ */
/* $OpenBSD: cms_smime.c,v 1.26 2023/06/11 05:35:43 tb Exp $ */
/*
* Written by Dr Stephen N Henson (steve@openssl.org) for the OpenSSL
* project.
@ -868,55 +868,6 @@ CMS_final(CMS_ContentInfo *cms, BIO *data, BIO *dcont, unsigned int flags)
return ret;
}
#ifdef ZLIB
int
CMS_uncompress(CMS_ContentInfo *cms, BIO *dcont, BIO *out, unsigned int flags)
{
BIO *cont;
int r;
if (OBJ_obj2nid(CMS_get0_type(cms)) != NID_id_smime_ct_compressedData) {
CMSerror(CMS_R_TYPE_NOT_COMPRESSED_DATA);
return 0;
}
if (!dcont && !check_content(cms))
return 0;
cont = CMS_dataInit(cms, dcont);
if (!cont)
return 0;
r = cms_copy_content(out, cont, flags);
do_free_upto(cont, dcont);
return r;
}
CMS_ContentInfo *
CMS_compress(BIO *in, int comp_nid, unsigned int flags)
{
CMS_ContentInfo *cms;
if (comp_nid <= 0)
comp_nid = NID_zlib_compression;
cms = cms_CompressedData_create(comp_nid);
if (!cms)
return NULL;
if (!(flags & CMS_DETACHED))
CMS_set_detached(cms, 0);
if ((flags & CMS_STREAM) || CMS_final(cms, in, NULL, flags))
return cms;
CMS_ContentInfo_free(cms);
return NULL;
}
#else
int
CMS_uncompress(CMS_ContentInfo *cms, BIO *dcont, BIO *out, unsigned int flags)
{
@ -930,5 +881,3 @@ CMS_compress(BIO *in, int comp_nid, unsigned int flags)
CMSerror(CMS_R_UNSUPPORTED_COMPRESSION_ALGORITHM);
return NULL;
}
#endif

542
lib/libcrypto/comp/c_zlib.c
View File

@ -1,4 +1,4 @@
/* $OpenBSD: c_zlib.c,v 1.26 2023/04/17 13:18:00 tb Exp $ */
/* $OpenBSD: c_zlib.c,v 1.27 2023/06/11 05:35:43 tb Exp $ */
/*
* ---------------------------------------------------------------------------
* Major patches to this file were contributed by
@ -132,551 +132,13 @@ static COMP_METHOD zlib_method_nozlib = {
.name = "(undef)"
};
#ifdef ZLIB
#include <zlib.h>
static int zlib_stateful_init(COMP_CTX *ctx);
static void zlib_stateful_finish(COMP_CTX *ctx);
static int zlib_stateful_compress_block(COMP_CTX *ctx, unsigned char *out,
unsigned int olen, unsigned char *in, unsigned int ilen);
static int zlib_stateful_expand_block(COMP_CTX *ctx, unsigned char *out,
unsigned int olen, unsigned char *in, unsigned int ilen);
/* memory allocations functions for zlib initialization */
static void*
zlib_zalloc(void* opaque, unsigned int no, unsigned int size)
{
return calloc(no, size);
}
static void
zlib_zfree(void* opaque, void* address)
{
free(address);
}
static COMP_METHOD zlib_stateful_method = {
.type = NID_zlib_compression,
.name = LN_zlib_compression,
.init = zlib_stateful_init,
.finish = zlib_stateful_finish,
.compress = zlib_stateful_compress_block,
.expand = zlib_stateful_expand_block
};
struct zlib_state {
z_stream istream;
z_stream ostream;
};
static int zlib_stateful_ex_idx = -1;
static int
zlib_stateful_init(COMP_CTX *ctx)
{
int err;
struct zlib_state *state = malloc(sizeof(struct zlib_state));
if (state == NULL)
goto err;
state->istream.zalloc = zlib_zalloc;
state->istream.zfree = zlib_zfree;
state->istream.opaque = Z_NULL;
state->istream.next_in = Z_NULL;
state->istream.next_out = Z_NULL;
state->istream.avail_in = 0;
state->istream.avail_out = 0;
err = inflateInit_(&state->istream, ZLIB_VERSION, sizeof(z_stream));
if (err != Z_OK)
goto err;
state->ostream.zalloc = zlib_zalloc;
state->ostream.zfree = zlib_zfree;
state->ostream.opaque = Z_NULL;
state->ostream.next_in = Z_NULL;
state->ostream.next_out = Z_NULL;
state->ostream.avail_in = 0;
state->ostream.avail_out = 0;
err = deflateInit_(&state->ostream, Z_DEFAULT_COMPRESSION,
ZLIB_VERSION, sizeof(z_stream));
if (err != Z_OK)
goto err;
CRYPTO_new_ex_data(CRYPTO_EX_INDEX_COMP, ctx, &ctx->ex_data);
CRYPTO_set_ex_data(&ctx->ex_data, zlib_stateful_ex_idx, state);
return 1;
err:
free(state);
return 0;
}
static void
zlib_stateful_finish(COMP_CTX *ctx)
{
struct zlib_state *state =
(struct zlib_state *)CRYPTO_get_ex_data(&ctx->ex_data,
zlib_stateful_ex_idx);
inflateEnd(&state->istream);
deflateEnd(&state->ostream);
free(state);
CRYPTO_free_ex_data(CRYPTO_EX_INDEX_COMP, ctx, &ctx->ex_data);
}
static int
zlib_stateful_compress_block(COMP_CTX *ctx, unsigned char *out,
unsigned int olen, unsigned char *in, unsigned int ilen)
{
int err = Z_OK;
struct zlib_state *state =
(struct zlib_state *)CRYPTO_get_ex_data(&ctx->ex_data,
zlib_stateful_ex_idx);
if (state == NULL)
return -1;
state->ostream.next_in = in;
state->ostream.avail_in = ilen;
state->ostream.next_out = out;
state->ostream.avail_out = olen;
if (ilen > 0)
err = deflate(&state->ostream, Z_SYNC_FLUSH);
if (err != Z_OK)
return -1;
#ifdef DEBUG_ZLIB
fprintf(stderr, "compress(%4d)->%4d %s\n",
ilen, olen - state->ostream.avail_out,
(ilen != olen - state->ostream.avail_out)?"zlib":"clear");
#endif
return olen - state->ostream.avail_out;
}
static int
zlib_stateful_expand_block(COMP_CTX *ctx, unsigned char *out,
unsigned int olen, unsigned char *in, unsigned int ilen)
{
int err = Z_OK;
struct zlib_state *state =
(struct zlib_state *)CRYPTO_get_ex_data(&ctx->ex_data,
zlib_stateful_ex_idx);
if (state == NULL)
return 0;
state->istream.next_in = in;
state->istream.avail_in = ilen;
state->istream.next_out = out;
state->istream.avail_out = olen;
if (ilen > 0)
err = inflate(&state->istream, Z_SYNC_FLUSH);
if (err != Z_OK)
return -1;
#ifdef DEBUG_ZLIB
fprintf(stderr, "expand(%4d)->%4d %s\n",
ilen, olen - state->istream.avail_out,
(ilen != olen - state->istream.avail_out)?"zlib":"clear");
#endif
return olen - state->istream.avail_out;
}
#endif
COMP_METHOD *
COMP_zlib(void)
{
COMP_METHOD *meth = &zlib_method_nozlib;
#ifdef ZLIB
{
/* init zlib_stateful_ex_idx here so that in a multi-process
* application it's enough to initialize openssl before forking
* (idx will be inherited in all the children) */
if (zlib_stateful_ex_idx == -1) {
CRYPTO_w_lock(CRYPTO_LOCK_COMP);
if (zlib_stateful_ex_idx == -1)
zlib_stateful_ex_idx =
CRYPTO_get_ex_new_index(CRYPTO_EX_INDEX_COMP,
0, NULL, NULL, NULL, NULL);
CRYPTO_w_unlock(CRYPTO_LOCK_COMP);
if (zlib_stateful_ex_idx == -1)
goto err;
}
if (!OPENSSL_init_crypto(0, NULL))
goto err;
meth = &zlib_stateful_method;
}
err:
#endif
return (meth);
return &zlib_method_nozlib;
}
void
COMP_zlib_cleanup(void)
{
}
#ifdef ZLIB
/* Zlib based compression/decompression filter BIO */
typedef struct {
unsigned char *ibuf; /* Input buffer */
int ibufsize; /* Buffer size */
z_stream zin; /* Input decompress context */
unsigned char *obuf; /* Output buffer */
int obufsize; /* Output buffer size */
unsigned char *optr; /* Position in output buffer */
int ocount; /* Amount of data in output buffer */
int odone; /* deflate EOF */
int comp_level; /* Compression level to use */
z_stream zout; /* Output compression context */
} BIO_ZLIB_CTX;
#define ZLIB_DEFAULT_BUFSIZE 1024
static int bio_zlib_new(BIO *bi);
static int bio_zlib_free(BIO *bi);
static int bio_zlib_read(BIO *b, char *out, int outl);
static int bio_zlib_write(BIO *b, const char *in, int inl);
static long bio_zlib_ctrl(BIO *b, int cmd, long num, void *ptr);
static long bio_zlib_callback_ctrl(BIO *b, int cmd, BIO_info_cb *fp);
static BIO_METHOD bio_meth_zlib = {
.type = BIO_TYPE_COMP,
.name = "zlib",
.bwrite = bio_zlib_write,
.bread = bio_zlib_read,
.ctrl = bio_zlib_ctrl,
.create = bio_zlib_new,
.destroy = bio_zlib_free,
.callback_ctrl = bio_zlib_callback_ctrl
};
BIO_METHOD *
BIO_f_zlib(void)
{
return &bio_meth_zlib;
}
static int
bio_zlib_new(BIO *bi)
{
BIO_ZLIB_CTX *ctx;
ctx = malloc(sizeof(BIO_ZLIB_CTX));
if (!ctx) {
COMPerror(ERR_R_MALLOC_FAILURE);
return 0;
}
ctx->ibuf = NULL;
ctx->obuf = NULL;
ctx->ibufsize = ZLIB_DEFAULT_BUFSIZE;
ctx->obufsize = ZLIB_DEFAULT_BUFSIZE;
ctx->zin.zalloc = Z_NULL;
ctx->zin.zfree = Z_NULL;
ctx->zin.next_in = NULL;
ctx->zin.avail_in = 0;
ctx->zin.next_out = NULL;
ctx->zin.avail_out = 0;
ctx->zout.zalloc = Z_NULL;
ctx->zout.zfree = Z_NULL;
ctx->zout.next_in = NULL;
ctx->zout.avail_in = 0;
ctx->zout.next_out = NULL;
ctx->zout.avail_out = 0;
ctx->odone = 0;
ctx->comp_level = Z_DEFAULT_COMPRESSION;
bi->init = 1;
bi->ptr = (char *)ctx;
bi->flags = 0;
return 1;
}
static int
bio_zlib_free(BIO *bi)
{
BIO_ZLIB_CTX *ctx;
if (!bi)
return 0;
ctx = (BIO_ZLIB_CTX *)bi->ptr;
if (ctx->ibuf) {
/* Destroy decompress context */
inflateEnd(&ctx->zin);
free(ctx->ibuf);
}
if (ctx->obuf) {
/* Destroy compress context */
deflateEnd(&ctx->zout);
free(ctx->obuf);
}
free(ctx);
bi->ptr = NULL;
bi->init = 0;
bi->flags = 0;
return 1;
}
static int
bio_zlib_read(BIO *b, char *out, int outl)
{
BIO_ZLIB_CTX *ctx;
int ret;
z_stream *zin;
if (!out || !outl)
return 0;
ctx = (BIO_ZLIB_CTX *)b->ptr;
zin = &ctx->zin;
BIO_clear_retry_flags(b);
if (!ctx->ibuf) {
ctx->ibuf = malloc(ctx->ibufsize);
if (!ctx->ibuf) {
COMPerror(ERR_R_MALLOC_FAILURE);
return 0;
}
inflateInit(zin);
zin->next_in = ctx->ibuf;
zin->avail_in = 0;
}
/* Copy output data directly to supplied buffer */
zin->next_out = (unsigned char *)out;
zin->avail_out = (unsigned int)outl;
for (;;) {
/* Decompress while data available */
while (zin->avail_in) {
ret = inflate(zin, 0);
if ((ret != Z_OK) && (ret != Z_STREAM_END)) {
COMPerror(COMP_R_ZLIB_INFLATE_ERROR);
ERR_asprintf_error_data("zlib error:%s",
zError(ret));
return 0;
}
/* If EOF or we've read everything then return */
if ((ret == Z_STREAM_END) || !zin->avail_out)
return outl - zin->avail_out;
}
/* No data in input buffer try to read some in,
* if an error then return the total data read.
*/
ret = BIO_read(b->next_bio, ctx->ibuf, ctx->ibufsize);
if (ret <= 0) {
/* Total data read */
int tot = outl - zin->avail_out;
BIO_copy_next_retry(b);
if (ret < 0)
return (tot > 0) ? tot : ret;
return tot;
}
zin->avail_in = ret;
zin->next_in = ctx->ibuf;
}
}
static int
bio_zlib_write(BIO *b, const char *in, int inl)
{
BIO_ZLIB_CTX *ctx;
int ret;
z_stream *zout;
if (!in || !inl)
return 0;
ctx = (BIO_ZLIB_CTX *)b->ptr;
if (ctx->odone)
return 0;
zout = &ctx->zout;
BIO_clear_retry_flags(b);
if (!ctx->obuf) {
ctx->obuf = malloc(ctx->obufsize);
/* Need error here */
if (!ctx->obuf) {
COMPerror(ERR_R_MALLOC_FAILURE);
return 0;
}
ctx->optr = ctx->obuf;
ctx->ocount = 0;
deflateInit(zout, ctx->comp_level);
zout->next_out = ctx->obuf;
zout->avail_out = ctx->obufsize;
}
/* Obtain input data directly from supplied buffer */
zout->next_in = (void *)in;
zout->avail_in = inl;
for (;;) {
/* If data in output buffer write it first */
while (ctx->ocount) {
ret = BIO_write(b->next_bio, ctx->optr, ctx->ocount);
if (ret <= 0) {
/* Total data written */
int tot = inl - zout->avail_in;
BIO_copy_next_retry(b);
if (ret < 0)
return (tot > 0) ? tot : ret;
return tot;
}
ctx->optr += ret;
ctx->ocount -= ret;
}
/* Have we consumed all supplied data? */
if (!zout->avail_in)
return inl;
/* Compress some more */
/* Reset buffer */
ctx->optr = ctx->obuf;
zout->next_out = ctx->obuf;
zout->avail_out = ctx->obufsize;
/* Compress some more */
ret = deflate(zout, 0);
if (ret != Z_OK) {
COMPerror(COMP_R_ZLIB_DEFLATE_ERROR);
ERR_asprintf_error_data("zlib error:%s", zError(ret));
return 0;
}
ctx->ocount = ctx->obufsize - zout->avail_out;
}
}
static int
bio_zlib_flush(BIO *b)
{
BIO_ZLIB_CTX *ctx;
int ret;
z_stream *zout;
ctx = (BIO_ZLIB_CTX *)b->ptr;
/* If no data written or already flush show success */
if (!ctx->obuf || (ctx->odone && !ctx->ocount))
return 1;
zout = &ctx->zout;
BIO_clear_retry_flags(b);
/* No more input data */
zout->next_in = NULL;
zout->avail_in = 0;
for (;;) {
/* If data in output buffer write it first */
while (ctx->ocount) {
ret = BIO_write(b->next_bio, ctx->optr, ctx->ocount);
if (ret <= 0) {
BIO_copy_next_retry(b);
return ret;
}
ctx->optr += ret;
ctx->ocount -= ret;
}
if (ctx->odone)
return 1;
/* Compress some more */
/* Reset buffer */
ctx->optr = ctx->obuf;
zout->next_out = ctx->obuf;
zout->avail_out = ctx->obufsize;
/* Compress some more */
ret = deflate(zout, Z_FINISH);
if (ret == Z_STREAM_END)
ctx->odone = 1;
else if (ret != Z_OK) {
COMPerror(COMP_R_ZLIB_DEFLATE_ERROR);
ERR_asprintf_error_data("zlib error:%s", zError(ret));
return 0;
}
ctx->ocount = ctx->obufsize - zout->avail_out;
}
}
static long
bio_zlib_ctrl(BIO *b, int cmd, long num, void *ptr)
{
BIO_ZLIB_CTX *ctx;
int ret, *ip;
int ibs, obs;
if (!b->next_bio)
return 0;
ctx = (BIO_ZLIB_CTX *)b->ptr;
switch (cmd) {
case BIO_CTRL_RESET:
ctx->ocount = 0;
ctx->odone = 0;
ret = 1;
break;
case BIO_CTRL_FLUSH:
ret = bio_zlib_flush(b);
if (ret > 0)
ret = BIO_flush(b->next_bio);
break;
case BIO_C_SET_BUFF_SIZE:
ibs = -1;
obs = -1;
if (ptr != NULL) {
ip = ptr;
if (*ip == 0)
ibs = (int) num;
else
obs = (int) num;
} else {
ibs = (int)num;
obs = ibs;
}
if (ibs != -1) {
free(ctx->ibuf);
ctx->ibuf = NULL;
ctx->ibufsize = ibs;
}
if (obs != -1) {
free(ctx->obuf);
ctx->obuf = NULL;
ctx->obufsize = obs;
}
ret = 1;
break;
case BIO_C_DO_STATE_MACHINE:
BIO_clear_retry_flags(b);
ret = BIO_ctrl(b->next_bio, cmd, num, ptr);
BIO_copy_next_retry(b);
break;
default:
ret = BIO_ctrl(b->next_bio, cmd, num, ptr);
break;
}
return ret;
}
static long
bio_zlib_callback_ctrl(BIO *b, int cmd, BIO_info_cb *fp)
{
if (!b->next_bio)
return 0;
return BIO_callback_ctrl(b->next_bio, cmd, fp);
}
#endif

8
lib/libcrypto/comp/comp.h
View File

@ -1,4 +1,4 @@
/* $OpenBSD: comp.h,v 1.11 2022/12/24 07:12:09 tb Exp $ */
/* $OpenBSD: comp.h,v 1.12 2023/06/11 05:35:43 tb Exp $ */
/*
* ---------------------------------------------------------------------------
* Patches to this file were contributed by
@ -131,12 +131,6 @@ COMP_METHOD *COMP_rle(void );
COMP_METHOD *COMP_zlib(void );
void COMP_zlib_cleanup(void);
#ifdef HEADER_BIO_H
#ifdef ZLIB
BIO_METHOD *BIO_f_zlib(void);
#endif
#endif
void ERR_load_COMP_strings(void);
/* Error codes for the COMP functions. */

5
lib/libcrypto/err/err_all.c
View File

@ -1,4 +1,4 @@
/* $OpenBSD: err_all.c,v 1.27 2022/05/07 17:20:41 tb Exp $ */
/* $OpenBSD: err_all.c,v 1.28 2023/06/11 05:35:43 tb Exp $ */
/* Copyright (C) 1995-1998 Eric Young (eay@cryptsoft.com)
* All rights reserved.
*
@ -122,9 +122,6 @@ ERR_load_crypto_strings_internal(void)
ERR_load_BUF_strings();
#ifndef OPENSSL_NO_CMS
ERR_load_CMS_strings();
#endif
#ifdef ZLIB
ERR_load_COMP_strings();
#endif
ERR_load_CONF_strings();
ERR_load_CRYPTO_strings();

16
lib/libcrypto/x509/x509_vfy.c
View File

@ -1,4 +1,4 @@
/* $OpenBSD: x509_vfy.c,v 1.124 2023/05/28 05:25:24 tb Exp $ */
/* $OpenBSD: x509_vfy.c,v 1.125 2023/06/08 22:02:40 beck Exp $ */
/* Copyright (C) 1995-1998 Eric Young (eay@cryptsoft.com)
* All rights reserved.
*
@ -754,23 +754,14 @@ x509_vfy_check_chain_extensions(X509_STORE_CTX *ctx)
goto end;
}
ret = X509_check_ca(x);
switch (must_be_ca) {
case -1:
if (must_be_ca == -1) {
if ((ctx->param->flags & X509_V_FLAG_X509_STRICT) &&
(ret != 1) && (ret != 0)) {
ret = 0;
ctx->error = X509_V_ERR_INVALID_CA;
} else
ret = 1;
break;
case 0:
if (ret != 0) {
ret = 0;
ctx->error = X509_V_ERR_INVALID_NON_CA;
} else
ret = 1;
break;
default:
} else {
if ((ret == 0) ||
((ctx->param->flags & X509_V_FLAG_X509_STRICT) &&
(ret != 1))) {
@ -778,7 +769,6 @@ x509_vfy_check_chain_extensions(X509_STORE_CTX *ctx)
ctx->error = X509_V_ERR_INVALID_CA;
} else
ret = 1;
break;
}
if (ret == 0) {
ctx->error_depth = i;

62
lib/libssl/ssl_clnt.c
View File

@ -1,4 +1,4 @@
/* $OpenBSD: ssl_clnt.c,v 1.158 2022/12/26 07:31:44 jmc Exp $ */
/* $OpenBSD: ssl_clnt.c,v 1.160 2023/06/11 19:01:01 tb Exp $ */
/* Copyright (C) 1995-1998 Eric Young (eay@cryptsoft.com)
* All rights reserved.
*
@ -1299,13 +1299,17 @@ ssl3_get_server_kex_ecdhe(SSL *s, CBS *cbs)
static int
ssl3_get_server_key_exchange(SSL *s)
{
CBS cbs, signature;
CBB cbb;
CBS cbs, params, signature;
EVP_MD_CTX *md_ctx;
const unsigned char *param;
size_t param_len;
unsigned char *signed_params = NULL;
size_t signed_params_len;
size_t params_len;
long alg_k, alg_a;
int al, ret;
memset(&cbb, 0, sizeof(cbb));
alg_k = s->s3->hs.cipher->algorithm_mkey;
alg_a = s->s3->hs.cipher->algorithm_auth;
@ -1341,8 +1345,14 @@ ssl3_get_server_key_exchange(SSL *s)
return (1);
}
param = CBS_data(&cbs);
param_len = CBS_len(&cbs);
if (!CBB_init(&cbb, 0))
goto err;
if (!CBB_add_bytes(&cbb, s->s3->client_random, SSL3_RANDOM_SIZE))
goto err;
if (!CBB_add_bytes(&cbb, s->s3->server_random, SSL3_RANDOM_SIZE))
goto err;
CBS_dup(&cbs, &params);
if (alg_k & SSL_kDHE) {
if (!ssl3_get_server_kex_dhe(s, &cbs))
@ -1356,7 +1366,12 @@ ssl3_get_server_key_exchange(SSL *s)
goto fatal_err;
}
param_len -= CBS_len(&cbs);
if ((params_len = CBS_offset(&cbs)) > CBS_len(&params))
goto err;
if (!CBB_add_bytes(&cbb, CBS_data(&params), params_len))
goto err;
if (!CBB_finish(&cbb, &signed_params, &signed_params_len))
goto err;
/* if it was signed, check the signature */
if ((alg_a & SSL_aNULL) == 0) {
@ -1400,21 +1415,13 @@ ssl3_get_server_key_exchange(SSL *s)
if (!EVP_DigestVerifyInit(md_ctx, &pctx, sigalg->md(),
NULL, pkey))
goto err;
if (!EVP_DigestVerifyUpdate(md_ctx, s->s3->client_random,
SSL3_RANDOM_SIZE))
goto err;
if ((sigalg->flags & SIGALG_FLAG_RSA_PSS) &&
(!EVP_PKEY_CTX_set_rsa_padding(pctx,
RSA_PKCS1_PSS_PADDING) ||
!EVP_PKEY_CTX_set_rsa_pss_saltlen(pctx, -1)))
goto err;
if (!EVP_DigestVerifyUpdate(md_ctx, s->s3->server_random,
SSL3_RANDOM_SIZE))
goto err;
if (!EVP_DigestVerifyUpdate(md_ctx, param, param_len))
goto err;
if (EVP_DigestVerifyFinal(md_ctx, CBS_data(&signature),
CBS_len(&signature)) <= 0) {
if (EVP_DigestVerify(md_ctx, CBS_data(&signature),
CBS_len(&signature), signed_params, signed_params_len) <= 0) {
al = SSL_AD_DECRYPT_ERROR;
SSLerror(s, SSL_R_BAD_SIGNATURE);
goto fatal_err;
@ -1428,6 +1435,7 @@ ssl3_get_server_key_exchange(SSL *s)
}
EVP_MD_CTX_free(md_ctx);
free(signed_params);
return (1);
@ -1439,7 +1447,9 @@ ssl3_get_server_key_exchange(SSL *s)
ssl3_send_alert(s, SSL3_AL_FATAL, al);
err:
CBB_cleanup(&cbb);
EVP_MD_CTX_free(md_ctx);
free(signed_params);
return (-1);
}
@ -2125,12 +2135,7 @@ ssl3_send_client_verify_sigalgs(SSL *s, EVP_PKEY *pkey,
SSLerror(s, ERR_R_EVP_LIB);
goto err;
}
if (!EVP_DigestSignUpdate(mctx, hdata, hdata_len)) {
SSLerror(s, ERR_R_EVP_LIB);
goto err;
}
if (!EVP_DigestSignFinal(mctx, NULL, &signature_len) ||
signature_len == 0) {
if (!EVP_DigestSign(mctx, NULL, &signature_len, hdata, hdata_len)) {
SSLerror(s, ERR_R_EVP_LIB);
goto err;
}
@ -2138,7 +2143,7 @@ ssl3_send_client_verify_sigalgs(SSL *s, EVP_PKEY *pkey,
SSLerror(s, ERR_R_MALLOC_FAILURE);
goto err;
}
if (!EVP_DigestSignFinal(mctx, signature, &signature_len)) {
if (!EVP_DigestSign(mctx, signature, &signature_len, hdata, hdata_len)) {
SSLerror(s, ERR_R_EVP_LIB);
goto err;
}
@ -2267,12 +2272,7 @@ ssl3_send_client_verify_gost(SSL *s, EVP_PKEY *pkey, CBB *cert_verify)
SSLerror(s, ERR_R_EVP_LIB);
goto err;
}
if (!EVP_DigestSignUpdate(mctx, hdata, hdata_len)) {
SSLerror(s, ERR_R_EVP_LIB);
goto err;
}
if (!EVP_DigestSignFinal(mctx, NULL, &signature_len) ||
signature_len == 0) {
if (!EVP_DigestSign(mctx, NULL, &signature_len, hdata, hdata_len)) {
SSLerror(s, ERR_R_EVP_LIB);
goto err;
}
@ -2280,7 +2280,7 @@ ssl3_send_client_verify_gost(SSL *s, EVP_PKEY *pkey, CBB *cert_verify)
SSLerror(s, ERR_R_MALLOC_FAILURE);
goto err;
}
if (!EVP_DigestSignFinal(mctx, signature, &signature_len)) {
if (!EVP_DigestSign(mctx, signature, &signature_len, hdata, hdata_len)) {
SSLerror(s, ERR_R_EVP_LIB);
goto err;
}

74
lib/libssl/ssl_srvr.c
View File

@ -1,4 +1,4 @@
/* $OpenBSD: ssl_srvr.c,v 1.153 2022/12/26 07:31:44 jmc Exp $ */
/* $OpenBSD: ssl_srvr.c,v 1.155 2023/06/11 19:01:01 tb Exp $ */
/* Copyright (C) 1995-1998 Eric Young (eay@cryptsoft.com)
* All rights reserved.
*
@ -1431,12 +1431,13 @@ ssl3_send_server_kex_ecdhe(SSL *s, CBB *cbb)
static int
ssl3_send_server_key_exchange(SSL *s)
{
CBB cbb, cbb_params, cbb_signature, server_kex;
CBB cbb, cbb_signature, cbb_signed_params, server_kex;
CBS params;
const struct ssl_sigalg *sigalg = NULL;
unsigned char *signed_params = NULL;
size_t signed_params_len;
unsigned char *signature = NULL;
size_t signature_len = 0;
unsigned char *params = NULL;
size_t params_len;
const EVP_MD *md = NULL;
unsigned long type;
EVP_MD_CTX *md_ctx = NULL;
@ -1445,7 +1446,7 @@ ssl3_send_server_key_exchange(SSL *s)
int al;
memset(&cbb, 0, sizeof(cbb));
memset(&cbb_params, 0, sizeof(cbb_params));
memset(&cbb_signed_params, 0, sizeof(cbb_signed_params));
if ((md_ctx = EVP_MD_CTX_new()) == NULL)
goto err;
@ -1456,15 +1457,26 @@ ssl3_send_server_key_exchange(SSL *s)
SSL3_MT_SERVER_KEY_EXCHANGE))
goto err;
if (!CBB_init(&cbb_params, 0))
if (!CBB_init(&cbb_signed_params, 0))
goto err;
if (!CBB_add_bytes(&cbb_signed_params, s->s3->client_random,
SSL3_RANDOM_SIZE)) {
SSLerror(s, ERR_R_INTERNAL_ERROR);
goto err;
}
if (!CBB_add_bytes(&cbb_signed_params, s->s3->server_random,
SSL3_RANDOM_SIZE)) {
SSLerror(s, ERR_R_INTERNAL_ERROR);
goto err;
}
type = s->s3->hs.cipher->algorithm_mkey;
if (type & SSL_kDHE) {
if (!ssl3_send_server_kex_dhe(s, &cbb_params))
if (!ssl3_send_server_kex_dhe(s, &cbb_signed_params))
goto err;
} else if (type & SSL_kECDHE) {
if (!ssl3_send_server_kex_ecdhe(s, &cbb_params))
if (!ssl3_send_server_kex_ecdhe(s, &cbb_signed_params))
goto err;
} else {
al = SSL_AD_HANDSHAKE_FAILURE;
@ -1472,10 +1484,16 @@ ssl3_send_server_key_exchange(SSL *s)
goto fatal_err;
}
if (!CBB_finish(&cbb_params, &params, &params_len))
if (!CBB_finish(&cbb_signed_params, &signed_params,
&signed_params_len))
goto err;
if (!CBB_add_bytes(&server_kex, params, params_len))
CBS_init(&params, signed_params, signed_params_len);
if (!CBS_skip(&params, 2 * SSL3_RANDOM_SIZE))
goto err;
if (!CBB_add_bytes(&server_kex, CBS_data(&params),
CBS_len(&params)))
goto err;
/* Add signature unless anonymous. */
@ -1507,22 +1525,8 @@ ssl3_send_server_key_exchange(SSL *s)
SSLerror(s, ERR_R_EVP_LIB);
goto err;
}
if (!EVP_DigestSignUpdate(md_ctx, s->s3->client_random,
SSL3_RANDOM_SIZE)) {
SSLerror(s, ERR_R_EVP_LIB);
goto err;
}
if (!EVP_DigestSignUpdate(md_ctx, s->s3->server_random,
SSL3_RANDOM_SIZE)) {
SSLerror(s, ERR_R_EVP_LIB);
goto err;
}
if (!EVP_DigestSignUpdate(md_ctx, params, params_len)) {
SSLerror(s, ERR_R_EVP_LIB);
goto err;
}
if (!EVP_DigestSignFinal(md_ctx, NULL, &signature_len) ||
!signature_len) {
if (!EVP_DigestSign(md_ctx, NULL, &signature_len,
signed_params, signed_params_len)) {
SSLerror(s, ERR_R_EVP_LIB);
goto err;
}
@ -1530,7 +1534,8 @@ ssl3_send_server_key_exchange(SSL *s)
SSLerror(s, ERR_R_MALLOC_FAILURE);
goto err;
}
if (!EVP_DigestSignFinal(md_ctx, signature, &signature_len)) {
if (!EVP_DigestSign(md_ctx, signature, &signature_len,
signed_params, signed_params_len)) {
SSLerror(s, ERR_R_EVP_LIB);
goto err;
}
@ -1550,19 +1555,19 @@ ssl3_send_server_key_exchange(SSL *s)
}
EVP_MD_CTX_free(md_ctx);
free(params);
free(signature);
free(signed_params);
return (ssl3_handshake_write(s));
fatal_err:
ssl3_send_alert(s, SSL3_AL_FATAL, al);
err:
CBB_cleanup(&cbb_params);
CBB_cleanup(&cbb_signed_params);
CBB_cleanup(&cbb);
EVP_MD_CTX_free(md_ctx);
free(params);
free(signature);
free(signed_params);
return (-1);
}
@ -2049,17 +2054,12 @@ ssl3_get_cert_verify(SSL *s)
al = SSL_AD_INTERNAL_ERROR;
goto fatal_err;
}
if (!EVP_DigestVerifyUpdate(mctx, hdata, hdatalen)) {
if (EVP_DigestVerify(mctx, CBS_data(&signature),
CBS_len(&signature), hdata, hdatalen) <= 0) {
SSLerror(s, ERR_R_EVP_LIB);
al = SSL_AD_INTERNAL_ERROR;
goto fatal_err;
}
if (EVP_DigestVerifyFinal(mctx, CBS_data(&signature),
CBS_len(&signature)) <= 0) {
al = SSL_AD_DECRYPT_ERROR;
SSLerror(s, SSL_R_BAD_SIGNATURE);
goto fatal_err;
}
} else if (EVP_PKEY_id(pkey) == EVP_PKEY_RSA) {
RSA *rsa;

16
lib/libssl/tls13_client.c
View File

@ -1,4 +1,4 @@
/* $OpenBSD: tls13_client.c,v 1.101 2022/11/26 16:08:56 tb Exp $ */
/* $OpenBSD: tls13_client.c,v 1.102 2023/06/10 15:34:36 tb Exp $ */
/*
* Copyright (c) 2018, 2019 Joel Sing <jsing@openbsd.org>
*
@ -688,12 +688,8 @@ tls13_server_certificate_verify_recv(struct tls13_ctx *ctx, CBS *cbs)
if (!EVP_PKEY_CTX_set_rsa_pss_saltlen(pctx, -1))
goto err;
}
if (!EVP_DigestVerifyUpdate(mdctx, sig_content, sig_content_len)) {
ctx->alert = TLS13_ALERT_DECRYPT_ERROR;
goto err;
}
if (EVP_DigestVerifyFinal(mdctx, CBS_data(&signature),
CBS_len(&signature)) <= 0) {
if (EVP_DigestVerify(mdctx, CBS_data(&signature), CBS_len(&signature),
sig_content, sig_content_len) <= 0) {
ctx->alert = TLS13_ALERT_DECRYPT_ERROR;
goto err;
}
@ -956,13 +952,11 @@ tls13_client_certificate_verify_send(struct tls13_ctx *ctx, CBB *cbb)
if (!EVP_PKEY_CTX_set_rsa_pss_saltlen(pctx, -1))
goto err;
}
if (!EVP_DigestSignUpdate(mdctx, sig_content, sig_content_len))
goto err;
if (EVP_DigestSignFinal(mdctx, NULL, &sig_len) <= 0)
if (!EVP_DigestSign(mdctx, NULL, &sig_len, sig_content, sig_content_len))
goto err;
if ((sig = calloc(1, sig_len)) == NULL)
goto err;
if (EVP_DigestSignFinal(mdctx, sig, &sig_len) <= 0)
if (!EVP_DigestSign(mdctx, sig, &sig_len, sig_content, sig_content_len))
goto err;
if (!CBB_add_u16(cbb, sigalg->value))

16
lib/libssl/tls13_server.c
View File

@ -1,4 +1,4 @@
/* $OpenBSD: tls13_server.c,v 1.105 2022/11/26 16:08:56 tb Exp $ */
/* $OpenBSD: tls13_server.c,v 1.106 2023/06/10 15:34:36 tb Exp $ */
/*
* Copyright (c) 2019, 2020 Joel Sing <jsing@openbsd.org>
* Copyright (c) 2020 Bob Beck <beck@openbsd.org>
@ -754,13 +754,11 @@ tls13_server_certificate_verify_send(struct tls13_ctx *ctx, CBB *cbb)
if (!EVP_PKEY_CTX_set_rsa_pss_saltlen(pctx, -1))
goto err;
}
if (!EVP_DigestSignUpdate(mdctx, sig_content, sig_content_len))
goto err;
if (EVP_DigestSignFinal(mdctx, NULL, &sig_len) <= 0)
if (!EVP_DigestSign(mdctx, NULL, &sig_len, sig_content, sig_content_len))
goto err;
if ((sig = calloc(1, sig_len)) == NULL)
goto err;
if (EVP_DigestSignFinal(mdctx, sig, &sig_len) <= 0)
if (!EVP_DigestSign(mdctx, sig, &sig_len, sig_content, sig_content_len))
goto err;
if (!CBB_add_u16(cbb, sigalg->value))
@ -999,12 +997,8 @@ tls13_client_certificate_verify_recv(struct tls13_ctx *ctx, CBS *cbs)
if (!EVP_PKEY_CTX_set_rsa_pss_saltlen(pctx, -1))
goto err;
}
if (!EVP_DigestVerifyUpdate(mdctx, sig_content, sig_content_len)) {
ctx->alert = TLS13_ALERT_DECRYPT_ERROR;
goto err;
}
if (EVP_DigestVerifyFinal(mdctx, CBS_data(&signature),
CBS_len(&signature)) <= 0) {
if (EVP_DigestVerify(mdctx, CBS_data(&signature), CBS_len(&signature),
sig_content, sig_content_len) <= 0) {
ctx->alert = TLS13_ALERT_DECRYPT_ERROR;
goto err;
}

4
regress/lib/libssl/tlsfuzzer/tlsfuzzer.py
View File

@ -1,4 +1,4 @@
# $OpenBSD: tlsfuzzer.py,v 1.48 2023/01/06 19:25:20 tb Exp $
# $OpenBSD: tlsfuzzer.py,v 1.49 2023/06/10 05:00:58 tb Exp $
#
# Copyright (c) 2020 Theo Buehler <tb@openbsd.org>
#
@ -428,6 +428,8 @@ tls12_failing_tests = TestGroup("failing TLSv1.2 tests", [
Test("test-aesccm.py"),
# need server to set up alpn
Test("test-alpn-negotiation.py"),
# Failing on TLS_RSA_WITH_AES_128_CBC_SHA because server does not support it.
Test("test-bleichenbacher-timing-pregenerate.py"),
# many tests fail due to unexpected server_name extension
Test("test-bleichenbacher-workaround.py"),

47
regress/usr.bin/pkg-config/Makefile
View File

@ -1,4 +1,4 @@
# $OpenBSD: Makefile,v 1.62 2020/09/15 07:19:31 jasper Exp $
# $OpenBSD: Makefile,v 1.63 2023/06/08 08:57:02 espie Exp $
REGRESS_TARGETS=cmp-vers1-1 \
cmp-vers1-2 \
@ -101,7 +101,12 @@ REGRESS_TARGETS=cmp-vers1-1 \
filter-system-dirs-5 \
filter-system-dirs-6 \
cflags-system-path-1 \
cflags-system-path-2
cflags-system-path-2 \
lib-flags-1 \
lib-flags-2 \
lib-flags-3 \
lib-flags-4 \
PKG_CONFIG?= /usr/bin/pkg-config
PCONFIG = PKG_CONFIG_PATH=${.CURDIR}/pcdir/ ${PKG_CONFIG}
@ -329,7 +334,7 @@ cmp-vers5-10:
cmp-vers6-1:
# Test suffixed versions in Requires
@echo " -lalpha2" > ${WANT}
@echo "-lalpha2" > ${WANT}
@${VPCONFIG} --libs requires-test2
@diff -u ${WANT} ${GOT}
@ -474,7 +479,7 @@ whitespace-libs:
whitespace-linebreak:
# Test linebreak in Description field
@echo " -lc" > ${WANT}
@echo "-lc" > ${WANT}
@${VPCONFIG} --libs linebreak
@diff -u ${WANT} ${GOT}
@ -631,19 +636,19 @@ variables-4:
variables-5:
# Test --variable
@echo ' -lfoo-1' > ${WANT}
@echo '-lfoo-1' > ${WANT}
@${VPCONFIG} --libs variables
@diff -u ${WANT} ${GOT}
variables-6:
# Test variable overriding from environment
@echo ' -lfoo-2' > ${WANT}
@echo '-lfoo-2' > ${WANT}
@PKG_CONFIG_VARIABLES_FOO_API_VERSION=2 ${VPCONFIG} --libs variables
@diff -u ${WANT} ${GOT}
variables-7:
# Ensure variable overriding only uses uppercase keys
@echo ' -lfoo-1' > ${WANT}
@echo '-lfoo-1' > ${WANT}
@PKG_CONFIG_variables_foo_api_version=2 ${VPCONFIG} --libs variables
@diff -u ${WANT} ${GOT}
@ -655,13 +660,13 @@ filter-system-dirs-1:
filter-system-dirs-2:
# Test removing -L/usr/lib as a system directory
@echo ' -lfilter' > ${WANT}
@echo '-lfilter' > ${WANT}
@${VPCONFIG} --libs filter
@diff -u ${WANT} ${GOT}
filter-system-dirs-3:
# Test removing -L/usr/lib as a system directory (static)
@echo ' -lfilter -lprivate-filter' > ${WANT}
@echo '-lfilter -lprivate-filter' > ${WANT}
@${VPCONFIG} --static --libs filter
@diff -u ${WANT} ${GOT}
@ -698,6 +703,30 @@ cflags-system-path-2:
clean:
rm -f *.want *.got
lib-flags-1:
# Test --libs-only-other
@echo "-pthread" > ${WANT}
@${VPCONFIG} --libs-only-other lib-flags
@diff -u ${WANT} ${GOT}
lib-flags-2:
# Test --libs
@echo "-L/usr/local/lib -pthread -lalpha2" > ${WANT}
@${VPCONFIG} --libs lib-flags
@diff -u ${WANT} ${GOT}
lib-flags-3:
# Test --libs-only-L
@echo "-L/usr/local/lib" > ${WANT}
@${VPCONFIG} --libs-only-L lib-flags
@diff -u ${WANT} ${GOT}
lib-flags-4:
# Test --libs-only-l
@echo "-lalpha2" > ${WANT}
@${VPCONFIG} --libs-only-l lib-flags
@diff -u ${WANT} ${GOT}
.PHONY: ${REGRESS_TARGETS}
.include <bsd.regress.mk>

4
regress/usr.bin/pkg-config/pcdir/lib-flags.pc Normal file
View File

@ -0,0 +1,4 @@
Name: lib separation test
Description: pkg-config(1) regress file
Version: 0.0
Libs: -lalpha2 -L/usr/local/lib -pthread

8
sbin/ifconfig/ifconfig.8
View File

@ -1,4 +1,4 @@
.\" $OpenBSD: ifconfig.8,v 1.396 2023/06/01 18:57:53 kn Exp $
.\" $OpenBSD: ifconfig.8,v 1.397 2023/06/07 18:42:40 bluhm Exp $
.\" $NetBSD: ifconfig.8,v 1.11 1996/01/04 21:27:29 pk Exp $
.\" $FreeBSD: ifconfig.8,v 1.16 1998/02/01 07:03:29 steve Exp $
.\"
@ -31,7 +31,7 @@
.\"
.\" @(#)ifconfig.8 8.4 (Berkeley) 6/1/94
.\"
.Dd $Mdocdate: June 1 2023 $
.Dd $Mdocdate: June 7 2023 $
.Dt IFCONFIG 8
.Os
.Sh NAME
@ -501,7 +501,7 @@ Query and display information and diagnostics from GBIC and SFP
modules installed in an interface.
It is only supported by drivers implementing the necessary functionality
on hardware which supports it.
.It Cm tcprecvoffload
.It Cm tcplro
Enable TCP large receive offload (LRO) if it's supported by the hardware; see
.Cm hwfeatures .
LRO enabled network interfaces modify received TCP/IP packets.
@ -517,7 +517,7 @@ It is not possible to use LRO with interfaces attached to a
or
.Xr tpmr 4 .
Changing this option will re-initialize the network interface.
.It Cm -tcprecvoffload
.It Cm -tcplro
Disable LRO.
LRO is disabled by default.
.It Cm up

7
sbin/ifconfig/ifconfig.c
View File

@ -1,4 +1,4 @@
/* $OpenBSD: ifconfig.c,v 1.465 2023/06/01 18:57:54 kn Exp $ */
/* $OpenBSD: ifconfig.c,v 1.467 2023/06/09 12:22:01 kn Exp $ */
/* $NetBSD: ifconfig.c,v 1.40 1997/10/01 02:19:43 enami Exp $ */
/*
@ -471,8 +471,8 @@ const struct cmd {
{ "-soii", IFXF_INET6_NOSOII, 0, setifxflags },
{ "monitor", IFXF_MONITOR, 0, setifxflags },
{ "-monitor", -IFXF_MONITOR, 0, setifxflags },
{ "tcprecvoffload", IFXF_LRO, 0, setifxflags },
{ "-tcprecvoffload", -IFXF_LRO, 0, setifxflags },
{ "tcplro", IFXF_LRO, 0, setifxflags },
{ "-tcplro", -IFXF_LRO, 0, setifxflags },
#ifndef SMALL
{ "hwfeatures", NEXTARG0, 0, printifhwfeatures },
{ "metric", NEXTARG, 0, setifmetric },
@ -631,6 +631,7 @@ const struct cmd {
{ "wgkey", NEXTARG, A_WIREGUARD, setwgkey},
{ "wgrtable", NEXTARG, A_WIREGUARD, setwgrtable},
{ "-wgpeer", NEXTARG, A_WIREGUARD, unsetwgpeer},
{ "-wgpsk", 0, A_WIREGUARD, unsetwgpeerpsk},
{ "-wgdescription", 0, A_WIREGUARD, unsetwgpeerdesc},
{ "-wgdescr", 0, A_WIREGUARD, unsetwgpeerdesc},
{ "-wgpeerall", 0, A_WIREGUARD, unsetwgpeerall},

12
sys/arch/arm64/arm64/cpu.c
View File

@ -1,4 +1,4 @@
/* $OpenBSD: cpu.c,v 1.92 2023/05/30 08:30:00 jsg Exp $ */
/* $OpenBSD: cpu.c,v 1.94 2023/06/11 21:42:01 kettenis Exp $ */
/*
* Copyright (c) 2016 Dale Rahn <drahn@dalerahn.com>
@ -944,6 +944,7 @@ cpu_init(void)
{
uint64_t id_aa64mmfr1, sctlr;
uint64_t id_aa64pfr0;
uint64_t id_aa64isar1;
uint64_t tcr;
WRITE_SPECIALREG(ttbr0_el1, pmap_kernel()->pm_pt0pa);
@ -968,6 +969,15 @@ cpu_init(void)
if (ID_AA64PFR0_DIT(id_aa64pfr0) >= ID_AA64PFR0_DIT_IMPL)
__asm volatile (".arch armv8.4-a; msr dit, #1");
/* Enable PAuth. */
id_aa64isar1 = READ_SPECIALREG(id_aa64isar1_el1);
if (ID_AA64ISAR1_API(id_aa64isar1) >= ID_AA64ISAR1_API_BASE) {
sctlr = READ_SPECIALREG(sctlr_el1);
sctlr |= SCTLR_EnIA | SCTLR_EnDA;
sctlr |= SCTLR_EnIB | SCTLR_EnDB;
WRITE_SPECIALREG(sctlr_el1, sctlr);
}
/* Initialize debug registers. */
WRITE_SPECIALREG(mdscr_el1, DBG_MDSCR_TDCC);
WRITE_SPECIALREG(oslar_el1, 0);

19
sys/arch/arm64/arm64/machdep.c
View File

@ -1,4 +1,4 @@
/* $OpenBSD: machdep.c,v 1.81 2023/04/24 10:22:48 kettenis Exp $ */
/* $OpenBSD: machdep.c,v 1.82 2023/06/10 19:30:48 kettenis Exp $ */
/*
* Copyright (c) 2014 Patrick Wildt <patrick@blueri.se>
* Copyright (c) 2021 Mark Kettenis <kettenis@openbsd.org>
@ -314,11 +314,6 @@ cpu_switchto(struct proc *old, struct proc *new)
cpu_switchto_asm(old, new);
}
extern uint64_t cpu_id_aa64isar0;
extern uint64_t cpu_id_aa64isar1;
extern uint64_t cpu_id_aa64pfr0;
extern uint64_t cpu_id_aa64pfr1;
/*
* machine dependent system variables.
*/
@ -451,13 +446,21 @@ void
setregs(struct proc *p, struct exec_package *pack, u_long stack,
struct ps_strings *arginfo)
{
struct pmap *pm = p->p_vmspace->vm_map.pmap;
struct pcb *pcb = &p->p_addr->u_pcb;
struct trapframe *tf = pcb->pcb_tf;
if (pack->ep_flags & EXEC_NOBTCFI)
p->p_vmspace->vm_map.pmap->pm_guarded = 0;
pm->pm_guarded = 0;
else
p->p_vmspace->vm_map.pmap->pm_guarded = ATTR_GP;
pm->pm_guarded = ATTR_GP;
arc4random_buf(&pm->pm_apiakey, sizeof(pm->pm_apiakey));
arc4random_buf(&pm->pm_apdakey, sizeof(pm->pm_apdakey));
arc4random_buf(&pm->pm_apibkey, sizeof(pm->pm_apibkey));
arc4random_buf(&pm->pm_apdbkey, sizeof(pm->pm_apdbkey));
arc4random_buf(&pm->pm_apgakey, sizeof(pm->pm_apgakey));
pmap_setpauthkeys(pm);
/* If we were using the FPU, forget about it. */
memset(&pcb->pcb_fpstate, 0, sizeof(pcb->pcb_fpstate));

35
sys/arch/arm64/arm64/pmap.c
View File

@ -1,4 +1,4 @@
/* $OpenBSD: pmap.c,v 1.96 2023/04/16 11:14:26 kettenis Exp $ */
/* $OpenBSD: pmap.c,v 1.98 2023/06/11 21:42:01 kettenis Exp $ */
/*
* Copyright (c) 2008-2009,2014-2016 Dale Rahn <drahn@dalerahn.com>
*
@ -2228,6 +2228,36 @@ pmap_show_mapping(uint64_t va)
pted, vp3->l3[VP_IDX3(va)], VP_IDX3(va)*8);
}
void
pmap_setpauthkeys(struct pmap *pm)
{
if (ID_AA64ISAR1_API(cpu_id_aa64isar1) >= ID_AA64ISAR1_API_BASE) {
__asm volatile (".arch armv8.3-a; msr apiakeylo_el1, %0"
:: "r"(pm->pm_apiakey[0]));
__asm volatile (".arch armv8.3-a; msr apiakeyhi_el1, %0"
:: "r"(pm->pm_apiakey[1]));
__asm volatile (".arch armv8.3-a; msr apdakeylo_el1, %0"
:: "r"(pm->pm_apdakey[0]));
__asm volatile (".arch armv8.3-a; msr apdakeyhi_el1, %0"
:: "r"(pm->pm_apdakey[1]));
__asm volatile (".arch armv8.3-a; msr apibkeylo_el1, %0"
:: "r"(pm->pm_apibkey[0]));
__asm volatile (".arch armv8.3-a; msr apibkeyhi_el1, %0"
:: "r"(pm->pm_apibkey[1]));
__asm volatile (".arch armv8.3-a; msr apdbkeylo_el1, %0"
:: "r"(pm->pm_apdbkey[0]));
__asm volatile (".arch armv8.3-a; msr apdbkeyhi_el1, %0"
:: "r"(pm->pm_apdbkey[1]));
}
if (ID_AA64ISAR1_GPI(cpu_id_aa64isar1) >= ID_AA64ISAR1_GPI_IMPL) {
__asm volatile (".arch armv8.3-a; msr apgakeylo_el1, %0"
:: "r"(pm->pm_apgakey[0]));
__asm volatile (".arch armv8.3-a; msr apgakeyhi_el1, %0"
:: "r"(pm->pm_apgakey[1]));
}
}
void
pmap_setttb(struct proc *p)
{
@ -2244,6 +2274,9 @@ pmap_setttb(struct proc *p)
(pm->pm_asid & ~PMAP_ASID_MASK) != pmap_asid_gen)
pmap_allocate_asid(pm);
if (pm != pmap_kernel())
pmap_setpauthkeys(pm);
WRITE_SPECIALREG(ttbr0_el1, pmap_kernel()->pm_pt0pa);
__asm volatile("isb");
cpu_setttb(pm->pm_asid, pm->pm_pt0pa);

8
sys/arch/arm64/arm64/process_machdep.c
View File

@ -1,4 +1,4 @@
/* $OpenBSD: process_machdep.c,v 1.7 2023/04/16 10:14:59 kettenis Exp $ */
/* $OpenBSD: process_machdep.c,v 1.8 2023/06/10 19:30:48 kettenis Exp $ */
/*
* Copyright (c) 2014 Patrick Wildt <patrick@blueri.se>
*
@ -136,3 +136,9 @@ process_set_pc(struct proc *p, caddr_t addr)
}
#endif /* PTRACE */
register_t
process_get_pacmask(struct proc *p)
{
return (-1ULL << USER_SPACE_BITS);
}

9
sys/arch/arm64/arm64/trap.c
View File

@ -1,4 +1,4 @@
/* $OpenBSD: trap.c,v 1.45 2023/05/15 15:02:06 kettenis Exp $ */
/* $OpenBSD: trap.c,v 1.46 2023/06/10 19:30:48 kettenis Exp $ */
/*-
* Copyright (c) 2014 Andrew Turner
* All rights reserved.
@ -220,6 +220,8 @@ do_el1h_sync(struct trapframe *frame)
panic("FP exception in the kernel");
case EXCP_BRANCH_TGT:
panic("Branch target exception in the kernel");
case EXCP_FPAC:
panic("Faulting PAC trap in kernel");
case EXCP_INSN_ABORT:
kdata_abort(frame, esr, far, 1);
break;
@ -286,6 +288,11 @@ do_el0_sync(struct trapframe *frame)
sv.sival_ptr = (void *)frame->tf_elr;
trapsignal(p, SIGILL, esr, ILL_ILLOPC, sv);
break;
case EXCP_FPAC:
curcpu()->ci_flush_bp();
sv.sival_ptr = (void *)frame->tf_elr;
trapsignal(p, SIGILL, esr, ILL_ILLOPC, sv);
break;
case EXCP_SVC:
svc_handler(frame);
break;

10
sys/arch/arm64/arm64/vm_machdep.c
View File

@ -1,4 +1,4 @@
/* $OpenBSD: vm_machdep.c,v 1.11 2023/04/11 00:45:07 jsg Exp $ */
/* $OpenBSD: vm_machdep.c,v 1.12 2023/06/10 19:30:48 kettenis Exp $ */
/* $NetBSD: vm_machdep.c,v 1.1 2003/04/26 18:39:33 fvdl Exp $ */
/*-
@ -69,11 +69,19 @@ void
cpu_fork(struct proc *p1, struct proc *p2, void *stack, void *tcb,
void (*func)(void *), void *arg)
{
struct pmap *pm = p2->p_vmspace->vm_map.pmap;
struct pmap *pm1 = p1->p_vmspace->vm_map.pmap;
struct pcb *pcb = &p2->p_addr->u_pcb;
struct pcb *pcb1 = &p1->p_addr->u_pcb;
struct trapframe *tf;
struct switchframe *sf;
memcpy(pm->pm_apiakey, pm1->pm_apiakey, sizeof(pm->pm_apiakey));
memcpy(pm->pm_apdakey, pm1->pm_apdakey, sizeof(pm->pm_apdakey));
memcpy(pm->pm_apibkey, pm1->pm_apibkey, sizeof(pm->pm_apibkey));
memcpy(pm->pm_apdbkey, pm1->pm_apdbkey, sizeof(pm->pm_apdbkey));
memcpy(pm->pm_apgakey, pm1->pm_apgakey, sizeof(pm->pm_apgakey));
/* Save FPU state to PCB if necessary. */
if (pcb1->pcb_flags & PCB_FPU)
fpu_save(p1);

3
sys/arch/arm64/conf/GENERIC
View File

@ -1,4 +1,4 @@
# $OpenBSD: GENERIC,v 1.272 2023/05/23 14:10:27 patrick Exp $
# $OpenBSD: GENERIC,v 1.273 2023/06/10 18:31:38 patrick Exp $
#
# GENERIC machine description file
#
@ -332,6 +332,7 @@ qciic* at fdt?
iic* at qciic?
qcipcc* at fdt?
qcmtx* at fdt? early 1
qcpas* at fdt?
qcpdc* at fdt?
qcscm* at fdt?
qcsmem* at fdt?

3
sys/arch/arm64/conf/RAMDISK
View File

@ -1,4 +1,4 @@
# $OpenBSD: RAMDISK,v 1.205 2023/05/23 14:10:27 patrick Exp $
# $OpenBSD: RAMDISK,v 1.206 2023/06/10 18:31:38 patrick Exp $
machine arm64
maxusers 4
@ -256,6 +256,7 @@ qciic* at fdt?
iic* at qciic?
qcipcc* at fdt?
qcmtx* at fdt? early 1
qcpas* at fdt?
qcpdc* at fdt?
qcscm* at fdt?
qcsmem* at fdt?

7
sys/arch/arm64/include/armreg.h
View File

@ -1,4 +1,4 @@
/* $OpenBSD: armreg.h,v 1.28 2023/04/16 10:14:59 kettenis Exp $ */
/* $OpenBSD: armreg.h,v 1.29 2023/06/10 19:30:48 kettenis Exp $ */
/*-
* Copyright (c) 2013, 2014 Andrew Turner
* Copyright (c) 2015 The FreeBSD Foundation
@ -169,6 +169,7 @@
#define EXCP_ILL_STATE 0x0e /* Illegal execution state */
#define EXCP_SVC 0x15 /* SVC trap */
#define EXCP_MSR 0x18 /* MSR/MRS trap */
#define EXCP_FPAC 0x1c /* Faulting PAC trap */
#define EXCP_INSN_ABORT_L 0x20 /* Instruction abort, from lower EL */
#define EXCP_INSN_ABORT 0x21 /* Instruction abort, from same EL */
#define EXCP_PC_ALIGN 0x22 /* PC alignment fault */
@ -642,6 +643,7 @@
#define SCTLR_SED 0x0000000000000100
#define SCTLR_UMA 0x0000000000000200
#define SCTLR_I 0x0000000000001000
#define SCTLR_EnDB 0x0000000000002000
#define SCTLR_DZE 0x0000000000004000
#define SCTLR_UCT 0x0000000000008000
#define SCTLR_nTWI 0x0000000000010000
@ -651,6 +653,9 @@
#define SCTLR_EOE 0x0000000001000000
#define SCTLR_EE 0x0000000002000000
#define SCTLR_UCI 0x0000000004000000
#define SCTLR_EnDA 0x0000000008000000
#define SCTLR_EnIB 0x0000000040000000
#define SCTLR_EnIA 0x0000000080000000
/* SPSR_EL1 */
/*

7
sys/arch/arm64/include/cpu.h
View File

@ -1,4 +1,4 @@
/* $OpenBSD: cpu.h,v 1.35 2023/02/19 17:16:13 kettenis Exp $ */
/* $OpenBSD: cpu.h,v 1.36 2023/06/10 19:30:48 kettenis Exp $ */
/*
* Copyright (c) 2016 Dale Rahn <drahn@dalerahn.com>
*
@ -61,6 +61,11 @@
* Kernel-only definitions
*/
extern uint64_t cpu_id_aa64isar0;
extern uint64_t cpu_id_aa64isar1;
extern uint64_t cpu_id_aa64pfr0;
extern uint64_t cpu_id_aa64pfr1;
#include <machine/intr.h>
#include <machine/frame.h>
#include <machine/armreg.h>

9
sys/arch/arm64/include/pmap.h
View File

@ -1,4 +1,4 @@
/* $OpenBSD: pmap.h,v 1.23 2023/04/16 11:14:26 kettenis Exp $ */
/* $OpenBSD: pmap.h,v 1.24 2023/06/10 19:30:48 kettenis Exp $ */
/*
* Copyright (c) 2008,2009,2014 Dale Rahn <drahn@dalerahn.com>
*
@ -71,6 +71,11 @@ struct pmap {
int pm_privileged;
int pm_refs; /* ref count */
struct pmap_statistics pm_stats; /* pmap statistics */
uint64_t pm_apiakey[2];
uint64_t pm_apdakey[2];
uint64_t pm_apibkey[2];
uint64_t pm_apdbkey[2];
uint64_t pm_apgakey[2];
};
#define PMAP_PA_MASK ~((paddr_t)PAGE_MASK) /* to remove the flags */
@ -100,6 +105,8 @@ void pmap_kenter_cache(vaddr_t va, paddr_t pa, vm_prot_t prot, int cacheable);
void pmap_page_ro(pmap_t pm, vaddr_t va, vm_prot_t prot);
void pmap_page_rw(pmap_t pm, vaddr_t va);
void pmap_setpauthkeys(struct pmap *);
paddr_t pmap_steal_avail(size_t size, int align, void **kva);
void pmap_avail_fixup(void);
void pmap_physload_avail(void);

7
sys/arch/arm64/include/ptrace.h
View File

@ -1,4 +1,4 @@
/* $OpenBSD: ptrace.h,v 1.1 2016/12/17 23:38:33 patrick Exp $ */
/* $OpenBSD: ptrace.h,v 1.2 2023/06/10 19:30:48 kettenis Exp $ */
/*
* Copyright (c) 2014 Patrick Wildt <patrick@blueri.se>
*
@ -20,3 +20,8 @@
#define PT_SETREGS (PT_FIRSTMACH + 2)
#define PT_GETFPREGS (PT_FIRSTMACH + 3)
#define PT_SETFPREGS (PT_FIRSTMACH + 4)
#define PT_PACMASK (PT_FIRSTMACH + 5)
#ifdef _KERNEL
register_t process_get_pacmask(struct proc *p);
#endif

50
sys/arch/hppa/Makefile
View File

@ -1,50 +0,0 @@
# $OpenBSD: Makefile,v 1.13 2017/01/22 03:27:31 tb Exp $
.include <bsd.own.mk> # for KEEPKERNELS
S= ${.CURDIR}/../..
KFILE= GENERIC
.if exists(conf/GENERIC.MP)
KFILE= GENERIC.MP
.endif
TDIRS= ${_arch} include gsc spmath
TAGS= ${.CURDIR}/tags
NOPROG=
NOMAN=
NOOBJ=
SUBDIR= stand
.if !defined(KEEPKERNELS) || !(make(clean) || make(cleandir))
SUBDIR+=compile
.endif
# config the fattest kernel we can find into a temporary dir
# to create a Makefile. Then use make to pull some variables
# out and push them into the sub-shell to expand the paths,
# and finally run ctags.
tags::
TDIR=`mktemp -d /tmp/_tagXXXXXXXXXX` || exit 1; \
eval "S=${S}" && \
config -s ${S} -b $${TDIR} ${.CURDIR}/conf/${KFILE} && \
eval "_arch=\"`make -V _arch -f $${TDIR}/Makefile`\"" && \
eval "_mach=\"`make -V _mach -f $${TDIR}/Makefile`\"" && \
eval "_machdir=\$S/arch/$${_mach}" && \
eval "_archdir=\$S/arch/$${_arch}" && \
eval "HFILES=\"`find $S \( -path $S/'arch' -o -path $S/stand -o -path $S/lib/libsa -o -path $S'/lib/libkern/arch' \) -prune -o -name '*.h'; find $${_machdir} $${_archdir} $S/lib/libkern/arch/$${_mach} \( -name boot -o -name stand \) -prune -o -name '*.h'`\"" && \
eval "SFILES=\"`make -V SFILES -f $${TDIR}/Makefile`\"" && \
eval "CFILES=\"`make -V CFILES -f $${TDIR}/Makefile`\"" && \
eval "AFILES=\"`make -V AFILES -f $${TDIR}/Makefile`\"" && \
ctags -wd -f ${TAGS} $${CFILES} $${HFILES} && \
egrep "^[_A-Z]*ENTRY[_A-Z]*\(.*\)" $${SFILES} $${AFILES} | \
sed "s;\\([^:]*\\):\\([^(]*\\)(\\([^, )]*\\)\\(.*\\);\\3 \\1 /^\\2(\\3\\4$$/;" \
>> ${TAGS} && \
sort -o ${TAGS} ${TAGS} && \
rm -rf $${TDIR}
links:
-for i in conf ${TDIRS}; do \
(cd $$i && rm -f tags; ln -s tags tags); done
obj: _SUBDIRUSE
.include <bsd.prog.mk>

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sys/arch/hppa/compile/GENERIC.MP/Makefile
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.include "../Makefile.inc"

1
sys/arch/hppa/compile/GENERIC/Makefile
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.include "../Makefile.inc"

7
sys/arch/hppa/compile/Makefile
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# $OpenBSD: Makefile,v 1.2 2016/10/15 13:45:08 deraadt Exp $
.if make(obj) || make(clean) || make(cleandir)
SUBDIR!=find . -type d -maxdepth 1 \! \( -name . -o -name CVS \) | cut -b3-
.endif
.include <bsd.subdir.mk>

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sys/arch/hppa/compile/Makefile.inc
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SYSDIR != cd ${.CURDIR}/../../../..; pwd
CONFDIR != cd ${.CURDIR}/../../conf; pwd
.if ${.CURDIR} == ${.OBJDIR}
.PHONY: config
config:
@echo make obj required first >&2
@false
.else
.PHONY: config clean
config:
config ${.CURDIR:M*.PROF:C/.*/-p/} -b ${.OBJDIR} \
-s ${SYSDIR} ${CONFDIR}/${.CURDIR:T:S/.PROF$//}
.endif
cleandir clean:
.include <bsd.obj.mk>

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.include "../Makefile.inc"

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sys/arch/hppa/conf/GENERIC
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# $OpenBSD: GENERIC,v 1.184 2022/01/02 05:37:19 jsg Exp $
#
# For further information on compiling OpenBSD kernels, see the config(8)
# man page.
#
# For further information on hardware support for this architecture, see
# the intro(4) man page. For further information about kernel options
# for this architecture, see the options(4) man page. For an explanation
# of each device driver in this file see the section 4 man page for the
# device.
machine hppa
include "../../../conf/GENERIC"
maxusers 80 # estimated number of users
# Support for various CPU types
option HP7000_CPU # PCXS
option HP7100_CPU # PCXT
option HP7200_CPU # PCXT'
option HP7100LC_CPU # PCXL
option HP7300LC_CPU # PCXL2
option HP8000_CPU # PCXU (in 32bit mode)
option HP8200_CPU # PCXU2 (in 32bit mode)
option HP8500_CPU # PCXW (in 32bit mode)
option HP8700_CPU # PCXW2 (in 32bit mode)
#option USE_HPT
option FPEMUL
option USELEDS # blink 'em
option USER_PCICONF # user-space PCI configuration
option WSDISPLAY_COMPAT_RAWKBD # provide raw scancodes; needed for X11
config bsd swap generic
mainbus0 at root # root bus
mem* at mainbus0 flags 0x0000 # /dev/*mem and memory controller
pdc0 at mainbus0 # PDC/IODC wrapper for boot console
power0 at mainbus0 # power/fail manager (iv 30)
lcd0 at mainbus0 # LCD
cpu0 at mainbus0 irq 31 # HP PA-RISC cpu
#fpu* at mainbus0 # HP PA-RISC fpu (iv N/A)
#pmu* at mainbus0 irq 29 # HP PA-RISC performance monitor unit
phantomas0 at mainbus0 # Phantom PseudoBC GSC+ Port
uturn0 at mainbus0 # U2/UTurn Runway IOA
uturn1 at mainbus0
astro* at mainbus0 # Astro memory & I/O controller
lasi0 at mainbus0 offset 0x100000 # LASI host adapter
lasi0 at mainbus0 offset 0xfd00000 # LASI on C1[01]0, J2[01]0
lasi0 at phantomas0 offset 0xfd00000 # LASI on [AB]*
lasi0 at uturn? offset 0xfd00000 # LASI on [CJ]*
lasi1 at mainbus0 offset 0x500000 # 712 GIO card
asp* at mainbus0 # this one comes w/ Viper and LEDs
wax* at mainbus0 # Wax may host EISA as well
wax* at phantomas0 # Wax on [AB]*
wax* at uturn? # Wax on C*
mongoose* at mainbus0 irq 17 # EISA Bus Adapter (i82350 or TI???)
#vmeb* at mainbus0 irq ? # VME bus adapter
dino* at phantomas? # PCI bus bridge on [AB]*
dino* at uturn? # PCI bus bridge on [CJ]*
pci* at dino?
option PCIVERBOSE
#pckbc0 at dino? irq 9
com1 at dino? irq 11
elroy* at astro?
pci* at elroy?
ppb* at pci?
pci* at ppb?
ssio* at pci?
com0 at ssio? irq 4
com1 at ssio? irq 3
lpt0 at ssio?
# CardBus bus support
cbb* at pci?
cardslot* at cbb?
cardbus* at cardslot?
option PCMCIAVERBOSE
pcmcia* at cardslot?
# PCI USB Controllers
ehci* at pci? # Enhanced Host Controller
ehci* at cardbus?
ohci* at pci? # Open Host Controller
ohci* at cardbus?
uhci* at pci? # Universal Host Controller (Intel)
# USB bus support
usb* at ehci?
usb* at uhci?
usb* at ohci?
# USB devices
uhub* at usb? # USB Hubs
uhub* at uhub? # USB Hubs
uftdi* at uhub? # FTDI FT8U100AX serial adapter
ucom* at uftdi?
uplcom* at uhub? # I/O DATA USB-RSAQ2 serial adapter
ucom* at uplcom?
uark* at uhub? # Arkmicro ARK3116 serial
ucom* at uark?
umass* at uhub? # USB Mass Storage devices
uhidev* at uhub? # Human Interface Devices
ums* at uhidev? # USB mouse
wsmouse* at ums? mux 0
ukbd* at uhidev? # USB keyboard
wskbd* at ukbd? mux 1
uhid* at uhidev? # USB generic HID support
fido* at uhidev? # FIDO/U2F security key support
ucc* at uhidev? # Consumer Control keyboards
wskbd* at ucc? mux 1
ujoy* at uhidev? # USB joystick/gamecontroller support
uhidpp* at uhidev? # Logitech HID++ Devices
upd* at uhidev? # USB Power Devices sensors
aue* at uhub? # ADMtek AN986 Pegasus Ethernet
url* at uhub? # Realtek RTL8150L based adapters
ure* at uhub? # Realtek RTL8152 based adapters
rsu* at uhub? # Realtek RTL8188SU/RTL8191SU/RTL8192SU
# untested USB devices
urng* at uhub? # USB Random Number Generator
uonerng* at uhub? # Moonbase Otago OneRNG
umodem* at uhub? # USB Modems/Serial
ucom* at umodem?
uvisor* at uhub? # Handspring Visor
ucom* at uvisor?
uvscom* at uhub? # SUNTAC Slipper U VS-10U serial
ucom* at uvscom?
ubsa* at uhub? # Belkin serial adapter
ucom* at ubsa?
umct* at uhub? # MCT USB-RS232 serial adapter
ucom* at umct?
uslcom* at uhub? # Silicon Laboratories CP210x serial
ucom* at uslcom?
uscom* at uhub? # Simple USB serial adapters
ucom* at uscom?
ucrcom* at uhub? # Chromebook serial
ucom* at ucrcom?
uipaq* at uhub? # iPAQ serial adapter
ucom* at uipaq?
umsm* at uhub? # Qualcomm MSM EVDO
ucom* at umsm?
ucycom* at uhidev? # Cypress serial
ucom* at ucycom?
uslhcom* at uhidev? # Silicon Labs CP2110 USB HID UART
ucom* at uslhcom?
uchcom* at uhub? # WinChipHead CH341/340 serial
ucom* at uchcom?
uaudio* at uhub? # USB Audio
audio* at uaudio?
umidi* at uhub? # USB MIDI
midi* at umidi?
ulpt* at uhub? # USB Printers
atu* at uhub? # Atmel AT76c50x based 802.11b
axe* at uhub? # ASIX Electronics AX88172 USB Ethernet
axen* at uhub? # ASIX Electronics AX88179 USB Ethernet
cue* at uhub? # CATC USB-EL1201A based Ethernet
kue* at uhub? # Kawasaki KL5KUSB101B based Ethernet
smsc* at uhub? # SMSC LAN95xx Ethernet
cdce* at uhub? # CDC Ethernet
urndis* at uhub? # Remote NDIS Ethernet
udav* at uhub? # Davicom DM9601 based Ethernet
upl* at uhub? # Prolific PL2301/PL2302 host-to-host `network'
ugl* at uhub? # Genesys Logic GL620USB-A host-to-host `network'
wi* at uhub? # WaveLAN IEEE 802.11DS
udsbr* at uhub? # D-Link DSB-R100 radio
radio* at udsbr? # USB radio
ugen* at uhub? # USB Generic driver
ural* at uhub? # Ralink RT2500USB
rum* at uhub? # Ralink RT2501USB/RT2601USB
run* at uhub? # Ralink RT2700U/RT2800U/RT3000U
zyd* at uhub? # Zydas ZD1211
uthum* at uhidev? # TEMPerHUM sensor
ugold* at uhidev? # gold TEMPer sensor
utwitch* at uhidev? # YUREX BBU sensor
uow* at uhub? # Maxim/Dallas DS2490 1-Wire adapter
onewire* at uow?
udl* at uhub? # DisplayLink USB displays
wsdisplay* at udl?
sti* at mainbus0 # [H]CRX-{8,24,48}[Z] graphics
sti* at phantomas0 # builtin graphics on BC*
sti* at uturn?
sti* at pci? # EG-PCI, FX*
# internal i/o space
gsc0 at asp? # Snakes, old 715, old 725, 735/755
gsc0 at lasi0 # 712,715/100,725/64,725/100,[ABCJ]*
gsc1 at lasi1
gsc2 at wax? # it's another face of LASI
#vme* at vmeb?
#option VMEVERBOSE
eisa* at mongoose?
#eisa* at wax?
option EISAVERBOSE
#isa* at mongoose?
#isa* at wax?
# GSC devices
hil* at gsc? irq 1 # Human Interface Loop, kbd and mouse
hilkbd* at hil? # keyboard, knob and buttons
hilms* at hil? # mouse and tablets
hilid* at hil? # ID module
# RS/232 serial ports
com0 at gsc0 offset 0x5000 irq 5 # on lasi
com1 at gsc1 offset 0x5000 irq 5
com1 at gsc2 offset 0x2000 irq 6 # on wax
com0 at gsc0 offset 0x823000 irq 5 # on asp
com1 at gsc0 offset 0x822000 irq 6
com2 at gsc0 offset 0x0 irq 13 # only on asp0 w/o audio (off ?)
com2 at gsc0 offset 0x4040 irq 13 # gecko's fax/voice/modems
com3 at gsc0 offset 0x4060 irq 13
#com* at pcmcia? # PCMCIA modems
lpt0 at gsc? irq 7 # both com and lpt are on WD16C552
ie0 at gsc0 irq 8 # 82C596DX/CA ether
#ie1 at gsc1 irq 8
#ie* at eisa?
#ie* at isa? port 0x360 iomem 0xd0000 irq 7
#ie* at isa? port 0x300 irq 10
#ie* at pci?
#siop* at gsc? irq 3 # NCR 53C720 (Fast-Wide HVD)
osiop* at gsc? irq 9 # NCR 53C710 (Narrow SE)
#osiop* at eisa?
oosiop* at gsc? irq 9 # NCR 53C700 (Narrow SE)
arcofi* at gsc? irq 13 # Audio Type 1 (PSB2160)
audio* at arcofi?
harmony* at gsc? irq 13 # Audio Type 2 (CS4215/AD1849)
audio* at harmony?
gsckbc* at gsc? irq 26
pckbd* at gsckbc? # PS/2 keyboard
pms* at gsckbc? # PS/2 mouse
#sh* at eisa? # Interphase Seahawk 4811 EISA/FDDI
#ahc* at eisa? # Adaptec 274x, aic7770 SCSI controllers
ahc* at pci? # Adaptec 2940 SCSI controllers
mpi* at pci? # LSI Logic Fusion MPT Message Passing Interface
qlw* at pci? # QLogic ISP SCSI
qla* at pci? # QLogic ISP 2[123]xx FibreChannel
qle* at pci? # QLogic ISP 2[45]xx FibreChannel
siop* at mainbus? irq 3 # NCR 53C720 (Fast-Wide HVD)
siop* at phantomas? irq 3
siop* at uturn? irq 3
siop* at pci? # NCR 53C8XX SCSI controllers
#ahd* at pci? # Adaptec 79?? SCSI controllers
em* at pci? # Intel Pro/1000 ethernet
ti* at pci? # Alteon Tigon 1Gb ethernet
#txp* at pci? # 3com 3CR990
#epic* at pci? # SMC EPIC/100 ethernet
#de* at pci? # 21x4[012]-based Ethernet
#de* at eisa?
dc* at pci? # 21143, "tulip" clone ethernet
#dc* at cardbus?
rl* at pci? # Realtek 81[23]9 ethernet
#rl* at cardbus?
#ep* at pci? # 3c59x ethernet
#ep* at eisa? # 3c579 ethernet
#ep* at pcmcia? # 3c589 ethernet
xl* at pci? # 3C9xx ethernet
#xl* at cardbus?
fxp* at pci? # EtherExpress 10/100B ethernet
#fxp* at cardbus?
ne* at pci? # NE2000-compatible Ethernet
ne* at pcmcia?
#atw* at pci? # ADMtek ADM8211 (802.11)
#atw* at cardbus?
#an* at pci? # Cisco/Aironet 802.11DS
an* at pcmcia?
#wi* at pci? # WaveLAN IEEE 802.11DS
wi* at pcmcia?
skc* at pci? # SysKonnect GEnesis 984x
sk* at skc? # each port of above
mskc* at pci? # Marvell Yukon-2
msk* at mskc? # each port of above
bge* at pci? # Broadcom BCM570x (aka Tigon3)
hme* at pci? # Sun Happy Meal
stge* at pci? # Sundance TC9021 GigE
dcphy* at mii? # Digital Clone PHYs
acphy* at mii? # Altima AC101 PHYs
amphy* at mii? # AMD 79C873 PHYs
exphy* at mii? # 3Com internal PHYs
gentbi* at mii? # Generic 1000BASE-X ten-bit PHY
inphy* at mii? # Intel 82555 PHYs
iophy* at mii? # Intel 82553 PHYs
icsphy* at mii? # ICS1890 PHYs
lxtphy* at mii? # Level One LXT-970 PHYs
nsphy* at mii? # NS83840 PHYs
nsphyter* at mii? # NS83843 PHYs
mtdphy* at mii? # Myson MTD972 PHYs
qsphy* at mii? # Quality Semi QS6612 PHYs
luphy* at mii? # Lucent LU6612 PHY
sqphy* at mii? # Seeq 8022[013] PHYs
#tlphy* at mii? # ThunderLAN PHYs
tqphy* at mii? # TDK Semiconductor PHYs
brgphy* at mii? # Broadcom 10/100/1000 PHYs
bmtphy* at mii? # Broadcom 10/100 PHYs
eephy* at mii? # Marvell 88E1000 Gigabit PHYs
xmphy* at mii? # XaQti XMAC-II PHYs
rlphy* at mii? # Realtek 8139 internal PHYs
urlphy* at mii? # Realtek RTL8150L internal PHY
rgephy* at mii? # Realtek 8169S/8110S PHY
ipgphy* at mii? # IC Plus IP1000A PHYs
ukphy* at mii? # generic unknown PHYs
# MI devices
#wsdisplay* at vgafb?
wsdisplay* at sti?
wskbd* at pckbd? mux 1
wskbd* at hilkbd? mux 1
wsmouse* at pms? mux 0
wsmouse* at hilms? mux 0
#fdc* at gsc? # PC floppy controller (WD37C65C)
#fdc* at isa? port 0x3f0 irq 6 drq 2
#option FD_DEBUG
#fd* at fdc? # floppy drives
pciide* at pci? flags 0x0000
#wdc0 at isa? port 0x1f0 irq 14
#wdc1 at isa? port 0x170 irq 15
wdc* at pcmcia?
wd* at wdc? flags 0x0000
wd* at pciide? flags 0x0000
atapiscsi* at pciide?
# These entries find devices on all SCSI busses and assign
# unit numbers dynamically.
scsibus* at scsi?
sd* at scsibus?
st* at scsibus?
cd* at scsibus?
ch* at scsibus?
safte* at scsibus?
ses* at scsibus?
uk* at scsibus?
mpath0 at root
emc* at scsibus?
hds* at scsibus?
rdac* at scsibus?
sym* at scsibus?
# 1-Wire devices
option ONEWIREVERBOSE
owid* at onewire? # ID
owsbm* at onewire? # Smart Battery Monitor
owtemp* at onewire? # Temperature
owctr* at onewire? # Counter device
pseudo-device hotplug 1 # devices hot plugging
pseudo-device wsmux 2 # mouse and keyboard multiplexor

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sys/arch/hppa/conf/GENERIC.MP
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# $OpenBSD: GENERIC.MP,v 1.1 2010/06/26 17:43:26 jsing Exp $
include "arch/hppa/conf/GENERIC"
option MULTIPROCESSOR
#option MP_LOCKDEBUG
cpu* at mainbus?

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sys/arch/hppa/conf/Makefile.hppa
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# $OpenBSD: Makefile.hppa,v 1.109 2021/01/28 17:39:03 deraadt Exp $
# For instructions on building kernels consult the config(8) and options(4)
# manual pages.
#
# N.B.: NO DEPENDENCIES ON FOLLOWING FLAGS ARE VISIBLE TO MAKEFILE
# IF YOU CHANGE THE DEFINITION OF ANY OF THESE RECOMPILE EVERYTHING
# DEBUG is set to -g by config if debugging is requested (config -g).
# PROF is set to -pg by config if profiling is requested (config -p).
.include <bsd.own.mk>
SIZE?= size
STRIP?= ctfstrip
# source tree is located via $S relative to the compilation directory
.ifndef S
S!= cd ../../../..; pwd
.endif
_machdir?= $S/arch/${_mach}
_archdir?= $S/arch/${_arch}
INCLUDES= -nostdinc -I$S -I${.OBJDIR} -I$S/arch
CPPFLAGS= ${INCLUDES} ${IDENT} ${PARAM} -D_KERNEL -MD -MP
CWARNFLAGS= -Werror -Wall -Wimplicit-function-declaration \
-Wno-uninitialized -Wno-pointer-sign \
-Wframe-larger-than=2047
CMACHFLAGS= -mfast-indirect-calls -mportable-runtime -mno-space-regs
CMACHFLAGS+= -ffreestanding ${NOPIE_FLAGS}
CMACHFLAGS+= -fno-stack-protector
SORTR= sort -R
.if ${IDENT:M-DSMALL_KERNEL}
SORTR= cat
COPTIMIZE?= -Oz
.endif
DEBUG?= -g
COPTIMIZE?= -O2
CFLAGS= ${DEBUG} ${CWARNFLAGS} ${CMACHFLAGS} ${COPTIMIZE} ${COPTS} ${PIPE}
AFLAGS= -D_LOCORE -x assembler-with-cpp ${CWARNFLAGS} ${CMACHFLAGS}
LINKFLAGS= -X -T ld.script -Ttext 80000 --warn-common -nopie
.if ${IDENT:M-DDDB} != ""
CFLAGS+= -fno-omit-frame-pointer
.endif
.if ${IDENT:M-DSMALL_KERNEL}
SORTR= cat
.endif
.if ${IDENT:M-DHP7000_CPU} != ""
CFLAGS+= -mpa-risc-1-0
.elif ${IDENT:M-DHP8*_CPU} != ""
CFLAGS+= -mpa-risc-2-0
.else
CFLAGS+= -mpa-risc-1-1
.endif
HOSTCC?= ${CC}
HOSTED_CPPFLAGS=${CPPFLAGS:S/^-nostdinc$//}
HOSTED_CFLAGS= ${CFLAGS}
HOSTED_C= ${HOSTCC} ${HOSTED_CFLAGS} ${HOSTED_CPPFLAGS} -c $<
NORMAL_C_NOP= ${CC} ${CFLAGS} ${CPPFLAGS} -c $<
NORMAL_C= ${CC} ${CFLAGS} ${CPPFLAGS} ${PROF} -c $<
NORMAL_S= ${CC} ${AFLAGS} ${CPPFLAGS} ${PROF} -c $<
%OBJS
%CFILES
%SFILES
# load lines for config "xxx" will be emitted as:
# xxx: ${SYSTEM_DEP} swapxxx.o
# ${SYSTEM_LD_HEAD}
# ${SYSTEM_LD} swapxxx.o
# ${SYSTEM_LD_TAIL}
SYSTEM_HEAD= locore0.o gap.o
SYSTEM_OBJ= ${SYSTEM_HEAD} ${OBJS} param.o ioconf.o
SYSTEM_DEP= Makefile ${SYSTEM_OBJ} ld.script
SYSTEM_LD_HEAD= @rm -f $@
SYSTEM_LD= @echo ${LD} ${LINKFLAGS} -o $@ '$${SYSTEM_HEAD} vers.o $${OBJS}'; \
umask 007; \
echo ${OBJS} param.o ioconf.o vers.o | tr " " "\n" | ${SORTR} > lorder; \
${LD} ${LINKFLAGS} -o $@ ${SYSTEM_HEAD} `cat lorder`
SYSTEM_LD_TAIL= @${SIZE} $@
.if ${DEBUG} == "-g"
STRIPFLAGS= -S
SYSTEM_LD_TAIL+=; umask 007; \
echo mv $@ $@.gdb; rm -f $@.gdb; mv $@ $@.gdb; \
echo ${STRIP} ${STRIPFLAGS} -o $@ $@.gdb; \
${STRIP} ${STRIPFLAGS} -o $@ $@.gdb
.else
LINKFLAGS+= -S
.endif
%LOAD
# cc's -MD puts the source and output paths in the dependency file;
# since those are temp files here we need to fix it up. It also
# puts the file in /tmp, so we use -MF to put it in the current
# directory as assym.P and then generate assym.d from it with a
# good target name
assym.h: $S/kern/genassym.sh Makefile \
${_archdir}/${_arch}/genassym.cf ${_machdir}/${_mach}/genassym.cf
cat ${_archdir}/${_arch}/genassym.cf ${_machdir}/${_mach}/genassym.cf | \
sh $S/kern/genassym.sh ${CC} ${CFLAGS} ${CPPFLAGS} -MF assym.P > assym.h.tmp
sed '1s/.*/assym.h: \\/' assym.P > assym.d
sort -u assym.h.tmp > assym.h
param.c: $S/conf/param.c
rm -f param.c
cp $S/conf/param.c .
param.o: param.c Makefile
${NORMAL_C}
mcount.o: $S/lib/libkern/mcount.c Makefile
${NORMAL_C_NOP}
ioconf.o: ioconf.c
${NORMAL_C}
ld.script: ${_machdir}/conf/ld.script
cp ${_machdir}/conf/ld.script $@
makegap.sh:
cp $S/conf/makegap.sh $@
MAKE_GAP = LD="${LD}" sh makegap.sh 0x00000000 # BREAK 0,0 -> trap
gap.o: Makefile makegap.sh vers.o
${MAKE_GAP}
vers.o: ${SYSTEM_DEP:Ngap.o}
sh $S/conf/newvers.sh
${CC} ${CFLAGS} ${CPPFLAGS} ${PROF} -c vers.c
clean:
rm -f *bsd *bsd.gdb *.[dio] [a-z]*.s assym.* \
gap.link ld.script lorder makegap.sh param.c
cleandir: clean
rm -f Makefile *.h ioconf.c options machine ${_mach} vers.c
depend obj:
locore0.o: ${_machdir}/${_mach}/locore0.S assym.h
locore.o: ${_machdir}/${_mach}/locore.S assym.h
fpemu.o spcopy.o: assym.h
hardlink-obsd:
[[ ! -f /bsd ]] || cmp -s bsd /bsd || ln -f /bsd /obsd
newinstall:
install -F -m 700 bsd /bsd && sha256 -h /var/db/kernel.SHA256 /bsd
install: update-link hardlink-obsd newinstall
# pull in the dependency information
.ifnmake clean
. for o in ${SYSTEM_OBJ:Ngap.o} assym.h
. if exists(${o:R}.d)
. include "${o:R}.d"
. elif exists($o)
.PHONY: $o
. endif
. endfor
.endif
%RULES

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sys/arch/hppa/conf/RAMDISK
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# $OpenBSD: RAMDISK,v 1.113 2019/09/04 14:29:41 cheloha Exp $
machine hppa
maxusers 4
option SMALL_KERNEL
option NO_PROPOLICE
option BOOT_CONFIG
option RAMDISK_HOOKS
option MINIROOTSIZE=7920
option SCSITERSE
option PCIVERBOSE
option FFS
option FFS2
option NFSCLIENT
option CD9660
option MSDOSFS
option INET6
# Support for various CPU types
option HP7000_CPU # PCXS
option HP7100_CPU # PCXT
option HP7200_CPU # PCXT'
option HP7100LC_CPU # PCXL
option HP7300LC_CPU # PCXL2
option HP8000_CPU # PCXU (in 32bit mode)
option HP8200_CPU # PCXU2 (in 32bit mode)
option HP8500_CPU # PCXW (in 32bit mode)
option HP8700_CPU # PCXW2 (in 32bit mode)
option FPEMUL
config bsd root on rd0a swap on rd0b # and sd0b
mainbus0 at root
mem* at mainbus0 flags 0x0000 # /dev/*mem and memory controller
pdc0 at mainbus0 # PDC/IODC wrapper for boot console
power0 at mainbus0 # power/fail manager (iv 30)
cpu* at mainbus0 irq 31 # HP PA-RISC cpu
#fpu* at mainbus0 # HP PA-RISC fpu (iv N/A)
phantomas0 at mainbus0 # Phantom PseudoBC GSC+ Port
uturn0 at mainbus0 # U2/UTurn Runway IOA
uturn1 at mainbus0
astro* at mainbus0 # Astro memory & I/O controller
lasi0 at mainbus0 offset 0x100000 # LASI host adapter
lasi0 at mainbus0 offset 0xfd00000 # LASI on C1[01]0, J2[01]0
lasi0 at phantomas0 offset 0xfd00000 # LASI on [AB]*
lasi0 at uturn? offset 0xfd00000 # LASI on [CJ]*
lasi1 at mainbus0 offset 0x500000 # 712 GIO card
asp* at mainbus0 # this one comes w/ Viper and LEDs
wax* at mainbus0 # Wax may host EISA as well
wax* at phantomas0 # Wax on [AB]*
wax* at uturn? # Wax on C*
mongoose* at mainbus0 irq 17 # EISA Bus Adapter (i82350 or TI???)
dino* at phantomas? # PCI bus bridge on [AB]*
dino* at uturn? # PCI bus bridge on [CJ]*
pci* at dino?
com1 at dino? irq 11
elroy* at astro?
pci* at elroy?
ppb* at pci?
pci* at ppb?
ssio* at pci?
com0 at ssio? irq 4
com1 at ssio? irq 3
cbb* at pci?
cardslot* at cbb?
cardbus* at cardslot?
pcmcia* at cardslot?
ehci* at pci?
ehci* at cardbus?
ohci* at pci?
ohci* at cardbus?
uhci* at pci?
usb* at ehci?
usb* at uhci?
usb* at ohci?
uhub* at usb?
uhub* at uhub?
umass* at uhub?
uhidev* at uhub? # Human Interface Devices
ukbd* at uhidev? # USB keyboard
wskbd* at ukbd? mux 1
uhid* at uhidev? # USB generic HID support
aue* at uhub? # ADMtek AN986 Pegasus Ethernet
url* at uhub? # Realtek RTL8150L based adapters
ure* at uhub? # Realtek RTL8152 based adapters
atu* at uhub? # Atmel AT76c50x based 802.11b
axe* at uhub? # ASIX Electronics AX88172 USB Ethernet
axen* at uhub? # ASIX Electronics AX88179 USB Ethernet
cue* at uhub? # CATC USB-EL1201A based Ethernet
kue* at uhub? # Kawasaki KL5KUSB101B based Ethernet
smsc* at uhub? # SMSC LAN95xx Ethernet
cdce* at uhub? # CDC Ethernet
udav* at uhub? # Davicom DM9601 based Ethernet
upl* at uhub? # Prolific PL2301/PL2302 host-to-host
ugl* at uhub? # Genesys Logic GL620USB-A host-to-host
wi* at uhub? # WaveLAN IEEE 802.11DS
ural* at uhub? # Ralink RT2500
sti* at mainbus0 # [H]CRX-{8,24,48}[Z] graphics
sti* at phantomas0 # builtin graphics on BC*
sti* at uturn?
sti* at pci? # EG-PCI, FX*
gsc0 at asp? # Snakes, old 715, old 725, 735/755
gsc0 at lasi0 # 712,715/100,725/64,725/100,[ABCJ]*
gsc1 at lasi1
gsc2 at wax? # it's another face of LASI
eisa* at mongoose?
hil* at gsc? irq 1 # Human Interface Loop, kbd and mouse
hilkbd* at hil? # keyboard, knob and buttons
com0 at gsc0 offset 0x5000 irq 5 # on lasi
com1 at gsc1 offset 0x5000 irq 5
com1 at gsc2 offset 0x2000 irq 6 # on wax
com0 at gsc0 offset 0x823000 irq 5 # on asp
com1 at gsc0 offset 0x822000 irq 6
com2 at gsc0 offset 0x0 irq 13 # only on asp0 w/o audio (off ?)
com2 at gsc0 offset 0x4040 irq 13 # gecko's fax/voice/modems
com3 at gsc0 offset 0x4060 irq 13
ie0 at gsc0 irq 8 # 82C596DX/CA ether
osiop* at gsc? irq 9 # NCR 53C710 (Narrow SE)
oosiop* at gsc? irq 9 # NCR 53C700 (Narrow SE)
gsckbc* at gsc? irq 26
pckbd* at gsckbc? # PS/2 keyboard
ahc* at pci? # Adaptec 2940 SCSI controllers
mpi* at pci? # LSI Logic Fusion MPT Message Passing Interface
qlw* at pci? # QLogic ISP SCSI
qla* at pci? # QLogic ISP 2[123]xx FibreChannel
option QLE_NOFIRMWARE
qle* at pci? # QLogic ISP 2[45]xx FibreChannel
siop* at mainbus? irq 3 # NCR 53C720 (Fast/Wide HVD)
siop* at phantomas? irq 3
siop* at uturn? irq 3
siop* at pci? # NCR 53C8XX SCSI controllers
softraid0 at root
em* at pci? # Intel Pro/1000 ethernet
dc* at pci? # 21143, "tulip" clone ethernet
rl* at pci? # Realtek 81[23]9 ethernet
xl* at pci? # 3C9xx ethernet
fxp* at pci? # EtherExpress 10/100B ethernet
ne* at pci? # NE2000-compatible Ethernet
ne* at pcmcia?
an* at pcmcia?
wi* at pcmcia?
skc* at pci? # SysKonnect GEnesis 984x
sk* at skc? # each port of above
mskc* at pci? # Marvell Yukon-2
msk* at mskc? # each port of above
bge* at pci? # Broadcom BCM570x (aka Tigon3)
hme* at pci? # Sun Happy Meal
stge* at pci? # Sundance TC9021 GigE
dcphy* at mii? # Digital Clone PHYs
acphy* at mii? # Altima AC101 PHYs
amphy* at mii? # AMD 79C873 PHYs
exphy* at mii? # 3Com internal PHYs
gentbi* at mii? # Generic 1000BASE-X ten-bit PHY
inphy* at mii? # Intel 82555 PHYs
iophy* at mii? # Intel 82553 PHYs
icsphy* at mii? # ICS1890 PHYs
lxtphy* at mii? # Level One LXT-970 PHYs
nsphy* at mii? # NS83840 PHYs
nsphyter* at mii? # NS83843 PHYs
mtdphy* at mii? # Myson MTD972 PHYs
qsphy* at mii? # Quality Semi QS6612 PHYs
luphy* at mii? # Lucent LU6612 PHY
sqphy* at mii? # Seeq 8022[013] PHYs
tqphy* at mii? # TDK Semiconductor PHYs
brgphy* at mii? # Broadcom 10/100/1000 PHYs
bmtphy* at mii? # Broadcom 10/100 PHYs
eephy* at mii? # Marvell 88E1000 Gigabit PHYs
xmphy* at mii? # XaQti XMAC-II PHYs
rlphy* at mii? # Realtek 8139 internal PHYs
urlphy* at mii? # Realtek RTL8150L internal PHY
rgephy* at mii? # Realtek 8169S/8110S PHY
ipgphy* at mii? # IC Plus IP1000A PHYs
ukphy* at mii? # generic unknown PHYs
wsdisplay* at sti?
wskbd* at pckbd? mux 1
wskbd* at hilkbd? mux 1
pciide* at pci? flags 0x0000
wdc* at pcmcia?
wd* at wdc? flags 0x0000
wd* at pciide? flags 0x0000
atapiscsi* at pciide?
scsibus* at scsi?
sd* at scsibus?
st* at scsibus?
cd* at scsibus?
pseudo-device rd 1
pseudo-device loop 1
pseudo-device bpfilter 1
pseudo-device vlan
pseudo-device wsmux 2
pseudo-device bio 1

350
sys/arch/hppa/conf/files.hppa
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@ -1,350 +0,0 @@
# $OpenBSD: files.hppa,v 1.98 2018/02/14 23:51:49 jsg Exp $
#
# hppa-specific configuration info
# maxpartitions must be the first item in files.${ARCH}
maxpartitions 16
maxusers 2 8 128
#
# "workstation console" routines
#
include "dev/wscons/files.wscons"
file arch/hppa/hppa/wscons_machdep.c wsdisplay
include "dev/rasops/files.rasops"
include "dev/wsfont/files.wsfont"
#
# Media Independent Interface (mii)
#
include "dev/mii/files.mii"
#
# Machine-independent SCSI drivers
#
include "scsi/files.scsi"
major {sd = 4}
major {st = 5}
major {cd = 6}
#
# MI ATAPI drivers
#
include "dev/atapiscsi/files.atapiscsi"
include "dev/ata/files.ata"
major {wd = 8}
#
# ISA Bus support
#
include "dev/isa/files.isa"
include "dev/isa/files.isapnp"
#
# EISA Bus support
#
include "dev/eisa/files.eisa"
#
# PCI Bus support
#
include "dev/pci/files.pci"
device hme: ether, ifnet, mii, ifmedia
file dev/ic/hme.c hme
attach hme at pci with hme_pci
file dev/pci/if_hme_pci.c hme_pci
#
# CardBus support
#
include "dev/cardbus/files.cardbus"
#
# Machine-independent PCMCIA drivers
#
include "dev/pcmcia/files.pcmcia"
#
# Machine-independent HID support
#
include "dev/hid/files.hid"
#
# Machine-independent USB drivers
#
include "dev/usb/files.usb"
#
# HIL Human Interface Loop devices
#
include "dev/hil/files.hil"
#
# Machine-independent 1-Wire drivers
#
include "dev/onewire/files.onewire"
#
# Gonzo System Connect Bus
# (GSC, GSC-1X, GSC+, GSC-1.5X, GSC-2X)
#
define gscbus {}
#
# Mainbus
#
define gedoens {[offset = -1], [irq = -1]}
device mainbus: gedoens
attach mainbus at root
file arch/hppa/hppa/mainbus.c mainbus
device pdc
attach pdc at gedoens
file arch/hppa/dev/pdc.c pdc
device power
attach power at gedoens
file arch/hppa/dev/power.c power needs-flag
device lcd
attach lcd at gedoens
file arch/hppa/dev/lcd.c lcd needs-flag
device mem
attach mem at gedoens
file arch/hppa/hppa/mem.c mem
device cpu
attach cpu at gedoens
file arch/hppa/dev/cpu.c cpu
device fpu
attach fpu at gedoens
file arch/hppa/dev/fpu.c fpu
# Phantom PseudoBC GSC+ Port
device phantomas: gedoens
attach phantomas at gedoens
file arch/hppa/dev/phantomas.c phantomas
# GeckoBOA BC GSC+ port
device gecko: gedoens
attach gecko at gedoens
file arch/hppa/dev/gecko.c gecko
# U2/Uturn, Runway to GSC Bus bridge & IOA
device uturn: gedoens
attach uturn at gedoens
file arch/hppa/dev/uturn.c uturn
# Astro memory & I/O controller
device astro: gedoens
attach astro at gedoens
file arch/hppa/dev/astro.c astro
# 1FT1-0002, 1FU2-0002
# as goes w/ 7100LC, 7300LC, 7200 and some of 8000, 8200, 8500
device lasi: gscbus
attach lasi at gedoens
file arch/hppa/dev/lasi.c lasi
# all the older systems
device asp: gscbus
attach asp at gedoens
file arch/hppa/dev/asp.c asp
# 1FT4-0001, ASIC used on gecko cards
device wax: gscbus, isabus, eisabus
attach wax at gedoens
file arch/hppa/dev/wax.c wax
device mongoose: isabus, eisabus
attach mongoose at gedoens with mg_gedoens
file arch/hppa/dev/mongoose.c mongoose
define dinobus {[offset = -1], [irq = -1]}
# Dino, GSC-PCI bridge. Includes ps/2, cereal and a flying toaster interfaces
# Cujo is a 64-bit data path Dino
device dino: pcibus, dinobus
attach dino at gedoens
file arch/hppa/dev/dino.c dino
attach com at dinobus with com_dino
file arch/hppa/dev/com_dino.c com_dino
# Elroy, Ropes to PCI Bridge. Supports 4X PCI and dual address cycle.
# Mercury; QuickSilver is an AGP also
device elroy: pcibus
attach elroy at gedoens
file arch/hppa/dev/elroy.c elroy
file arch/hppa/dev/apic.c elroy
attach sti at gedoens with sti_gedoens
file arch/hppa/dev/sti_sgc.c sti_gedoens
file arch/hppa/dev/sti_pci_machdep.c sti_pci
attach siop at gedoens with siop_gedoens
file arch/hppa/dev/siop_sgc.c siop_gedoens
device ssio {[irq = -1]}
attach ssio at pci
file arch/hppa/dev/ssio.c ssio
attach com at ssio with com_ssio
file arch/hppa/dev/com_ssio.c com_ssio
attach lpt at ssio with lpt_ssio
file arch/hppa/dev/lpt_ssio.c lpt_ssio
###
major {vnd = 2}
major {rd = 3}
#
# GSC bus devices
#
device gsc {[offset = -1], [irq = -1]}
attach gsc at gscbus
file arch/hppa/gsc/gscbus.c gsc
# com and lpt are both on WD 16C552
attach com at gsc with com_gsc
file arch/hppa/gsc/com_gsc.c com_gsc
attach lpt at gsc with lpt_gsc
file arch/hppa/gsc/lpt_gsc.c lpt_gsc
attach mongoose at gsc with mg_gsc
file arch/hppa/gsc/mongoose_gsc.c mg_gsc
#include "dev/fdc/files.fdc"
#major {fd = 7}
#attach fdc at gsc with fdc_gsc
#file arch/hppa/gsc/fdc_gsc.c fdc_gsc
attach ie at gsc with ie_gsc
file arch/hppa/gsc/if_ie_gsc.c ie_gsc
attach siop at gsc with siop_gsc
file arch/hppa/gsc/siop_gsc.c siop_gsc
attach osiop at gsc with osiop_gsc
file arch/hppa/gsc/osiop_gsc.c osiop_gsc
attach oosiop at gsc with oosiop_gsc
file arch/hppa/gsc/oosiop_gsc.c oosiop_gsc
attach hil at gsc with hil_gsc
file arch/hppa/gsc/hil_gsc.c hil_gsc
# PSB 2160-N based 8bit mono audio (705, 710, 745i/*, 747i/*)
attach arcofi at gsc with arcofi_gsc
file arch/hppa/gsc/arcofi_gsc.c arcofi_gsc
# CS4215/AD1849 based 16bit mono/stereo audio iface (most of others not w/ aone)
# a.k.a. Audio Type 2 (optional beeper)
device harmony: audio
attach harmony at gsc
file arch/hppa/gsc/harmony.c harmony
# PS/2 input ports
device gsckbc: pckbcslot
attach gsckbc at gsc
file arch/hppa/gsc/gsckbc.c gsckbc
# PS/2 keyboard and mouse
include "dev/pckbc/files.pckbc"
#
# Non-device files
#
file arch/hppa/hppa/autoconf.c
file arch/hppa/hppa/conf.c
file arch/hppa/hppa/db_interface.c ddb
file arch/hppa/hppa/db_disasm.c ddb
file arch/hppa/hppa/disksubr.c disk
file arch/hppa/hppa/fpu.c
file arch/hppa/hppa/ipi.c multiprocessor
file arch/hppa/hppa/lock_machdep.c multiprocessor
file arch/hppa/hppa/machdep.c
file arch/hppa/hppa/mutex.c
file arch/hppa/hppa/pmap.c
file arch/hppa/hppa/process_machdep.c
file arch/hppa/hppa/sys_machdep.c
file arch/hppa/hppa/trap.c
file arch/hppa/hppa/intr.c
file arch/hppa/hppa/vm_machdep.c
file arch/hppa/hppa/in_cksum.c
file arch/hppa/hppa/locore.S
file netinet/in4_cksum.c
file arch/hppa/dev/clock.c
file arch/hppa/hppa/fpemu.S fpemul
# quad support is necessary for 32 bit architectures
file lib/libkern/adddi3.c
file lib/libkern/anddi3.c
file lib/libkern/ashldi3.c
file lib/libkern/ashrdi3.c
file lib/libkern/cmpdi2.c
file lib/libkern/divdi3.c
file lib/libkern/iordi3.c
file lib/libkern/lshldi3.c
file lib/libkern/lshrdi3.c
file lib/libkern/moddi3.c
file lib/libkern/muldi3.c
file lib/libkern/negdi2.c
file lib/libkern/notdi2.c
file lib/libkern/qdivrem.c
file lib/libkern/subdi3.c
file lib/libkern/ucmpdi2.c
file lib/libkern/udivdi3.c
file lib/libkern/umoddi3.c
file lib/libkern/xordi3.c
# kern..
file lib/libkern/arch/hppa/milli.S
file lib/libkern/arch/hppa/spcopy.S
# fpu emulation
file arch/hppa/spmath/dfadd.c fpemul
file arch/hppa/spmath/dfcmp.c fpemul
file arch/hppa/spmath/dfdiv.c fpemul
file arch/hppa/spmath/dfmpy.c fpemul
file arch/hppa/spmath/dfrem.c fpemul
file arch/hppa/spmath/dfsqrt.c fpemul
file arch/hppa/spmath/dfsub.c fpemul
file arch/hppa/spmath/divsfm.c fpemul
file arch/hppa/spmath/divsfr.c fpemul
file arch/hppa/spmath/divsim.c fpemul
file arch/hppa/spmath/divsir.c fpemul
file arch/hppa/spmath/divufr.c fpemul
file arch/hppa/spmath/divuir.c fpemul
file arch/hppa/spmath/fcnvff.c fpemul
file arch/hppa/spmath/fcnvfx.c fpemul
file arch/hppa/spmath/fcnvfxt.c fpemul
file arch/hppa/spmath/fcnvxf.c fpemul
file arch/hppa/spmath/frnd.c fpemul
file arch/hppa/spmath/mpyaccs.c fpemul
file arch/hppa/spmath/mpyaccu.c fpemul
file arch/hppa/spmath/mpys.c fpemul
file arch/hppa/spmath/mpyscv.c fpemul
file arch/hppa/spmath/mpyu.c fpemul
file arch/hppa/spmath/mpyucv.c fpemul
file arch/hppa/spmath/sfadd.c fpemul
file arch/hppa/spmath/sfcmp.c fpemul
file arch/hppa/spmath/sfdiv.c fpemul
file arch/hppa/spmath/sfmpy.c fpemul
file arch/hppa/spmath/sfrem.c fpemul
file arch/hppa/spmath/sfsqrt.c fpemul
file arch/hppa/spmath/sfsub.c fpemul
file arch/hppa/spmath/divu.S fpemul
file arch/hppa/spmath/impys.S fpemul
file arch/hppa/spmath/impyu.S fpemul

85
sys/arch/hppa/conf/ld.script
View File

@ -1,85 +0,0 @@
/* $OpenBSD: ld.script,v 1.19 2017/06/21 23:21:35 deraadt Exp $ */
/*
* Copyright (c) 2003 Michael Shalayeff
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
* THE POSSIBILITY OF SUCH DAMAGE.
*/
OUTPUT_FORMAT("elf32-hppa")
OUTPUT_ARCH(hppa)
ENTRY($start)
SECTIONS
{
. = + SIZEOF_HEADERS;
.text :
{
kernel_text = . ;
*(.text) *(.text.*)
*(.reginfo)
*(.init)
*(.stub)
/* .gnu.warning sections are handled specially by elf32.em. */
*(.gnu.warning)
. = ALIGN(4096);
etext = ABSOLUTE(.);
} =0x00000000
. = 0x600000;
.rodata :
{
__rodata_start = .;
*(.rodata) *(.rodata1)
. = ALIGN(8);
__unwind_start = .;
*(.PARISC.unwind)
__unwind_end = .;
. = ALIGN(4096);
__rodata_end = .;
} =0x00000000
__data_start = ABSOLUTE(.);
.data :
{
$global$ = . ;
. += 4;
*(.data)
CONSTRUCTORS
. = ALIGN(4096);
edata = ABSOLUTE(.);
} =0x00000000
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
__bss_start = .;
/* .sbss : { *(.sbss) *(.scommon) } */
.bss :
{
*(.dynbss) *(.bss)
*(COMMON) *($COMMON$)
. = ALIGN(4096);
}
end = ABSOLUTE(.);
}

7
sys/arch/hppa/dev/Makefile
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@ -1,7 +0,0 @@
# $OpenBSD: Makefile,v 1.4 2014/07/16 20:08:25 okan Exp $
AWK?= awk
cpudevs.h cpudevs_data.h: cpudevs devlist2h.awk
/bin/rm -f cpudevs.h cpudevs_data.h
${AWK} -f devlist2h.awk cpudevs

360
sys/arch/hppa/dev/apic.c
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@ -1,360 +0,0 @@
/* $OpenBSD: apic.c,v 1.19 2018/05/14 13:54:39 kettenis Exp $ */
/*
* Copyright (c) 2005 Michael Shalayeff
* Copyright (c) 2007 Mark Kettenis
* All rights reserved.
*
* Permission to use, copy, modify, and distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF MIND, USE, DATA OR PROFITS, WHETHER IN
* AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT
* OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <sys/evcount.h>
#include <sys/malloc.h>
#include <machine/autoconf.h>
#include <machine/pdc.h>
#include <dev/pci/pcireg.h>
#include <dev/pci/pcivar.h>
#include <dev/pci/pcidevs.h>
#include <hppa/dev/elroyreg.h>
#include <hppa/dev/elroyvar.h>
#define APIC_INT_LINE_MASK 0x0000ff00
#define APIC_INT_LINE_SHIFT 8
#define APIC_INT_IRQ_MASK 0x0000001f
#define APIC_INT_LINE(x) (((x) & APIC_INT_LINE_MASK) >> APIC_INT_LINE_SHIFT)
#define APIC_INT_IRQ(x) ((x) & APIC_INT_IRQ_MASK)
/*
* Interrupt types match the Intel MP Specification.
*/
#define MPS_INTPO_DEF 0
#define MPS_INTPO_ACTHI 1
#define MPS_INTPO_ACTLO 3
#define MPS_INTPO_SHIFT 0
#define MPS_INTPO_MASK 3
#define MPS_INTTR_DEF 0
#define MPS_INTTR_EDGE 1
#define MPS_INTTR_LEVEL 3
#define MPS_INTTR_SHIFT 2
#define MPS_INTTR_MASK 3
#define MPS_INT(p,t) \
((((p) & MPS_INTPO_MASK) << MPS_INTPO_SHIFT) | \
(((t) & MPS_INTTR_MASK) << MPS_INTTR_SHIFT))
struct apic_iv {
struct elroy_softc *sc;
pci_intr_handle_t ih;
int (*handler)(void *);
void *arg;
struct apic_iv *next;
struct evcount *cnt;
};
struct apic_iv *apic_intr_list[CPU_NINTS];
void apic_get_int_tbl(struct elroy_softc *);
u_int32_t apic_get_int_ent0(struct elroy_softc *, int);
#ifdef DEBUG
void apic_dump(struct elroy_softc *);
#endif
void apic_write(volatile struct elroy_regs *r, u_int32_t reg,
u_int32_t val);
u_int32_t apic_read(volatile struct elroy_regs *r, u_int32_t reg);
void
apic_write(volatile struct elroy_regs *r, u_int32_t reg, u_int32_t val)
{
elroy_write32(&r->apic_addr, htole32(reg));
elroy_write32(&r->apic_data, htole32(val));
elroy_read32(&r->apic_data);
}
u_int32_t
apic_read(volatile struct elroy_regs *r, u_int32_t reg)
{
elroy_write32(&r->apic_addr, htole32(reg));
return letoh32(elroy_read32(&r->apic_data));
}
void
apic_attach(struct elroy_softc *sc)
{
volatile struct elroy_regs *r = sc->sc_regs;
u_int32_t data;
data = apic_read(r, APIC_VERSION);
sc->sc_nints = (data & APIC_VERSION_NENT) >> APIC_VERSION_NENT_SHIFT;
printf(" APIC ver %x, %d pins",
data & APIC_VERSION_MASK, sc->sc_nints);
sc->sc_irq = mallocarray(sc->sc_nints, sizeof(int), M_DEVBUF,
M_NOWAIT | M_ZERO);
if (sc->sc_irq == NULL)
panic("apic_attach: cannot allocate irq table");
apic_get_int_tbl(sc);
#ifdef DEBUG
apic_dump(sc);
#endif
}
int
apic_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp)
{
struct elroy_softc *sc = pa->pa_pc->_cookie;
pci_chipset_tag_t pc = pa->pa_pc;
pcitag_t tag = pa->pa_tag;
pcireg_t reg;
int line;
reg = pci_conf_read(pc, tag, PCI_INTERRUPT_REG);
#ifdef DEBUG
printf(" pin=%d line=%d ", PCI_INTERRUPT_PIN(reg),
PCI_INTERRUPT_LINE(reg));
#endif
line = PCI_INTERRUPT_LINE(reg);
if (sc->sc_irq[line] <= 0) {
if ((sc->sc_irq[line] = cpu_intr_findirq()) == -1)
return 1;
}
*ihp = (line << APIC_INT_LINE_SHIFT) | sc->sc_irq[line];
return (APIC_INT_IRQ(*ihp) == 0);
}
const char *
apic_intr_string(void *v, pci_intr_handle_t ih)
{
static char buf[32];
snprintf(buf, 32, "line %ld irq %ld",
APIC_INT_LINE(ih), APIC_INT_IRQ(ih));
return (buf);
}
void *
apic_intr_establish(void *v, pci_intr_handle_t ih,
int pri, int (*handler)(void *), void *arg, const char *name)
{
struct elroy_softc *sc = v;
volatile struct elroy_regs *r = sc->sc_regs;
hppa_hpa_t hpa = cpu_gethpa(0);
struct evcount *cnt;
struct apic_iv *aiv, *biv;
void *iv;
int irq = APIC_INT_IRQ(ih);
int line = APIC_INT_LINE(ih);
u_int32_t ent0;
/* no mapping or bogus */
if (irq <= 0 || irq > 31)
return (NULL);
aiv = malloc(sizeof(struct apic_iv), M_DEVBUF, M_NOWAIT);
if (aiv == NULL)
return (NULL);
cnt = malloc(sizeof(struct evcount), M_DEVBUF, M_NOWAIT);
if (!cnt) {
free(aiv, M_DEVBUF, sizeof *aiv);
return (NULL);
}
aiv->sc = sc;
aiv->ih = ih;
aiv->handler = handler;
aiv->arg = arg;
aiv->next = NULL;
aiv->cnt = cnt;
evcount_attach(cnt, name, NULL);
if (apic_intr_list[irq]) {
biv = apic_intr_list[irq];
while (biv->next)
biv = biv->next;
biv->next = aiv;
return (arg);
}
if ((iv = cpu_intr_establish(pri, irq, apic_intr, aiv, NULL))) {
ent0 = (31 - irq) & APIC_ENT0_VEC;
ent0 |= apic_get_int_ent0(sc, line);
#if 0
if (cold) {
sc->sc_imr |= (1 << irq);
ent0 |= APIC_ENT0_MASK;
}
#endif
apic_write(sc->sc_regs, APIC_ENT0(line), APIC_ENT0_MASK);
apic_write(sc->sc_regs, APIC_ENT1(line),
((hpa & 0x0ff00000) >> 4) | ((hpa & 0x000ff000) << 12));
apic_write(sc->sc_regs, APIC_ENT0(line), ent0);
/* Signal EOI. */
elroy_write32(&r->apic_eoi,
htole32((31 - irq) & APIC_ENT0_VEC));
apic_intr_list[irq] = aiv;
}
return (arg);
}
void
apic_intr_disestablish(void *v, void *cookie)
{
}
int
apic_intr(void *v)
{
struct apic_iv *iv = v;
struct elroy_softc *sc = iv->sc;
volatile struct elroy_regs *r = sc->sc_regs;
pci_intr_handle_t ih = iv->ih;
int claimed = 0;
while (iv) {
claimed = iv->handler(iv->arg);
if (claimed != 0 && iv->cnt)
iv->cnt->ec_count++;
if (claimed == 1)
break;
iv = iv->next;
}
/* Signal EOI. */
elroy_write32(&r->apic_eoi,
htole32((31 - APIC_INT_IRQ(ih)) & APIC_ENT0_VEC));
return (claimed);
}
/* Maximum number of supported interrupt routing entries. */
#define MAX_INT_TBL_SZ 16
void
apic_get_int_tbl(struct elroy_softc *sc)
{
struct pdc_pat_io_num int_tbl_sz PDC_ALIGNMENT;
struct pdc_pat_pci_rt int_tbl[MAX_INT_TBL_SZ] PDC_ALIGNMENT;
size_t size;
/*
* XXX int_tbl should not be allocated on the stack, but we need a
* 1:1 mapping, and malloc doesn't provide that.
*/
if (pdc_call((iodcio_t)pdc, 0, PDC_PCI_INDEX, PDC_PCI_GET_INT_TBL_SZ,
&int_tbl_sz, 0, 0, 0, 0, 0))
return;
if (int_tbl_sz.num > MAX_INT_TBL_SZ)
panic("interrupt routing table too big (%d entries)",
int_tbl_sz.num);
size = int_tbl_sz.num * sizeof(struct pdc_pat_pci_rt);
sc->sc_int_tbl_sz = int_tbl_sz.num;
sc->sc_int_tbl = malloc(size, M_DEVBUF, M_NOWAIT);
if (sc->sc_int_tbl == NULL)
return;
if (pdc_call((iodcio_t)pdc, 0, PDC_PCI_INDEX, PDC_PCI_GET_INT_TBL,
&int_tbl_sz, 0, &int_tbl, 0, 0, 0))
return;
memcpy(sc->sc_int_tbl, int_tbl, size);
}
u_int32_t
apic_get_int_ent0(struct elroy_softc *sc, int line)
{
volatile struct elroy_regs *r = sc->sc_regs;
int trigger = MPS_INT(MPS_INTPO_DEF, MPS_INTTR_DEF);
u_int32_t ent0 = APIC_ENT0_LOW | APIC_ENT0_LEV;
int bus, mpspo, mpstr;
int i;
bus = letoh32(elroy_read32(&r->busnum)) & 0xff;
for (i = 0; i < sc->sc_int_tbl_sz; i++) {
if (bus == sc->sc_int_tbl[i].bus &&
line == sc->sc_int_tbl[i].line)
trigger = sc->sc_int_tbl[i].trigger;
}
mpspo = (trigger >> MPS_INTPO_SHIFT) & MPS_INTPO_MASK;
mpstr = (trigger >> MPS_INTTR_SHIFT) & MPS_INTTR_MASK;
switch (mpspo) {
case MPS_INTPO_DEF:
break;
case MPS_INTPO_ACTHI:
ent0 &= ~APIC_ENT0_LOW;
break;
case MPS_INTPO_ACTLO:
ent0 |= APIC_ENT0_LOW;
break;
default:
panic("unknown MPS interrupt polarity %d", mpspo);
}
switch(mpstr) {
case MPS_INTTR_DEF:
break;
case MPS_INTTR_LEVEL:
ent0 |= APIC_ENT0_LEV;
break;
case MPS_INTTR_EDGE:
ent0 &= ~APIC_ENT0_LEV;
break;
default:
panic("unknown MPS interrupt trigger %d", mpstr);
}
return ent0;
}
#ifdef DEBUG
void
apic_dump(struct elroy_softc *sc)
{
int i;
for (i = 0; i < sc->sc_nints; i++)
printf("0x%04x 0x%04x\n", apic_read(sc->sc_regs, APIC_ENT0(i)),
apic_read(sc->sc_regs, APIC_ENT1(i)));
for (i = 0; i < sc->sc_int_tbl_sz; i++) {
printf("type=%x ", sc->sc_int_tbl[i].type);
printf("len=%d ", sc->sc_int_tbl[i].len);
printf("itype=%d ", sc->sc_int_tbl[i].itype);
printf("trigger=%x ", sc->sc_int_tbl[i].trigger);
printf("pin=%x ", sc->sc_int_tbl[i].pin);
printf("bus=%d ", sc->sc_int_tbl[i].bus);
printf("line=%d ", sc->sc_int_tbl[i].line);
printf("addr=%x\n", sc->sc_int_tbl[i].addr);
}
}
#endif

194
sys/arch/hppa/dev/asp.c
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@ -1,194 +0,0 @@
/* $OpenBSD: asp.c,v 1.15 2018/05/14 13:54:39 kettenis Exp $ */
/*
* Copyright (c) 1998-2003 Michael Shalayeff
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
* THE POSSIBILITY OF SUCH DAMAGE.
*/
/*
* References:
*
* 1. Cobra/Coral I/O Subsystem External Reference Specification
* Hewlett-Packard
*
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <sys/reboot.h>
#include <machine/bus.h>
#include <machine/iomod.h>
#include <machine/autoconf.h>
#include <machine/cpufunc.h>
#include <hppa/dev/cpudevs.h>
#include <hppa/gsc/gscbusvar.h>
struct asp_hwr {
u_int8_t asp_reset;
u_int8_t asp_resv[31];
u_int8_t asp_version;
u_int8_t asp_resv1[15];
u_int8_t asp_scsidsync;
u_int8_t asp_resv2[15];
u_int8_t asp_error;
};
struct asp_trs {
struct gscbus_ic asp_ic;
u_int8_t asp_cled;
u_int8_t asp_resv[3];
struct {
u_int :20,
asp_spu : 3, /* SPU ID board jumper */
#define ASP_SPUCOBRA 0
#define ASP_SPUCORAL 1
#define ASP_SPUBUSH 2
#define ASP_SPUHARDBALL 3
#define ASP_SPUSCORPIO 4
#define ASP_SPUCORAL2 5
asp_sw : 1, /* front switch is normal */
asp_clk : 1, /* SCSI clock is doubled */
asp_lan : 2, /* LAN iface selector */
#define ASP_LANINVAL 0
#define ASP_LANAUI 1
#define ASP_LANTHIN 2
#define ASP_LANMISS 3
asp_lanf: 1, /* LAN AUI fuse is ok */
asp_spwr: 1, /* SCSI power ok */
asp_scsi: 3; /* SCSI ctrl ID */
} _asp_ios;
#define asp_spu _asp_ios.asp_spu
#define asp_sw _asp_ios.asp_sw
#define asp_clk _asp_ios.asp_clk
#define asp_lan _asp_ios.asp_lan
#define asp_lanf _asp_ios.asp_lanf
#define asp_spwr _asp_ios.asp_spwr
#define asp_scsi _asp_ios.asp_scsi
};
const struct asp_spus_tag {
char name[12];
int ledword;
} asp_spus[] = {
{ "Cobra", 0 },
{ "Coral", 0 },
{ "Bushmaster", 0 },
{ "Hardball", 1 },
{ "Scorpio", 0 },
{ "Coral II", 1 },
{ "#6", 0 },
{ "#7", 0 }
};
#define ASP_IOMASK 0xfe000000
/* ASP "Primary Controller" HPA */
#define ASP_CHPA 0xF0800000
int aspmatch(struct device *, void *, void *);
void aspattach(struct device *, struct device *, void *);
const struct cfattach asp_ca = {
sizeof(struct device), aspmatch, aspattach
};
struct cfdriver asp_cd = {
NULL, "asp", DV_DULL
};
int
aspmatch(parent, cfdata, aux)
struct device *parent;
void *cfdata;
void *aux;
{
struct confargs *ca = aux;
/* struct cfdata *cf = cfdata; */
if (ca->ca_type.iodc_type != HPPA_TYPE_BHA ||
ca->ca_type.iodc_sv_model != HPPA_BHA_ASP)
return 0;
return 1;
}
void
aspattach(parent, self, aux)
struct device *parent;
struct device *self;
void *aux;
{
struct confargs *ca = aux;
volatile struct asp_trs *trs;
volatile struct asp_hwr *hw;
struct gscbus_ic *ic;
struct gsc_attach_args ga;
bus_space_handle_t ioh;
int s;
if (bus_space_map(ca->ca_iot, ca->ca_hpa, IOMOD_HPASIZE, 0, &ioh)) {
printf(": can't map IO space\n");
return;
}
hw = (struct asp_hwr *)ca->ca_hpa;
trs = (struct asp_trs *)ASP_CHPA;
ic = (struct gscbus_ic *)&trs->asp_ic;
#ifdef USELEDS
machine_ledaddr = &trs->asp_cled;
machine_ledword = asp_spus[trs->asp_spu].ledword;
#endif
/* reset ASP */
/* hw->asp_reset = 1; */
/* delay(400000); */
s = splhigh();
ic->imr = ~0;
(void)ic->irr;
ic->imr = 0;
splx(s);
printf (": %s rev %d, lan %d scsi %d\n",
asp_spus[trs->asp_spu].name, hw->asp_version,
trs->asp_lan, trs->asp_scsi);
ga.ga_ca = *ca; /* clone from us */
ga.ga_dp.dp_bc[0] = ga.ga_dp.dp_bc[1];
ga.ga_dp.dp_bc[1] = ga.ga_dp.dp_bc[2];
ga.ga_dp.dp_bc[2] = ga.ga_dp.dp_bc[3];
ga.ga_dp.dp_bc[3] = ga.ga_dp.dp_bc[4];
ga.ga_dp.dp_bc[4] = ga.ga_dp.dp_bc[5];
ga.ga_dp.dp_bc[5] = ga.ga_dp.dp_mod;
ga.ga_dp.dp_mod = 0;
ga.ga_hpamask = ASP_IOMASK;
ga.ga_name = "gsc";
ga.ga_parent = gsc_asp;
ga.ga_ic = ic;
config_found(self, &ga, gscprint);
}

763
sys/arch/hppa/dev/astro.c
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@ -1,763 +0,0 @@
/* $OpenBSD: astro.c,v 1.18 2022/03/13 08:04:38 mpi Exp $ */
/*
* Copyright (c) 2007 Mark Kettenis
*
* Permission to use, copy, modify, and distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <sys/extent.h>
#include <sys/malloc.h>
#include <sys/mutex.h>
#include <sys/reboot.h>
#include <sys/tree.h>
#include <uvm/uvm_extern.h>
#include <machine/iomod.h>
#include <machine/autoconf.h>
#include <hppa/dev/cpudevs.h>
struct astro_regs {
u_int32_t rid;
u_int32_t pad0000;
u_int32_t ioc_ctrl;
u_int32_t pad0008;
u_int8_t resv1[0x0300 - 0x0010];
u_int64_t lmmio_direct0_base;
u_int64_t lmmio_direct0_mask;
u_int64_t lmmio_direct0_route;
u_int64_t lmmio_direct1_base;
u_int64_t lmmio_direct1_mask;
u_int64_t lmmio_direct1_route;
u_int64_t lmmio_direct2_base;
u_int64_t lmmio_direct2_mask;
u_int64_t lmmio_direct2_route;
u_int64_t lmmio_direct3_base;
u_int64_t lmmio_direct3_mask;
u_int64_t lmmio_direct3_route;
u_int64_t lmmio_dist_base;
u_int64_t lmmio_dist_mask;
u_int64_t lmmio_dist_route;
u_int64_t gmmio_dist_base;
u_int64_t gmmio_dist_mask;
u_int64_t gmmio_dist_route;
u_int64_t ios_dist_base;
u_int64_t ios_dist_mask;
u_int64_t ios_dist_route;
u_int8_t resv2[0x03c0 - 0x03a8];
u_int64_t ios_direct_base;
u_int64_t ios_direct_mask;
u_int64_t ios_direct_route;
u_int8_t resv3[0x22000 - 0x03d8];
u_int64_t func_id;
u_int64_t func_class;
u_int8_t resv4[0x22040 - 0x22010];
u_int64_t rope_config;
u_int8_t resv5[0x22050 - 0x22048];
u_int64_t rope_debug;
u_int8_t resv6[0x22200 - 0x22058];
u_int64_t rope0_control;
u_int64_t rope1_control;
u_int64_t rope2_control;
u_int64_t rope3_control;
u_int64_t rope4_control;
u_int64_t rope5_control;
u_int64_t rope6_control;
u_int64_t rope7_control;
u_int8_t resv7[0x22300 - 0x22240];
u_int32_t tlb_ibase;
u_int32_t pad22300;
u_int32_t tlb_imask;
u_int32_t pad22308;
u_int32_t tlb_pcom;
u_int32_t pad22310;
u_int32_t tlb_tcnfg;
u_int32_t pad22318;
u_int64_t tlb_pdir_base;
};
#define ASTRO_IOC_CTRL_TE 0x0001 /* TOC Enable */
#define ASTRO_IOC_CTRL_CE 0x0002 /* Coalesce Enable */
#define ASTRO_IOC_CTRL_DE 0x0004 /* Dillon Enable */
#define ASTRO_IOC_CTRL_IE 0x0008 /* IOS Enable */
#define ASTRO_IOC_CTRL_OS 0x0010 /* Outbound Synchronous */
#define ASTRO_IOC_CTRL_IS 0x0020 /* Inbound Synchronous */
#define ASTRO_IOC_CTRL_RC 0x0040 /* Read Current Enable */
#define ASTRO_IOC_CTRL_L0 0x0080 /* 0-length Read Enable */
#define ASTRO_IOC_CTRL_RM 0x0100 /* Real Mode */
#define ASTRO_IOC_CTRL_NC 0x0200 /* Non-coherent Mode */
#define ASTRO_IOC_CTRL_ID 0x0400 /* Interrupt Disable */
#define ASTRO_IOC_CTRL_D4 0x0800 /* Disable 4-byte Coalescing */
#define ASTRO_IOC_CTRL_CC 0x1000 /* Increase Coalescing counter value */
#define ASTRO_IOC_CTRL_DD 0x2000 /* Disable distr. range coalescing */
#define ASTRO_IOC_CTRL_DC 0x4000 /* Disable the coalescing counter */
#define IOTTE_V 0x8000000000000000LL /* Entry valid */
#define IOTTE_PAMASK 0x000000fffffff000LL
#define IOTTE_CI 0x00000000000000ffLL /* Coherent index */
struct astro_softc {
struct device sc_dv;
bus_dma_tag_t sc_dmat;
struct astro_regs volatile *sc_regs;
u_int64_t *sc_pdir;
char sc_dvmamapname[20];
struct extent *sc_dvmamap;
struct mutex sc_dvmamtx;
struct hppa_bus_dma_tag sc_dmatag;
};
/*
* per-map DVMA page table
*/
struct iommu_page_entry {
SPLAY_ENTRY(iommu_page_entry) ipe_node;
paddr_t ipe_pa;
vaddr_t ipe_va;
bus_addr_t ipe_dva;
};
struct iommu_page_map {
SPLAY_HEAD(iommu_page_tree, iommu_page_entry) ipm_tree;
int ipm_maxpage; /* Size of allocated page map */
int ipm_pagecnt; /* Number of entries in use */
struct iommu_page_entry ipm_map[1];
};
/*
* per-map IOMMU state
*/
struct iommu_map_state {
struct astro_softc *ims_sc;
bus_addr_t ims_dvmastart;
bus_size_t ims_dvmasize;
struct extent_region ims_er;
struct iommu_page_map ims_map; /* map must be last (array at end) */
};
int astro_match(struct device *, void *, void *);
void astro_attach(struct device *, struct device *, void *);
const struct cfattach astro_ca = {
sizeof(struct astro_softc), astro_match, astro_attach
};
struct cfdriver astro_cd = {
NULL, "astro", DV_DULL
};
int iommu_dvmamap_create(void *, bus_size_t, int, bus_size_t, bus_size_t,
int, bus_dmamap_t *);
void iommu_dvmamap_destroy(void *, bus_dmamap_t);
int iommu_dvmamap_load(void *, bus_dmamap_t, void *, bus_size_t,
struct proc *, int);
int iommu_iomap_load_map(struct astro_softc *, bus_dmamap_t, int);
int iommu_dvmamap_load_mbuf(void *, bus_dmamap_t, struct mbuf *, int);
int iommu_dvmamap_load_uio(void *, bus_dmamap_t, struct uio *, int);
int iommu_dvmamap_load_raw(void *, bus_dmamap_t, bus_dma_segment_t *,
int, bus_size_t, int);
void iommu_dvmamap_unload(void *, bus_dmamap_t);
void iommu_dvmamap_sync(void *, bus_dmamap_t, bus_addr_t, bus_size_t, int);
int iommu_dvmamem_alloc(void *, bus_size_t, bus_size_t, bus_size_t,
bus_dma_segment_t *, int, int *, int);
void iommu_dvmamem_free(void *, bus_dma_segment_t *, int);
int iommu_dvmamem_map(void *, bus_dma_segment_t *, int, size_t,
caddr_t *, int);
void iommu_dvmamem_unmap(void *, caddr_t, size_t);
paddr_t iommu_dvmamem_mmap(void *, bus_dma_segment_t *, int, off_t, int, int);
void iommu_enter(struct astro_softc *, bus_addr_t, paddr_t, vaddr_t, int);
void iommu_remove(struct astro_softc *, bus_addr_t);
struct iommu_map_state *iommu_iomap_create(int);
void iommu_iomap_destroy(struct iommu_map_state *);
int iommu_iomap_insert_page(struct iommu_map_state *, vaddr_t, paddr_t);
bus_addr_t iommu_iomap_translate(struct iommu_map_state *, paddr_t);
void iommu_iomap_clear_pages(struct iommu_map_state *);
const struct hppa_bus_dma_tag astro_dmat = {
NULL,
iommu_dvmamap_create, iommu_dvmamap_destroy,
iommu_dvmamap_load, iommu_dvmamap_load_mbuf,
iommu_dvmamap_load_uio, iommu_dvmamap_load_raw,
iommu_dvmamap_unload, iommu_dvmamap_sync,
iommu_dvmamem_alloc, iommu_dvmamem_free, iommu_dvmamem_map,
iommu_dvmamem_unmap, iommu_dvmamem_mmap
};
int
astro_match(struct device *parent, void *cfdata, void *aux)
{
struct confargs *ca = aux;
/* Astro is a U-Turn variant. */
if (ca->ca_type.iodc_type != HPPA_TYPE_IOA ||
ca->ca_type.iodc_sv_model != HPPA_IOA_UTURN)
return 0;
if (ca->ca_type.iodc_model == 0x58 &&
ca->ca_type.iodc_revision >= 0x20)
return 1;
return 0;
}
void
astro_attach(struct device *parent, struct device *self, void *aux)
{
struct confargs *ca = aux, nca;
struct astro_softc *sc = (struct astro_softc *)self;
volatile struct astro_regs *r;
bus_space_handle_t ioh;
u_int32_t rid, ioc_ctrl;
psize_t size;
vaddr_t va;
paddr_t pa;
struct vm_page *m;
struct pglist mlist;
int iova_bits;
sc->sc_dmat = ca->ca_dmatag;
if (bus_space_map(ca->ca_iot, ca->ca_hpa, sizeof(struct astro_regs),
0, &ioh)) {
printf(": can't map IO space\n");
return;
}
sc->sc_regs = r = (struct astro_regs *)ca->ca_hpa;
rid = letoh32(r->rid);
printf(": Astro rev %d.%d\n", (rid & 7) + 1, (rid >> 3) & 3);
ioc_ctrl = letoh32(r->ioc_ctrl);
ioc_ctrl &= ~ASTRO_IOC_CTRL_CE;
ioc_ctrl &= ~ASTRO_IOC_CTRL_RM;
ioc_ctrl &= ~ASTRO_IOC_CTRL_NC;
r->ioc_ctrl = htole32(ioc_ctrl);
/*
* Setup the iommu.
*/
/* XXX This gives us 256MB of iova space. */
iova_bits = 28;
r->tlb_ibase = htole32(0);
r->tlb_imask = htole32(0xffffffff << iova_bits);
/* Page size is 4K. */
r->tlb_tcnfg = htole32(0);
/* Flush TLB. */
r->tlb_pcom = htole32(31);
/*
* Allocate memory for I/O pagetables. They need to be physically
* contiguous.
*/
size = (1 << (iova_bits - PAGE_SHIFT)) * sizeof(u_int64_t);
TAILQ_INIT(&mlist);
if (uvm_pglistalloc(size, 0, -1, PAGE_SIZE, 0, &mlist,
1, UVM_PLA_NOWAIT) != 0)
panic("astrottach: no memory");
va = (vaddr_t)km_alloc(size, &kv_any, &kp_none, &kd_nowait);
if (va == 0)
panic("astroattach: no memory");
sc->sc_pdir = (u_int64_t *)va;
m = TAILQ_FIRST(&mlist);
r->tlb_pdir_base = htole64(VM_PAGE_TO_PHYS(m));
/* Map the pages. */
for (; m != NULL; m = TAILQ_NEXT(m, pageq)) {
pa = VM_PAGE_TO_PHYS(m);
pmap_enter(pmap_kernel(), va, pa,
PROT_READ | PROT_WRITE, PMAP_WIRED);
va += PAGE_SIZE;
}
pmap_update(pmap_kernel());
memset(sc->sc_pdir, 0, size);
/*
* The PDC might have set up some devices to do DMA. It will do
* this for the onboard USB controller if an USB keyboard is used
* for console input. In that case, bad things will happen if we
* enable iova space. So reset the PDC devices before we do that.
* Don't do this if we're using a serial console though, since it
* will stop working if we do. This is fine since the serial port
* doesn't do DMA.
*/
if (PAGE0->mem_cons.pz_class != PCL_DUPLEX)
pdc_call((iodcio_t)pdc, 0, PDC_IO, PDC_IO_RESET_DEVICES);
/* Enable iova space. */
r->tlb_ibase = htole32(1);
/*
* Now all the hardware's working we need to allocate a dvma map.
*/
snprintf(sc->sc_dvmamapname, sizeof(sc->sc_dvmamapname),
"%s_dvma", sc->sc_dv.dv_xname);
sc->sc_dvmamap = extent_create(sc->sc_dvmamapname, 0, (1 << iova_bits),
M_DEVBUF, NULL, 0, EX_NOWAIT | EX_NOCOALESCE);
KASSERT(sc->sc_dvmamap);
mtx_init(&sc->sc_dvmamtx, IPL_HIGH);
sc->sc_dmatag = astro_dmat;
sc->sc_dmatag._cookie = sc;
nca = *ca; /* clone from us */
nca.ca_hpamask = HPPA_IOBEGIN;
nca.ca_dmatag = &sc->sc_dmatag;
pdc_scanbus(self, &nca, MAXMODBUS, 0, 0);
}
int
iommu_dvmamap_create(void *v, bus_size_t size, int nsegments,
bus_size_t maxsegsz, bus_size_t boundary, int flags, bus_dmamap_t *dmamap)
{
struct astro_softc *sc = v;
bus_dmamap_t map;
struct iommu_map_state *ims;
int error;
error = bus_dmamap_create(sc->sc_dmat, size, nsegments, maxsegsz,
boundary, flags, &map);
if (error)
return (error);
ims = iommu_iomap_create(atop(round_page(size)));
if (ims == NULL) {
bus_dmamap_destroy(sc->sc_dmat, map);
return (ENOMEM);
}
ims->ims_sc = sc;
map->_dm_cookie = ims;
*dmamap = map;
return (0);
}
void
iommu_dvmamap_destroy(void *v, bus_dmamap_t map)
{
struct astro_softc *sc = v;
/*
* The specification (man page) requires a loaded
* map to be unloaded before it is destroyed.
*/
if (map->dm_nsegs)
iommu_dvmamap_unload(sc, map);
if (map->_dm_cookie)
iommu_iomap_destroy(map->_dm_cookie);
map->_dm_cookie = NULL;
bus_dmamap_destroy(sc->sc_dmat, map);
}
int
iommu_iomap_load_map(struct astro_softc *sc, bus_dmamap_t map, int flags)
{
struct iommu_map_state *ims = map->_dm_cookie;
struct iommu_page_map *ipm = &ims->ims_map;
struct iommu_page_entry *e;
int err, seg;
paddr_t pa, paend;
vaddr_t va;
bus_size_t sgsize;
bus_size_t align, boundary;
u_long dvmaddr;
bus_addr_t dva;
int i;
/* XXX */
boundary = map->_dm_boundary;
align = PAGE_SIZE;
iommu_iomap_clear_pages(ims);
for (seg = 0; seg < map->dm_nsegs; seg++) {
struct hppa_bus_dma_segment *ds = &map->dm_segs[seg];
paend = round_page(ds->ds_addr + ds->ds_len);
for (pa = trunc_page(ds->ds_addr), va = trunc_page(ds->_ds_va);
pa < paend; pa += PAGE_SIZE, va += PAGE_SIZE) {
err = iommu_iomap_insert_page(ims, va, pa);
if (err) {
printf("iomap insert error: %d for "
"va 0x%lx pa 0x%lx\n", err, va, pa);
bus_dmamap_unload(sc->sc_dmat, map);
iommu_iomap_clear_pages(ims);
}
}
}
sgsize = ims->ims_map.ipm_pagecnt * PAGE_SIZE;
mtx_enter(&sc->sc_dvmamtx);
err = extent_alloc_with_descr(sc->sc_dvmamap, sgsize, align, 0,
boundary, EX_NOWAIT | EX_BOUNDZERO, &ims->ims_er, &dvmaddr);
mtx_leave(&sc->sc_dvmamtx);
if (err)
return (err);
ims->ims_dvmastart = dvmaddr;
ims->ims_dvmasize = sgsize;
dva = dvmaddr;
for (i = 0, e = ipm->ipm_map; i < ipm->ipm_pagecnt; ++i, ++e) {
e->ipe_dva = dva;
iommu_enter(sc, e->ipe_dva, e->ipe_pa, e->ipe_va, flags);
dva += PAGE_SIZE;
}
for (seg = 0; seg < map->dm_nsegs; seg++) {
struct hppa_bus_dma_segment *ds = &map->dm_segs[seg];
ds->ds_addr = iommu_iomap_translate(ims, ds->ds_addr);
}
return (0);
}
int
iommu_dvmamap_load(void *v, bus_dmamap_t map, void *addr, bus_size_t size,
struct proc *p, int flags)
{
struct astro_softc *sc = v;
int err;
err = bus_dmamap_load(sc->sc_dmat, map, addr, size, p, flags);
if (err)
return (err);
return iommu_iomap_load_map(sc, map, flags);
}
int
iommu_dvmamap_load_mbuf(void *v, bus_dmamap_t map, struct mbuf *m, int flags)
{
struct astro_softc *sc = v;
int err;
err = bus_dmamap_load_mbuf(sc->sc_dmat, map, m, flags);
if (err)
return (err);
return iommu_iomap_load_map(sc, map, flags);
}
int
iommu_dvmamap_load_uio(void *v, bus_dmamap_t map, struct uio *uio, int flags)
{
struct astro_softc *sc = v;
printf("load_uio\n");
return (bus_dmamap_load_uio(sc->sc_dmat, map, uio, flags));
}
int
iommu_dvmamap_load_raw(void *v, bus_dmamap_t map, bus_dma_segment_t *segs,
int nsegs, bus_size_t size, int flags)
{
struct astro_softc *sc = v;
printf("load_raw\n");
return (bus_dmamap_load_raw(sc->sc_dmat, map, segs, nsegs, size, flags));
}
void
iommu_dvmamap_unload(void *v, bus_dmamap_t map)
{
struct astro_softc *sc = v;
struct iommu_map_state *ims = map->_dm_cookie;
struct iommu_page_map *ipm = &ims->ims_map;
struct iommu_page_entry *e;
int err, i;
/* Remove the IOMMU entries. */
for (i = 0, e = ipm->ipm_map; i < ipm->ipm_pagecnt; ++i, ++e)
iommu_remove(sc, e->ipe_dva);
/* Clear the iomap. */
iommu_iomap_clear_pages(ims);
bus_dmamap_unload(sc->sc_dmat, map);
mtx_enter(&sc->sc_dvmamtx);
err = extent_free(sc->sc_dvmamap, ims->ims_dvmastart,
ims->ims_dvmasize, EX_NOWAIT);
ims->ims_dvmastart = 0;
ims->ims_dvmasize = 0;
mtx_leave(&sc->sc_dvmamtx);
if (err)
printf("warning: %ld of DVMA space lost\n", ims->ims_dvmasize);
}
void
iommu_dvmamap_sync(void *v, bus_dmamap_t map, bus_addr_t off,
bus_size_t len, int ops)
{
/* Nothing to do; DMA is cache-coherent. */
}
int
iommu_dvmamem_alloc(void *v, bus_size_t size, bus_size_t alignment,
bus_size_t boundary, bus_dma_segment_t *segs,
int nsegs, int *rsegs, int flags)
{
struct astro_softc *sc = v;
return (bus_dmamem_alloc(sc->sc_dmat, size, alignment, boundary,
segs, nsegs, rsegs, flags));
}
void
iommu_dvmamem_free(void *v, bus_dma_segment_t *segs, int nsegs)
{
struct astro_softc *sc = v;
bus_dmamem_free(sc->sc_dmat, segs, nsegs);
}
int
iommu_dvmamem_map(void *v, bus_dma_segment_t *segs, int nsegs, size_t size,
caddr_t *kvap, int flags)
{
struct astro_softc *sc = v;
return (bus_dmamem_map(sc->sc_dmat, segs, nsegs, size, kvap, flags));
}
void
iommu_dvmamem_unmap(void *v, caddr_t kva, size_t size)
{
struct astro_softc *sc = v;
bus_dmamem_unmap(sc->sc_dmat, kva, size);
}
paddr_t
iommu_dvmamem_mmap(void *v, bus_dma_segment_t *segs, int nsegs, off_t off,
int prot, int flags)
{
struct astro_softc *sc = v;
return (bus_dmamem_mmap(sc->sc_dmat, segs, nsegs, off, prot, flags));
}
/*
* Utility function used by splay tree to order page entries by pa.
*/
static inline int
iomap_compare(struct iommu_page_entry *a, struct iommu_page_entry *b)
{
return ((a->ipe_pa > b->ipe_pa) ? 1 :
(a->ipe_pa < b->ipe_pa) ? -1 : 0);
}
SPLAY_PROTOTYPE(iommu_page_tree, iommu_page_entry, ipe_node, iomap_compare);
SPLAY_GENERATE(iommu_page_tree, iommu_page_entry, ipe_node, iomap_compare);
/*
* Create a new iomap.
*/
struct iommu_map_state *
iommu_iomap_create(int n)
{
struct iommu_map_state *ims;
/* Safety for heavily fragmented data, such as mbufs */
n += 4;
if (n < 16)
n = 16;
ims = malloc(sizeof(*ims) + (n - 1) * sizeof(ims->ims_map.ipm_map[0]),
M_DEVBUF, M_NOWAIT | M_ZERO);
if (ims == NULL)
return (NULL);
/* Initialize the map. */
ims->ims_map.ipm_maxpage = n;
SPLAY_INIT(&ims->ims_map.ipm_tree);
return (ims);
}
/*
* Destroy an iomap.
*/
void
iommu_iomap_destroy(struct iommu_map_state *ims)
{
#ifdef DIAGNOSTIC
if (ims->ims_map.ipm_pagecnt > 0)
printf("iommu_iomap_destroy: %d page entries in use\n",
ims->ims_map.ipm_pagecnt);
#endif
free(ims, M_DEVBUF, 0);
}
/*
* Insert a pa entry in the iomap.
*/
int
iommu_iomap_insert_page(struct iommu_map_state *ims, vaddr_t va, paddr_t pa)
{
struct iommu_page_map *ipm = &ims->ims_map;
struct iommu_page_entry *e;
if (ipm->ipm_pagecnt >= ipm->ipm_maxpage) {
struct iommu_page_entry ipe;
ipe.ipe_pa = pa;
if (SPLAY_FIND(iommu_page_tree, &ipm->ipm_tree, &ipe))
return (0);
return (ENOMEM);
}
e = &ipm->ipm_map[ipm->ipm_pagecnt];
e->ipe_pa = pa;
e->ipe_va = va;
e->ipe_dva = 0;
e = SPLAY_INSERT(iommu_page_tree, &ipm->ipm_tree, e);
/* Duplicates are okay, but only count them once. */
if (e)
return (0);
++ipm->ipm_pagecnt;
return (0);
}
/*
* Translate a physical address (pa) into a DVMA address.
*/
bus_addr_t
iommu_iomap_translate(struct iommu_map_state *ims, paddr_t pa)
{
struct iommu_page_map *ipm = &ims->ims_map;
struct iommu_page_entry *e;
struct iommu_page_entry pe;
paddr_t offset = pa & PAGE_MASK;
pe.ipe_pa = trunc_page(pa);
e = SPLAY_FIND(iommu_page_tree, &ipm->ipm_tree, &pe);
if (e == NULL) {
panic("couldn't find pa %lx", pa);
return 0;
}
return (e->ipe_dva | offset);
}
/*
* Clear the iomap table and tree.
*/
void
iommu_iomap_clear_pages(struct iommu_map_state *ims)
{
ims->ims_map.ipm_pagecnt = 0;
SPLAY_INIT(&ims->ims_map.ipm_tree);
}
/*
* Add an entry to the IOMMU table.
*/
void
iommu_enter(struct astro_softc *sc, bus_addr_t dva, paddr_t pa, vaddr_t va,
int flags)
{
volatile u_int64_t *tte_ptr = &sc->sc_pdir[dva >> PAGE_SHIFT];
u_int64_t tte;
u_int32_t ci;
#ifdef DEBUG
printf("iommu_enter dva %lx, pa %lx, va %lx\n", dva, pa, va);
#endif
#ifdef DIAGNOSTIC
tte = letoh64(*tte_ptr);
if (tte & IOTTE_V) {
printf("Overwriting valid tte entry (dva %lx pa %lx "
"&tte %p tte %llx)\n", dva, pa, tte_ptr, tte);
extent_print(sc->sc_dvmamap);
panic("IOMMU overwrite");
}
#endif
mtsp(HPPA_SID_KERNEL, 1);
__asm volatile("lci 0(%%sr1, %1), %0" : "=r" (ci) : "r" (va));
tte = (pa & IOTTE_PAMASK) | ((ci >> 12) & IOTTE_CI);
tte |= IOTTE_V;
*tte_ptr = htole64(tte);
__asm volatile("fdc 0(%%sr1, %0)\n\tsync" : : "r" (tte_ptr));
}
/*
* Remove an entry from the IOMMU table.
*/
void
iommu_remove(struct astro_softc *sc, bus_addr_t dva)
{
volatile struct astro_regs *r = sc->sc_regs;
u_int64_t *tte_ptr = &sc->sc_pdir[dva >> PAGE_SHIFT];
u_int64_t tte;
#ifdef DIAGNOSTIC
if (dva != trunc_page(dva)) {
printf("iommu_remove: unaligned dva: %lx\n", dva);
dva = trunc_page(dva);
}
#endif
tte = letoh64(*tte_ptr);
#ifdef DIAGNOSTIC
if ((tte & IOTTE_V) == 0) {
printf("Removing invalid tte entry (dva %lx &tte %p "
"tte %llx)\n", dva, tte_ptr, tte);
extent_print(sc->sc_dvmamap);
panic("IOMMU remove overwrite");
}
#endif
*tte_ptr = htole64(tte & ~IOTTE_V);
/* Flush IOMMU. */
r->tlb_pcom = htole32(dva | PAGE_SHIFT);
}

212
sys/arch/hppa/dev/clock.c
View File

@ -1,212 +0,0 @@
/* $OpenBSD: clock.c,v 1.35 2023/02/04 19:19:36 cheloha Exp $ */
/*
* Copyright (c) 1998-2003 Michael Shalayeff
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
* THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/kernel.h>
#include <sys/clockintr.h>
#include <sys/stdint.h>
#include <sys/timetc.h>
#include <dev/clock_subr.h>
#include <machine/pdc.h>
#include <machine/iomod.h>
#include <machine/psl.h>
#include <machine/intr.h>
#include <machine/reg.h>
#include <machine/cpufunc.h>
#include <machine/autoconf.h>
uint64_t itmr_nsec_cycle_ratio;
uint64_t itmr_nsec_max;
u_int itmr_get_timecount(struct timecounter *);
int itmr_intr(void *);
void itmr_rearm(void *, uint64_t);
void itmr_trigger(void);
void itmr_trigger_masked(void);
void itmr_trigger_wrapper(void *);
struct timecounter itmr_timecounter = {
.tc_get_timecount = itmr_get_timecount,
.tc_counter_mask = 0xffffffff,
.tc_frequency = 0,
.tc_name = "itmr",
.tc_quality = 0,
.tc_priv = NULL,
.tc_user = 0,
};
const struct intrclock itmr_intrclock = {
.ic_rearm = itmr_rearm,
.ic_trigger = itmr_trigger_wrapper
};
extern todr_chip_handle_t todr_handle;
struct todr_chip_handle pdc_todr;
int
pdc_gettime(struct todr_chip_handle *handle, struct timeval *tv)
{
struct pdc_tod tod PDC_ALIGNMENT;
int error;
if ((error = pdc_call((iodcio_t)pdc, 1, PDC_TOD, PDC_TOD_READ,
&tod, 0, 0, 0, 0, 0))) {
printf("clock: failed to fetch (%d)\n", error);
return EIO;
}
tv->tv_sec = tod.sec;
tv->tv_usec = tod.usec;
return 0;
}
int
pdc_settime(struct todr_chip_handle *handle, struct timeval *tv)
{
int error;
if ((error = pdc_call((iodcio_t)pdc, 1, PDC_TOD, PDC_TOD_WRITE,
tv->tv_sec, tv->tv_usec))) {
printf("clock: failed to save (%d)\n", error);
return EIO;
}
return 0;
}
void
cpu_initclocks(void)
{
uint64_t itmr_freq = PAGE0->mem_10msec * 100;
pdc_todr.todr_gettime = pdc_gettime;
pdc_todr.todr_settime = pdc_settime;
todr_handle = &pdc_todr;
itmr_timecounter.tc_frequency = itmr_freq;
tc_init(&itmr_timecounter);
stathz = hz;
profhz = stathz * 10;
clockintr_init(CL_RNDSTAT);
itmr_nsec_cycle_ratio = itmr_freq * (1ULL << 32) / 1000000000;
itmr_nsec_max = UINT64_MAX / itmr_nsec_cycle_ratio;
cpu_startclock();
}
void
cpu_startclock(void)
{
clockintr_cpu_init(&itmr_intrclock);
clockintr_trigger();
}
int
itmr_intr(void *v)
{
clockintr_dispatch(v);
return (1);
}
void
setstatclockrate(int newhz)
{
clockintr_setstatclockrate(newhz);
}
u_int
itmr_get_timecount(struct timecounter *tc)
{
u_long __itmr;
mfctl(CR_ITMR, __itmr);
return (__itmr);
}
/*
* Program the next clock interrupt, making sure it will
* indeed happen in the future. This is done with interrupts
* disabled to avoid a possible race.
*/
void
itmr_rearm(void *unused, uint64_t nsecs)
{
uint32_t cycles, t0, t1;
register_t eiem, eirr;
if (nsecs > itmr_nsec_max)
nsecs = itmr_nsec_max;
cycles = (nsecs * itmr_nsec_cycle_ratio) >> 32;
eiem = hppa_intr_disable();
mfctl(CR_ITMR, t0);
mtctl(t0 + cycles, CR_ITMR);
mfctl(CR_ITMR, t1);
mfctl(CR_EIRR, eirr);
/*
* If at least "cycles" ITMR ticks have elapsed and the interrupt
* isn't pending, we missed. Fall back to itmr_trigger_masked().
*/
if (cycles <= t1 - t0) {
if (!ISSET(eirr, 1U << 31))
itmr_trigger_masked();
}
hppa_intr_enable(eiem);
}
void
itmr_trigger(void)
{
register_t eiem;
eiem = hppa_intr_disable();
itmr_trigger_masked();
hppa_intr_enable(eiem);
}
/* Trigger our own ITMR interrupt by setting EIR{0}. */
void
itmr_trigger_masked(void)
{
struct iomod *cpu = (struct iomod *)curcpu()->ci_hpa;
cpu->io_eir = 0;
__asm volatile ("sync" ::: "memory");
}
void
itmr_trigger_wrapper(void *unused)
{
itmr_trigger();
}

116
sys/arch/hppa/dev/com_dino.c
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@ -1,116 +0,0 @@
/* $OpenBSD: com_dino.c,v 1.5 2022/03/13 08:04:38 mpi Exp $ */
/*
* Copyright (c) 2004 Michael Shalayeff
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
* THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <sys/tty.h>
#include <machine/bus.h>
#include <machine/intr.h>
#include <machine/iomod.h>
#include <machine/autoconf.h>
#include <dev/ic/comreg.h>
#include <dev/ic/comvar.h>
#include <hppa/dev/cpudevs.h>
void *dino_intr_establish(void *sc, int irq, int pri,
int (*handler)(void *v), void *arg, const char *name);
#define COM_DINO_FREQ 7272700
struct com_dino_regs {
u_int8_t reset;
u_int8_t pad0[3];
u_int8_t test;
#define COM_DINO_PAR_LOOP 0x01
#define COM_DINO_CLK_SEL 0x02
u_int8_t pad1[3];
u_int32_t iodc;
u_int8_t pad2[0x54];
u_int8_t dither;
};
int com_dino_match(struct device *, void *, void *);
void com_dino_attach(struct device *, struct device *, void *);
const struct cfattach com_dino_ca = {
sizeof(struct com_softc), com_dino_match, com_dino_attach
};
int
com_dino_match(parent, match, aux)
struct device *parent;
void *match, *aux;
{
struct confargs *ca = aux;
if (ca->ca_type.iodc_type != HPPA_TYPE_FIO ||
ca->ca_type.iodc_sv_model != HPPA_FIO_GRS232)
return (0);
return (1);
/* HOZER comprobe1(ca->ca_iot, ca->ca_hpa + IOMOD_DEVOFFSET); */
}
void
com_dino_attach(parent, self, aux)
struct device *parent, *self;
void *aux;
{
struct com_softc *sc = (void *)self;
struct confargs *ca = aux;
struct com_dino_regs *regs = (struct com_dino_regs *)ca->ca_hpa;
sc->sc_iot = ca->ca_iot;
sc->sc_iobase = (bus_addr_t)ca->ca_hpa + IOMOD_DEVOFFSET;
if (bus_space_map(sc->sc_iot, sc->sc_iobase, COM_NPORTS,
0, &sc->sc_ioh)) {
printf(": cannot map io space\n");
return;
}
if (PAGE0->mem_cons.pz_class == PCL_DUPLEX &&
PAGE0->mem_cons.pz_hpa == ca->ca_hpa) {
bus_space_unmap(sc->sc_iot, sc->sc_ioh, COM_NPORTS);
comcnattach(sc->sc_iot, sc->sc_iobase, comdefaultrate,
COM_DINO_FREQ, comconscflag);
}
/* select clock freq */
regs->test = COM_DINO_CLK_SEL;
sc->sc_frequency = COM_DINO_FREQ;
com_attach_subr(sc);
sc->sc_ih = dino_intr_establish(parent, ca->ca_irq, IPL_TTY,
comintr, sc, sc->sc_dev.dv_xname);
}

83
sys/arch/hppa/dev/com_ssio.c
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@ -1,83 +0,0 @@
/* $OpenBSD: com_ssio.c,v 1.3 2022/03/13 08:04:38 mpi Exp $ */
/*
* Copyright (c) 2007 Mark Kettenis
*
* Permission to use, copy, modify, and distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <sys/tty.h>
#include <machine/bus.h>
#include <machine/iomod.h>
#include <dev/ic/comreg.h>
#include <dev/ic/comvar.h>
#include <hppa/dev/ssiovar.h>
#define COM_SSIO_FREQ 1843200
int com_ssio_match(struct device *, void *, void *);
void com_ssio_attach(struct device *, struct device *, void *);
const struct cfattach com_ssio_ca = {
sizeof(struct com_softc), com_ssio_match, com_ssio_attach
};
int
com_ssio_match(struct device *parent, void *match, void *aux)
{
struct cfdata *cf = match;
struct ssio_attach_args *saa = aux;
if (strcmp(saa->saa_name, "com") != 0)
return (0);
/* Check locators. */
if (cf->ssiocf_irq != SSIO_UNK_IRQ && cf->ssiocf_irq != saa->saa_irq)
return (0);
return (1);
}
void
com_ssio_attach(struct device *parent, struct device *self, void *aux)
{
struct com_softc *sc = (void *)self;
struct ssio_attach_args *saa = aux;
sc->sc_iot = saa->saa_iot;
sc->sc_iobase = saa->saa_iobase;
if (bus_space_map(sc->sc_iot, sc->sc_iobase, COM_NPORTS,
0, &sc->sc_ioh)) {
printf(": cannot map io space\n");
return;
}
if (PAGE0->mem_cons.pz_class == PCL_DUPLEX &&
PAGE0->mem_cons.pz_hpa == sc->sc_ioh) {
bus_space_unmap(sc->sc_iot, sc->sc_ioh, COM_NPORTS);
comcnattach(sc->sc_iot, sc->sc_iobase, comdefaultrate,
COM_SSIO_FREQ, comconscflag);
}
sc->sc_frequency = COM_SSIO_FREQ;
com_attach_subr(sc);
sc->sc_ih = ssio_intr_establish(IPL_TTY, saa->saa_irq,
comintr, sc, sc->sc_dev.dv_xname);
}

287
sys/arch/hppa/dev/cpu.c
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@ -1,287 +0,0 @@
/* $OpenBSD: cpu.c,v 1.44 2022/12/06 00:40:09 cheloha Exp $ */
/*
* Copyright (c) 1998-2003 Michael Shalayeff
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
* THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <sys/proc.h>
#include <sys/reboot.h>
#include <uvm/uvm_extern.h>
#include <machine/cpufunc.h>
#include <machine/pdc.h>
#include <machine/reg.h>
#include <machine/iomod.h>
#include <machine/autoconf.h>
#include <hppa/dev/cpudevs.h>
struct cpu_softc {
struct device sc_dev;
};
#ifdef MULTIPROCESSOR
struct cpu_info *cpu_hatch_info;
static volatile int start_secondary_cpu;
#endif
int cpumatch(struct device *, void *, void *);
void cpuattach(struct device *, struct device *, void *);
const struct cfattach cpu_ca = {
sizeof(struct cpu_softc), cpumatch, cpuattach
};
struct cfdriver cpu_cd = {
NULL, "cpu", DV_DULL
};
int
cpumatch(struct device *parent, void *cfdata, void *aux)
{
struct cfdata *cf = cfdata;
struct confargs *ca = aux;
/* probe any 1.0, 1.1 or 2.0 */
if (ca->ca_type.iodc_type != HPPA_TYPE_NPROC ||
ca->ca_type.iodc_sv_model != HPPA_NPROC_HPPA)
return 0;
if (cf->cf_unit >= MAXCPUS)
return 0;
return 1;
}
void
cpuattach(struct device *parent, struct device *self, void *aux)
{
/* machdep.c */
extern struct pdc_model pdc_model;
extern struct pdc_cache pdc_cache;
extern struct pdc_btlb pdc_btlb;
extern u_int cpu_ticksnum, cpu_ticksdenom;
extern u_int fpu_enable;
/* clock.c */
extern int itmr_intr(void *);
/* ipi.c */
extern int hppa_ipi_intr(void *);
struct confargs *ca = (struct confargs *)aux;
struct cpu_info *ci;
u_int mhz = 100 * cpu_ticksnum / cpu_ticksdenom;
int cpuno = self->dv_unit;
struct pglist mlist;
struct vm_page *m;
const char *p;
int error;
ci = &cpu_info[cpuno];
ci->ci_dev = self;
ci->ci_cpuid = cpuno;
ci->ci_hpa = ca->ca_hpa;
/* Allocate stack for spin up and FPU emulation. */
TAILQ_INIT(&mlist);
error = uvm_pglistalloc(PAGE_SIZE, 0, -1L, 0, 0, &mlist, 1,
UVM_PLA_NOWAIT);
if (error) {
printf(": unable to allocate CPU stack!\n");
return;
}
m = TAILQ_FIRST(&mlist);
ci->ci_stack = VM_PAGE_TO_PHYS(m);
printf (": %s ", cpu_typename);
if (pdc_model.hvers) {
static const char lvls[4][4] = { "0", "1", "1.5", "2" };
printf("L%s-%c ", lvls[pdc_model.pa_lvl], "AB"[pdc_model.mc]);
}
printf ("%d", mhz / 100);
if (mhz % 100 > 9)
printf(".%02d", mhz % 100);
printf("MHz");
if (fpu_enable) {
extern u_int fpu_version;
u_int32_t ver[2];
mtctl(fpu_enable, CR_CCR);
__asm volatile(
"fstds %%fr0,0(%0)\n\t"
"copr,0,0\n\t"
"fstds %%fr0,0(%0)"
:: "r" (&ver) : "memory");
mtctl(0, CR_CCR);
fpu_version = HPPA_FPUVER(ver[0]);
printf(", FPU %s rev %d",
hppa_mod_info(HPPA_TYPE_FPU, fpu_version >> 5),
fpu_version & 0x1f);
}
printf("\n%s: ", self->dv_xname);
p = "";
if (!pdc_cache.dc_conf.cc_sh) {
printf("%uK(%db/l) Icache, ",
pdc_cache.ic_size / 1024, pdc_cache.ic_conf.cc_line * 16);
p = "D";
}
printf("%uK(%db/l) wr-%s %scache, ",
pdc_cache.dc_size / 1024, pdc_cache.dc_conf.cc_line * 16,
pdc_cache.dc_conf.cc_wt? "thru" : "back", p);
p = "";
if (!pdc_cache.dt_conf.tc_sh) {
printf("%u ITLB, ", pdc_cache.it_size);
p = "D";
}
printf("%u %scoherent %sTLB",
pdc_cache.dt_size, pdc_cache.dt_conf.tc_cst? "" : "in", p);
if (pdc_btlb.finfo.num_c)
printf(", %u BTLB", pdc_btlb.finfo.num_c);
else if (pdc_btlb.finfo.num_i || pdc_btlb.finfo.num_d)
printf(", %u/%u D/I BTLBs",
pdc_btlb.finfo.num_i, pdc_btlb.finfo.num_d);
cpu_intr_establish(IPL_CLOCK, 31, itmr_intr, NULL, "clock");
#ifdef MULTIPROCESSOR
cpu_intr_establish(IPL_IPI, 30, hppa_ipi_intr, NULL, "ipi");
#endif
printf("\n");
}
#ifdef MULTIPROCESSOR
void
cpu_boot_secondary_processors(void)
{
struct cpu_info *ci;
struct iomod *cpu;
int i, j;
/* Initialise primary CPU. */
ci = curcpu();
ci->ci_flags |= CPUF_RUNNING;
hppa_ipi_init(ci);
for (i = 0; i < HPPA_MAXCPUS; i++) {
ci = &cpu_info[i];
if (ci->ci_cpuid == 0)
continue;
ci->ci_randseed = (arc4random() & 0x7fffffff) + 1;
sched_init_cpu(ci);
/* Release the specified CPU by triggering an EIR{0}. */
cpu_hatch_info = ci;
cpu = (struct iomod *)(ci->ci_hpa);
cpu->io_eir = 0;
asm volatile ("sync" ::: "memory");
/* Wait for CPU to wake up... */
j = 0;
while (!(ci->ci_flags & CPUF_RUNNING) && j++ < 10000)
delay(1000);
if (!(ci->ci_flags & CPUF_RUNNING))
printf("failed to hatch cpu %i!\n", ci->ci_cpuid);
}
/* Release secondary CPUs. */
start_secondary_cpu = 1;
asm volatile ("sync" ::: "memory");
}
void
cpu_hw_init(void)
{
struct cpu_info *ci = curcpu();
/* Purge TLB and flush caches. */
ptlball();
ficacheall();
fdcacheall();
/* Enable address translations. */
ci->ci_psw = PSL_I | PSL_Q | PSL_P | PSL_C | PSL_D;
ci->ci_psw |= (cpu_info[0].ci_psw & PSL_O);
}
void
cpu_hatch(void)
{
struct cpu_info *ci = curcpu();
int s;
/* Initialise IPIs. */
hppa_ipi_init(ci);
/* Initialise clock. */
mtctl((1U << 31), CR_EIRR);
ci->ci_mask |= (1U << 31);
cpu_startclock();
/* Enable interrupts. */
mtctl(ci->ci_mask, CR_EIEM);
ncpus++;
ci->ci_flags |= CPUF_RUNNING;
/* Wait for additional CPUs to spinup. */
while (!start_secondary_cpu)
;
SCHED_LOCK(s);
cpu_switchto(NULL, sched_chooseproc());
}
void
cpu_unidle(struct cpu_info *ci)
{
if (ci != curcpu())
hppa_ipi_send(ci, HPPA_IPI_NOP);
}
#endif
void
need_resched(struct cpu_info *ci)
{
ci->ci_want_resched = 1;
/* There's a risk we'll be called before the idle threads start */
if (ci->ci_curproc) {
setsoftast(ci->ci_curproc);
cpu_unidle(ci);
}
}

489
sys/arch/hppa/dev/cpudevs
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@ -1,489 +0,0 @@
$OpenBSD: cpudevs,v 1.44 2007/05/18 15:57:35 kettenis Exp $
/*
* Copyright (c) 1998-2004 Michael Shalayeff
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
* THE POSSIBILITY OF SUCH DAMAGE.
*/
type nproc 0x00 native processor
type memory 0x01 memory
type bdma 0x02 Type-B DMA (NIO Transit, Parallel, ... )
type bdirect 0x03 Type-B Direct (obsolete)
type adma 0x04 Type-A DMA (NIO HPIB, LAN, ... )
type adirect 0x05 Type-A Direct (RS232, HIL, ... )
type other 0x06 other (obsolete)
type bcport 0x07 Bus Converter Port
type cio 0x08 CIO adapter
type console 0x09 console
type fio 0x0a foreign I/O module
type bha 0x0b bus host adaptor
type ioa 0x0c IO Adapter
type bridge 0x0d Bus Bridge to Foreign Bus
type fabric 0x0e Fabric Components
# 0x0f -
# 0x1e reserved
type faulty 0x1f broken
# pseudo-types
type board 0x80 system board
type cpu 0x81 CPU chips
type fpu 0x82 FPU chips
type bus 0x83 Main Busses
board HP840 0x004 840/930 (Indigo)
board HP825 0x008 825/925 (FireFox)
board HP835 0x00a 83[45]/[69]35 (TopGun)
board HP845 0x00b 845/645 (Technical ShoGun)
board HP850 0x00C 850/950 (Cheetah)
board HP949 0x00f 949 (Commercial ShoGun)
board HP950S 0x080 950S (Cheetah)
board HP855 0x081 855/955 (Jaguar)
board HP860 0x082 860/960 (Cougar)
board HP870 0x083 865/870/980 (Panther)
board HP810 0x100 810 (Burgundy)
board HP822 0x101 822/922 (SilverFox Low)
board HP832 0x102 832/932 (SilverFox High)
board HP808 0x103 808/815/920 (Lego, SilverLite)
board HP842 0x104 842/948 (SilverBullet Low)
board HP852 0x105 852/958 (SilverBullet High)
board HPOBOE 0x106 (Oboe)
board HPDRAGON 0x180 (Dragon)
board HP890 0x181 890/990/992 (Chimera)
board HP891 0x182 891/T500 (TNT 100)
board HP892 0x183 892/T520 (TNT 120)
board HP893_T540 0x184 893/T540/T600 (Jade 180 U)
board HPHXPROC 0x1ff Hitachi X Processor
board HP720 0x200 720 (Cobra)
board HP750_66 0x201 750/66 (Coral)
board HP730_66 0x202 730/66 (King Cobra)
board HP735_99 0x203 735/99 (Hardball)
board HP755_99 0x204 755/99 (Coral II)
board HP755_125 0x205 755/125 (Coral II)
#board HP755_125E 0x205 755/125 (Snake Eagle, opt 91)
board HP735_130 0x206 735/130 (Snake Cheetah)
board HP817 0x280 817/827/957/957LX/FH20 (Nova Low)
board HP837 0x281 837/847/857/967/967LX/FGHI30 (Nova High)
board HP807 0x282 807/917/917LX/927/927LX/937/937LX/947/947LX/F10 (Nova8)
board HP867 0x283 867/877/977/GHI40 (Nova64)
board HP887T 0x284 887/897/987/GHI50 (TNova)
#board HP 0x285 (TNova64)
#board HP 0x286 (Hydra64 (Nova))
board HP887 0x287 887/897/GHI70 (Hydra96 (Nova))
board HP887T96 0x288 887/897/GHI60 (TNova96)
board HP710 0x300 710/50 (Bushmaster)
board HP705 0x302 705/35 (Flounder)
board HP715_50 0x310 715/50 (Scorpio)
board HP715_33 0x311 715/33 (Scorpio Jr.)
board HP715S_50 0x312 715S/50 (Spider-50)
board HP715S_33 0x313 715S/33 (Spider-33)
board HP715T_50 0x314 715T/50 (Trailways-50)
board HP715T_33 0x315 715T/33 (Trailways-33)
board HP715_75 0x316 715/75 (Scorpio Sr.)
board HP715_99 0x317 715/99 (Scorpio 100)
board HP725_50 0x318 725/50 (Spectra)
board HP725_75 0x319 725/75 (Spectra)
board HP725_99 0x320 725/99 (Spectra)
board HP745i_50 0x401 745i/747i/50 (Pace)
board HP742i_50 0x402 742i/50 (Sidewinder)
board HP747i_100 0x403 745i/747i/100 (Fast Pace)
board HPE23 0x480 806/E23 (Orville)
board HPE25 0x481 806/E25 (Wilbur)
board HPE35 0x482 816/E35 (Wright Brothers 80)
board HPE45 0x483 826/E45 (Wright Brothers 96)
board HPD210 0x484 811/D210/D310 (UltraLight L 100)
board HPD200 0x485 801/D200/D300 (UltraLight L 75)
board HP778_B132L 0x501 778/B132L (Merlin L2 132)
board HP778_B160L 0x502 778/B160L (Merlin L2 160)
board HP778_B132LP 0x503 778/B132L+ (Merlin L2+ 132)
board HP778_B180L 0x504 778/B180L+ (Merlin L2+ 180)
board HP779_C132L 0x505 779/C132L (Raven L2 132)
board HP779_C160L 0x506 779/C160L (Raven L2 160)
board HP779_C180L 0x507 779/C180L (Raven L2 180)
board HP779_C160L1 0x508 779/C160L (Raven L2 160)
board HP712_132L2 0x509 712/132 (L2 Upgrade)
board HP712_160L2 0x50a 712/160 (L2 Upgrade)
board HP712_132L21 0x50b 712/132 (L2 Upgrade)
board HP712_160L21 0x50c 712/160 (L2 Upgrade)
#board HP 0x50d (Rocky2 L2 120)
#board HP 0x50e (Rocky2 L2 150)
board HP744_132L 0x50f 744/132L (Anole-132L)
board HP744_165L 0x510 744/165L (Anole-165L)
#board HPKIJI132 0x511 (Kiji L2 132)
board HP803 0x512 803/D220 (UltraLight L2 132)
board HP813 0x513 813/D320 (UltraLight L2 160)
board HP778_B132 0x514 778/B132 (Merlin Jr. L2 132)
board HP800_A132 0x515 800/A132 (Staccato L2 132)
board HP800_A180C 0x516 800/A180C (Staccato L2 180)
board HP809 0x580 809/K100 (KittyHawk DC2-100)
board HP839 0x581 839/K210 (KittyHawk DC3-120)
board HP829 0x582 829/K400 (KittyHawk DC3-100)
board HP849 0x583 849/K410 (KittyHawk DC3-120)
board HP770_J210XC 0x584 770/J210XC (LighteningHawk)
board HP770_J200 0x585 770/J200 (SkyHawk 100)
board HP770_J210 0x586 770/J210 (SkyHawk 120)
board HP841 0x587 841/D210/D410 (UltraLight Proc 1-way T'120)
board HP851 0x588 851/D210-2/D410-2 (UltraLight Proc 2-way T'120)
board HP821_1 0x589 821/D200/D400 (UltraLight Proc 1-way T'100)
board HP831 0x58a 831/D200-2/D400-2 (UltraLight Proc 2-way T'100)
board HP819 0x58b 819/K200 (KittyHawk DC2 100)
board HP859 0x58c 859/K220 (ThunderHawk DC3- 120 1M)
board HP869 0x58d 869/K420 (ThunderHawk DC3 120 1M)
board HP780_C110 0x58e 780/C110 (Raven 120 T')
board HP804 0x58f 804/K450 (Mohawk 160 U 1M DC3)
board HP889 0x590 889/K460 (Mohawk 180 U 1M DC3)
#board HP889_1 0x591 889/K470 (Mohawk 200 U 1M DC3)
board HP780_C100 0x592 780/C100 (Raven 100 T')
#board HP 0x593 (FireHawk 160 U)
board HP780_J282 0x594 780/J282 (FireHawk 180 U)
#board HP 0x595 (FireHawk 220 U)
#board HP 0x596 (FireHawk 240 U)
board HP800V 0x597 800/V2200/V2500 (SPP2000)
board HP780_C230 0x598 780/C230 (Raven U 230)
board HP780_C240 0x599 780/C240 (Raven U 240)
# 0x59a reserved
board HP780_C160 0x59b 780/C160 (Raven U 160)
board HP780_C180XP 0x59c 780/C180XP (Raven U 180)
board HP780_C200 0x59d 780/C200 (Raven U 200)
#board HP 0x59e (ThunderHawk T' 120)
board HP780_C180P 0x59f 780/C180+ (Raven U 180+)
board HP841_1 0x5a0 841/D260/D360 (UltraLight 1-way T120 1MB)
board HP851_1 0x5a1 851/D260/D360 (UltraLight 2-way T120 1MB)
board HP861 0x5a2 861/D270/D370 (UltraLight 1-way U160 512K)
board HP871 0x5a3 871/D270/D370 (UltraLight 2-way U160 512K)
board HP802 0x5a4 802/K250 (MoHawk U160 1M DC3-)
board HP879 0x5a5 879/K260 (MoHawk U180 1M DC3-)
#board HP878? 0x5a6 878/K270 (MoHawk U200 1M DC3-)
#board HP 0x5a7 (UltraLight 1-way U160 1M)
#board HP 0x5a8 (UltraLight 2-way U160 1M)
board HP810D 0x5a9 810/D380/R380 (UltraLight 1-way U180 1M)
board HP820 0x5aa 820/D280 (UltraLight 2-way U180 1M)
# 0x5ab obsolete
# 0x5ac obsolete
#board HP898? 0x5ad 898/K360 (BraveHawk 180 DC3-)
board HP898 0x5ae 898/K370 (BraveHawk 200 DC3-)
#board HP 0x5af (BraveHawk 220 DC3-)
#board HP899? 0x5b0 899/K560 (BraveHawk 180 DC3)
board HP899 0x5b1 899/K570 (BraveHawk 200 DC3)
#board HP 0x5b2 (BraveHawk 220 DC3)
#board HP 0x5b3 (FireHawk 200)
board HP800V2 0x5b4 800/V2500 (SPP2500)
board HP782_J2240 0x5b5 782/J2240 (SummitHawk U+)
board HP800K 0x5b6 800/K580 (DragonHawk U+ 240 DC3)
#board HP800K? 0x5b7 800/K380 (DragonHawk U+ 240 DC3-)
#board 0x5b8 SPP2250 240MHz processor
board HP821 0x5b9 821/D350/R350 (UltraLight 1w U+/240)
board HP800D 0x5ba 800/D390/R390 (UltraLight 2w U+/240)
board HP785_C3000 0x5bb 785/C3000 (AllegroHigh W)
board HP785_B1000 0x5bc 785/B1000 (AllegroLow W)
board HP785_J5000 0x5bd 785/J5000 (Forte W 2w)
board HP800_N400036 0x5be 800/N4000-36/rp7400 (Prelude W)
board HP785_J7000 0x5bf 785/J7000 (Forte W 4w)
#board 0x5c0 (M2250)
#board 0x5c1 (M2500)
#board 0x5c2 (Sonata 440)
#board 0x5c3 (Sonata 360)
board HP800_L200044 0x5c4 800/L2000-44/rp5450 (Rhapsody 440)
board HP800_L200036 0x5c5 800/L2000-36/rp5450 (Rhapsody 360)
board HP785_C360 0x5c6 780/C360 (Raven W 360)
#board 0x5c7 (Halftone W 440)
#board 0x5c8 (Lego 360)
board HP800_L100044 0x5c9 800/L1000-44/rp5400 (Rhapsody DC-440)
board HP800_L100036 0x5ca 800/L1000-36/rp5400 (Rhapsody DC-360)
board HP897_A50044 0x5cb 897/A500-44/rp2450 (Crescendo 440)
board HP800_N400044 0x5cc 800/N4000-44/rp7400 (Prelude W 440)
#board 0x5cd SPP2600
#board 0x5ce M2600
board HP785_C3600 0x5cf 785/C3600 (Allegro)
board HP786_B2000 0x5d0 786/B2000 (Kazoo W+)
board HP785_J5600 0x5d1 785/J5600 (Forte W+ 2w)
board HP785_J7600 0x5d2 785/J7600 (Forte W+ 4w)
board HP800_N400055 0x5d3 800/N4000-55/rp7400 (Prelude W+ 550)
board HP785_J6000 0x5d4 785/J6000 (Duet W+)
board HP897_A5005X 0x5d5 897/A500-5X/rp2450 (Crescendo 550)
board HP897_A40044 0x5d6 897/A400-44/rp2400 (Crescendo 440)
board HP800_N40005X 0x5d7 800/N4000-5X/rp7410 (Keystone W+ 550)
board HP800_L150044 0x5d8 800/L1500-44/rp5430 (Rhapsody wave 2 W+)
board HP800_L150036 0x5d9 800/L1500-36/rp5430 (Rhapsody wave 2 W+)
#board 0x5da (Marcato W+ DC-)
board HP800_L30005X 0x5db 800/L3000-5X/rp5470 (Marcato W+)
board HP785_C3700 0x5dc 785/C3700
board HP785_J6700 0x5dd 785/J6700 (Duet W2)
board HP785_B2600 0x5de 785/B2600 (Piccolo W+)
#board HP 0x5df (Cantata W2)
#board HP 0x5e0 (Cantata DC- W2)
board HP897_A4006X 0x5e1 897/A400-6X/rp2430 (Crescendo DC-W2)
board HP897_A5006X 0x5e2 897/A500-6X/rp2470 (Crescendo 650 W2)
board HP897_A5007X 0x5e3 897/A500-7X/rp2470 (Crescendo 750 W2)
board HP800_N40007X 0x5e4 800/N4000-7X/rp7410 (Keystone/Matterhorn W2 750)
#board HP 0x5e5 (PowerBar W+)
board HP800_N40006X 0x5e6 800/N4000-6X/rp7410 (Keystone/Matterhorn W2 650)
#board 0x5e7 (Caribe W2 750)
#board 0x5e8 (Pikes Peak W2)
board HITACHIW 0x5ff (Hitachi W)
board HP785_C8000 0x89c 785/C8000
board HP712_60 0x600 712/60 (Gecko)
board HP712_80 0x601 712/80 (King Gecko)
board HP712_100 0x602 712/100 (King Gecko)
board HP743i_64 0x603 743i/64 (Anole-64)
board HP743i_100 0x604 743i/100 (Anole-100)
board HP712_120 0x605 712/120 (King Gecko)
#board HP 0x606 (Gila 80)
#board HP 0x607 (Gila 100)
#board HP 0x608 (Gila 120)
board HP715_80 0x609 715/80 (Scorpio-L)
board HP715_64 0x60A 715/64 (Mirage Jr.)
board HP715_100 0x60B 715/100 (Mirage Sr.)
board HP715_100XC 0x60C 715/100XC (Turnip)
board HP725_100 0x60D 725/100 (Electra)
board HP725_120 0x60E 725/120 (Electra)
board HP715_100L 0x610 715/100L (Scorpio-L)
board HP715_120L 0x611 715/120L (Scorpio-L)
board HP725_80L 0x612 725/80L (Spectra-L)
board HP725_100L 0x613 725/100L (Spectra-L)
board HP725_120L 0x614 725/120L (Spectra-L)
#board HP 0x615 /100 (Piranha 100)
#board HP 0x616 /120 (Piranha 120)
board HP743_50 0x617 743/50 (Jason)
board HP743_100 0x618 743/100 (Jason)
board HP715_80M 0x619 715/80 (Mirage)
board HP811 0x61a 811/DX5 (SAIC L-80)
board HP801 0x61b 801/DX0 (Rocky1 L-80)
board HP743T 0x61c 743T (Anole T)
board HITACHIT80 0x67e (Hitachi Tiny 80)
board HITACHIT64 0x67f (Hitachi Tiny 64)
board NEC 0x700 (NEC Aska)
# IODC_HVERSION[0..4]
bus MID_BUS 0 MID_BUS
bus SMB 1 SMB
bus HPPB 2 HP-PB
bus SUMMIT 3 Summit
bus VVSC 4 Viper-VSC
bus VHPPB 5 Viper-HPPB
bus K9KSC 6 K9-KSC
bus SPSSC 7 Spider-SSC
bus STSSC 8 Stiletto-SSC
bus GSCHPPB 9 GSC-HPPB
bus GSCHSC 10 GSC+(HSC)
bus RUNWAY 11 Runway
bus GSC 12 GSC
bus GSCP 13 GSC++
bus NECSB 14 NEC System Bus
bus ROPES 15 Ropes
bus MERCED 16 Merced
cpu SOFTEMU 0x01 Software Emulation
#cpu PCXS 0x02 PCXS (Cheetah)
#cpu PCXT 0x09 PCXT (Thunderbird)
#cpu HARP 0x0a HARP-I
cpu PCXT2 0x0b PCXT' (Thunderbird')
#cpu PA50 0x0c PA-50 (Hitachi)
cpu PCXL 0x0d PCXL (Hummingbird)
cpu PCXU 0x0e PCXU (Onyx)
cpu PCXL2 0x0f PCXL2 (Velociraptor)
cpu PCXUP 0x10 PCXU+ (Vulcan)
cpu PCXW 0x11 PCXW (Vulcan)
#cpu PCXWP 0x?? PCXW+ (Landshark)
cpu PCXW2 0x13 PCXW2 (Piranha)
#cpu PCXM 0x?? Mako
#cpu PCXM2 0x?? Shortfin
fpu SOFTEMU 0x01 Software Emulation
fpu INDIGO 0x02 Indigo
fpu TYCO 0x03 Sterling I MIU (TYCO)
fpu ROC 0x04 Sterling I MIU (ROC w/Weitek)
fpu FPCW 0x06 FPC (NMOS-III w/Weitek)
fpu FPCB 0x07 FPC (NMOS-III w/Bit)
fpu PCXS 0x08 PCXS (Timex-II)
fpu PCXT 0x09 PCXT (Rolex - CMOS-26B)
fpu HARP 0x0a HARP-I
fpu PCXT2 0x0b PCXT' (Tornado)
fpu PA50 0x0c PA-50 (Hitachi)
fpu PCXL 0x0d PCXL (CMOS-26B)
fpu PCXU 0x0e PCXU/PCXU+
fpu VR 0x0f VR
fpu PCXW 0x10 PCXW
fpu PCXW2 0x13 PCXW2
nproc HPPA 4 PA-RISC
memory ARCH 0x008 architected memory module
memory PDEP 0x009 pdep memory module
bdma PARALLEL 0x018 Parallel I/O
bdma PRDB 0x019 Parallel RDB
bdma MIDBUSPSI 0x020 MID_BUS PSI
bdma HPPBTPSI 0x02f HP-PB Transit PSI
bdma HPPBT8023 0x051 HP-PB Transit 802.3
bdma HPPBLANCON 0x052 Miura LAN/Console (J2146A)
bdma HPPB8024 0x058 HP-PB Transit 802.4
bdma LANCONS 0x060 LAN/Console
bdma EXERCISER 0x094 GSC+ Exerciser
bdma HPPBHFI 0x100 HP-PB HF Interface
#bdirect
adma SCSI 0x039 SCSI
adma FWSCSI0 0x03b Wizard FW SCSI
adma HPIB 0x040 HP-IB
adma HPPBFL 0x041 HP-PB HP-FL
adma HPPBIB 0x042 HP-PB LoQuix HP-IB
adma HPPBCL 0x043 HP-PB Crypt LoQuix
adma HPPBGPS 0x044 HP-PB Shazam GPIO
adma HPPBGPL 0x045 HP-PB LoQuix GPIO
adma 2X25 0x046 2-Port X.25 NIO_ACC
adma 4X25 0x047 4-Port X.25 NIO_ACC
adma NIMBFB 0x04a Nimbus Frame Buffer
adma NIMBCL 0x04b Nimbus Control
adma MRTI 0x04c Martian RTI
adma ACCMUX 0x04d ACC Mux
adma L8023 0x050 Lanbrusca 802.3
adma LQFDDI 0x056 HP-PB LoQuix FDDI
adma LQFDDI1 0x057 HP-PB LoQuix FDDI (28670A)
adma GTR 0x05e TI TokenRing
adma FWSCSI 0x089 FW SCSI
adma NETFC 0x091 Net FC
adma YATM 0x092 GSC+ YLIASTER ATM
adma MYRI 0x095 Hamlyn GSC+ Network Card
adma LFEMU 0x098 Lo-fat Emulator
adma VATM 0x09a GSC+ Venus ATM
adma HSCPCI 0x09d HP HSC-PCI Cards
adma ATMGSC 0x09e Alaxis GSC+ ATM
adma SHUSB 0x09f SummitHawk 230 USB
adma SHFETH 0x0a0 SummitHawk 230 100BaseT
adma MASSFC 0x0a7 Add-on mass FC
adma IPFC 0x380 Interphase NIO-FC
adma IPATM 0x381 Interphase NIO-ATM
adma IP100T 0x382 Interphase NIO-100BaseT
adma IPNIOVG 0x383 Interphase NIO-100VG
adirect APMUX 0x00d AP/MUX
adirect RS232 0x00e RS-232
adirect PEACOCK 0x00f Peacock Graphics
adirect HIL 0x014 HIL
adirect LEONARDO 0x015 Leonardo
adirect HRM 0x016 HP-PB HRM
adirect HRC 0x017 HP-PB HRC
adirect LPT 0x03a Centronics interface
adirect ATTDK 0x04e AT&T DataKit
adirect HPIB 0x09b Test&Meas GSC HPIB
adirect ROCKYKBD 0x0a8 Rocky2 Front Keyboard
adirect HICONS 0x101 Hitachi Console Module
adirect HIBOOT 0x102 Hitachi Boot Module
other MIDBVM 0x030 MID_BUS Verification Master
other MIDBVS 0x034 MID_BUS Verification Slave
other MIDBEDU 0x038 MID_BUS Verification EDU
other SPECFB 0x048 Spectograph frame buffer
other SPECCTL 0x049 Spectograph control
bcport PHANTOM 0x000 Phantom Port
bcport PORT 0x00c Bus Converter Port
cio CIO 0x010 CIO
console CHEETAH 0x01c Cheetah Console
console NULL 0x01f Jason/Anole Null Console
fio A_X25 0x02e Armyknife Optional X.25
fio 8x25 0x04f 8-Port X.25 EISA-ACC
fio SCSI 0x071 NCR 53C700 SCSI
fio LAN 0x072 Core LAN
fio HIL 0x073 Core HIL
fio CENT 0x074 Core Centronics
fio RS232 0x075 Core RS-232C
fio SGC 0x077 SGC Graphics
fio A1 0x07a Core audio (int.)
fio A2NB 0x07b Advanced audio (ext.)
fio FWSCSI 0x07c NCR 53C720 FW-SCSI
fio FDDI 0x07d Core FDDI
fio A1NB 0x07e Core audio (ext.)
fio A2 0x07f Advanced audio (int.)
fio HPIB 0x080 Core HPIB
fio TR9000 0x086 GSC IBM TokenRing
fio VMENET 0x088 VME Networking
fio BOOTROM 0x08f BOOT ROM
fio DINOPCK 0x096 Dino PC Keyboard
fio EISALAN 0x097 Cascade EISA 100VG lan
fio WHPIB 0x099 Wax/Clark/Dino HPIB
fio SPPCON 0x0a1 SPP2000 Console TTY
fio PCILAN 0x0a2 PCI Plug-In LAN
fio PCIDSK 0x0a3 PCI Plug-In Disk
fio SPPCORE 0x0a4 SPP2000 Core BA
fio SONICET 0x0a6 Sonic Ethernet
fio PCIMISC 0x0a9 Misc PCI Plug-in
fio METHEUS 0x320 Metheus Frame Buffer
fio BARCO 0x340 BARCO CX4500 VME Graphics Console
fio HUGHES 0x360 Hughes TOG VME FDDI
# Gecko section
fio GSCSI 0x082 NCR 53C710 SCSI
fio GPCFD 0x083 floppy controller
fio GPCIO 0x084 PS/2 port
fio GSGC 0x085 GIO Graphics
fio GISDN 0x087 Core ISDN
fio GSCSCSI 0x089 GSC SCSI
fio GLAN 0x08a Core LAN
fio GRS232 0x08c Core RS-232C
fio GRJ16 0x08d Optional RJ-16
bha DIO 0x003 DIO Bus Adapter
bha SGC 0x005 SGC Bus Adapter
bha GSC 0x007 GSC Bus Adapter
bha ASP 0x070 Core Bus Adapter (ASP)
bha EISA 0x076 EISA Bus Adapter
bha VME 0x078 VME Bus Adapter
bha LASI 0x081 LASI Bus Adapter
bha PCMCIA 0x08b PCMCIA Bus Adapter
bha WAX 0x08e WAX Bus Adapter
bha WEISA 0x090 WAX EISA Bus Adapter
bha TIMI 0x093 TIMI Bus Adapter
bha EPIC 0x0a5 Epic PCI Bus Adapter
ioa UTURN 0x00b U2/UTurn Runway BC Port
ioa PLUTO 0x00c Pluto BC Port
bridge DINO 0x00a PCI Bridge
bridge SAGA 0x0a5 Saga PCI Bridge
fabric DNACA 0x0aa Halfdome DNA Central Agent
fabric TOGO 0x0ab Halfdome TOGO Fabric Crossbar
fabric SAKURA 0x0ac Halfdome Sakura Fabric Router

373
sys/arch/hppa/dev/cpudevs.h
View File

@ -1,373 +0,0 @@
/*
* THIS FILE AUTOMATICALLY GENERATED. DO NOT EDIT.
* generated from:
* OpenBSD: cpudevs,v 1.44 2007/05/18 15:57:35 kettenis Exp
*/
#define HPPA_TYPE_NPROC 0x00
#define HPPA_TYPE_MEMORY 0x01
#define HPPA_TYPE_BDMA 0x02
#define HPPA_TYPE_BDIRECT 0x03
#define HPPA_TYPE_ADMA 0x04
#define HPPA_TYPE_ADIRECT 0x05
#define HPPA_TYPE_OTHER 0x06
#define HPPA_TYPE_BCPORT 0x07
#define HPPA_TYPE_CIO 0x08
#define HPPA_TYPE_CONSOLE 0x09
#define HPPA_TYPE_FIO 0x0a
#define HPPA_TYPE_BHA 0x0b
#define HPPA_TYPE_IOA 0x0c
#define HPPA_TYPE_BRIDGE 0x0d
#define HPPA_TYPE_FABRIC 0x0e
#define HPPA_TYPE_FAULTY 0x1f
#define HPPA_TYPE_BOARD 0x80
#define HPPA_TYPE_CPU 0x81
#define HPPA_TYPE_FPU 0x82
#define HPPA_TYPE_BUS 0x83
#define HPPA_BOARD_HP840 0x004
#define HPPA_BOARD_HP825 0x008
#define HPPA_BOARD_HP835 0x00a
#define HPPA_BOARD_HP845 0x00b
#define HPPA_BOARD_HP850 0x00C
#define HPPA_BOARD_HP949 0x00f
#define HPPA_BOARD_HP950S 0x080
#define HPPA_BOARD_HP855 0x081
#define HPPA_BOARD_HP860 0x082
#define HPPA_BOARD_HP870 0x083
#define HPPA_BOARD_HP810 0x100
#define HPPA_BOARD_HP822 0x101
#define HPPA_BOARD_HP832 0x102
#define HPPA_BOARD_HP808 0x103
#define HPPA_BOARD_HP842 0x104
#define HPPA_BOARD_HP852 0x105
#define HPPA_BOARD_HPOBOE 0x106
#define HPPA_BOARD_HPDRAGON 0x180
#define HPPA_BOARD_HP890 0x181
#define HPPA_BOARD_HP891 0x182
#define HPPA_BOARD_HP892 0x183
#define HPPA_BOARD_HP893_T540 0x184
#define HPPA_BOARD_HPHXPROC 0x1ff
#define HPPA_BOARD_HP720 0x200
#define HPPA_BOARD_HP750_66 0x201
#define HPPA_BOARD_HP730_66 0x202
#define HPPA_BOARD_HP735_99 0x203
#define HPPA_BOARD_HP755_99 0x204
#define HPPA_BOARD_HP755_125 0x205
#define HPPA_BOARD_HP735_130 0x206
#define HPPA_BOARD_HP817 0x280
#define HPPA_BOARD_HP837 0x281
#define HPPA_BOARD_HP807 0x282
#define HPPA_BOARD_HP867 0x283
#define HPPA_BOARD_HP887T 0x284
#define HPPA_BOARD_HP887 0x287
#define HPPA_BOARD_HP887T96 0x288
#define HPPA_BOARD_HP710 0x300
#define HPPA_BOARD_HP705 0x302
#define HPPA_BOARD_HP715_50 0x310
#define HPPA_BOARD_HP715_33 0x311
#define HPPA_BOARD_HP715S_50 0x312
#define HPPA_BOARD_HP715S_33 0x313
#define HPPA_BOARD_HP715T_50 0x314
#define HPPA_BOARD_HP715T_33 0x315
#define HPPA_BOARD_HP715_75 0x316
#define HPPA_BOARD_HP715_99 0x317
#define HPPA_BOARD_HP725_50 0x318
#define HPPA_BOARD_HP725_75 0x319
#define HPPA_BOARD_HP725_99 0x320
#define HPPA_BOARD_HP745I_50 0x401
#define HPPA_BOARD_HP742I_50 0x402
#define HPPA_BOARD_HP747I_100 0x403
#define HPPA_BOARD_HPE23 0x480
#define HPPA_BOARD_HPE25 0x481
#define HPPA_BOARD_HPE35 0x482
#define HPPA_BOARD_HPE45 0x483
#define HPPA_BOARD_HPD210 0x484
#define HPPA_BOARD_HPD200 0x485
#define HPPA_BOARD_HP778_B132L 0x501
#define HPPA_BOARD_HP778_B160L 0x502
#define HPPA_BOARD_HP778_B132LP 0x503
#define HPPA_BOARD_HP778_B180L 0x504
#define HPPA_BOARD_HP779_C132L 0x505
#define HPPA_BOARD_HP779_C160L 0x506
#define HPPA_BOARD_HP779_C180L 0x507
#define HPPA_BOARD_HP779_C160L1 0x508
#define HPPA_BOARD_HP712_132L2 0x509
#define HPPA_BOARD_HP712_160L2 0x50a
#define HPPA_BOARD_HP712_132L21 0x50b
#define HPPA_BOARD_HP712_160L21 0x50c
#define HPPA_BOARD_HP744_132L 0x50f
#define HPPA_BOARD_HP744_165L 0x510
#define HPPA_BOARD_HP803 0x512
#define HPPA_BOARD_HP813 0x513
#define HPPA_BOARD_HP778_B132 0x514
#define HPPA_BOARD_HP800_A132 0x515
#define HPPA_BOARD_HP800_A180C 0x516
#define HPPA_BOARD_HP809 0x580
#define HPPA_BOARD_HP839 0x581
#define HPPA_BOARD_HP829 0x582
#define HPPA_BOARD_HP849 0x583
#define HPPA_BOARD_HP770_J210XC 0x584
#define HPPA_BOARD_HP770_J200 0x585
#define HPPA_BOARD_HP770_J210 0x586
#define HPPA_BOARD_HP841 0x587
#define HPPA_BOARD_HP851 0x588
#define HPPA_BOARD_HP821_1 0x589
#define HPPA_BOARD_HP831 0x58a
#define HPPA_BOARD_HP819 0x58b
#define HPPA_BOARD_HP859 0x58c
#define HPPA_BOARD_HP869 0x58d
#define HPPA_BOARD_HP780_C110 0x58e
#define HPPA_BOARD_HP804 0x58f
#define HPPA_BOARD_HP889 0x590
#define HPPA_BOARD_HP780_C100 0x592
#define HPPA_BOARD_HP780_J282 0x594
#define HPPA_BOARD_HP800V 0x597
#define HPPA_BOARD_HP780_C230 0x598
#define HPPA_BOARD_HP780_C240 0x599
#define HPPA_BOARD_HP780_C160 0x59b
#define HPPA_BOARD_HP780_C180XP 0x59c
#define HPPA_BOARD_HP780_C200 0x59d
#define HPPA_BOARD_HP780_C180P 0x59f
#define HPPA_BOARD_HP841_1 0x5a0
#define HPPA_BOARD_HP851_1 0x5a1
#define HPPA_BOARD_HP861 0x5a2
#define HPPA_BOARD_HP871 0x5a3
#define HPPA_BOARD_HP802 0x5a4
#define HPPA_BOARD_HP879 0x5a5
#define HPPA_BOARD_HP810D 0x5a9
#define HPPA_BOARD_HP820 0x5aa
#define HPPA_BOARD_HP898 0x5ae
#define HPPA_BOARD_HP899 0x5b1
#define HPPA_BOARD_HP800V2 0x5b4
#define HPPA_BOARD_HP782_J2240 0x5b5
#define HPPA_BOARD_HP800K 0x5b6
#define HPPA_BOARD_HP821 0x5b9
#define HPPA_BOARD_HP800D 0x5ba
#define HPPA_BOARD_HP785_C3000 0x5bb
#define HPPA_BOARD_HP785_B1000 0x5bc
#define HPPA_BOARD_HP785_J5000 0x5bd
#define HPPA_BOARD_HP800_N400036 0x5be
#define HPPA_BOARD_HP785_J7000 0x5bf
#define HPPA_BOARD_HP800_L200044 0x5c4
#define HPPA_BOARD_HP800_L200036 0x5c5
#define HPPA_BOARD_HP785_C360 0x5c6
#define HPPA_BOARD_HP800_L100044 0x5c9
#define HPPA_BOARD_HP800_L100036 0x5ca
#define HPPA_BOARD_HP897_A50044 0x5cb
#define HPPA_BOARD_HP800_N400044 0x5cc
#define HPPA_BOARD_HP785_C3600 0x5cf
#define HPPA_BOARD_HP786_B2000 0x5d0
#define HPPA_BOARD_HP785_J5600 0x5d1
#define HPPA_BOARD_HP785_J7600 0x5d2
#define HPPA_BOARD_HP800_N400055 0x5d3
#define HPPA_BOARD_HP785_J6000 0x5d4
#define HPPA_BOARD_HP897_A5005X 0x5d5
#define HPPA_BOARD_HP897_A40044 0x5d6
#define HPPA_BOARD_HP800_N40005X 0x5d7
#define HPPA_BOARD_HP800_L150044 0x5d8
#define HPPA_BOARD_HP800_L150036 0x5d9
#define HPPA_BOARD_HP800_L30005X 0x5db
#define HPPA_BOARD_HP785_C3700 0x5dc
#define HPPA_BOARD_HP785_J6700 0x5dd
#define HPPA_BOARD_HP785_B2600 0x5de
#define HPPA_BOARD_HP897_A4006X 0x5e1
#define HPPA_BOARD_HP897_A5006X 0x5e2
#define HPPA_BOARD_HP897_A5007X 0x5e3
#define HPPA_BOARD_HP800_N40007X 0x5e4
#define HPPA_BOARD_HP800_N40006X 0x5e6
#define HPPA_BOARD_HITACHIW 0x5ff
#define HPPA_BOARD_HP785_C8000 0x89c
#define HPPA_BOARD_HP712_60 0x600
#define HPPA_BOARD_HP712_80 0x601
#define HPPA_BOARD_HP712_100 0x602
#define HPPA_BOARD_HP743I_64 0x603
#define HPPA_BOARD_HP743I_100 0x604
#define HPPA_BOARD_HP712_120 0x605
#define HPPA_BOARD_HP715_80 0x609
#define HPPA_BOARD_HP715_64 0x60A
#define HPPA_BOARD_HP715_100 0x60B
#define HPPA_BOARD_HP715_100XC 0x60C
#define HPPA_BOARD_HP725_100 0x60D
#define HPPA_BOARD_HP725_120 0x60E
#define HPPA_BOARD_HP715_100L 0x610
#define HPPA_BOARD_HP715_120L 0x611
#define HPPA_BOARD_HP725_80L 0x612
#define HPPA_BOARD_HP725_100L 0x613
#define HPPA_BOARD_HP725_120L 0x614
#define HPPA_BOARD_HP743_50 0x617
#define HPPA_BOARD_HP743_100 0x618
#define HPPA_BOARD_HP715_80M 0x619
#define HPPA_BOARD_HP811 0x61a
#define HPPA_BOARD_HP801 0x61b
#define HPPA_BOARD_HP743T 0x61c
#define HPPA_BOARD_HITACHIT80 0x67e
#define HPPA_BOARD_HITACHIT64 0x67f
#define HPPA_BOARD_NEC 0x700
#define HPPA_BUS_MID_BUS 0
#define HPPA_BUS_SMB 1
#define HPPA_BUS_HPPB 2
#define HPPA_BUS_SUMMIT 3
#define HPPA_BUS_VVSC 4
#define HPPA_BUS_VHPPB 5
#define HPPA_BUS_K9KSC 6
#define HPPA_BUS_SPSSC 7
#define HPPA_BUS_STSSC 8
#define HPPA_BUS_GSCHPPB 9
#define HPPA_BUS_GSCHSC 10
#define HPPA_BUS_RUNWAY 11
#define HPPA_BUS_GSC 12
#define HPPA_BUS_GSCP 13
#define HPPA_BUS_NECSB 14
#define HPPA_BUS_ROPES 15
#define HPPA_BUS_MERCED 16
#define HPPA_CPU_SOFTEMU 0x01
#define HPPA_CPU_PCXT2 0x0b
#define HPPA_CPU_PCXL 0x0d
#define HPPA_CPU_PCXU 0x0e
#define HPPA_CPU_PCXL2 0x0f
#define HPPA_CPU_PCXUP 0x10
#define HPPA_CPU_PCXW 0x11
#define HPPA_CPU_PCXW2 0x13
#define HPPA_FPU_SOFTEMU 0x01
#define HPPA_FPU_INDIGO 0x02
#define HPPA_FPU_TYCO 0x03
#define HPPA_FPU_ROC 0x04
#define HPPA_FPU_FPCW 0x06
#define HPPA_FPU_FPCB 0x07
#define HPPA_FPU_PCXS 0x08
#define HPPA_FPU_PCXT 0x09
#define HPPA_FPU_HARP 0x0a
#define HPPA_FPU_PCXT2 0x0b
#define HPPA_FPU_PA50 0x0c
#define HPPA_FPU_PCXL 0x0d
#define HPPA_FPU_PCXU 0x0e
#define HPPA_FPU_VR 0x0f
#define HPPA_FPU_PCXW 0x10
#define HPPA_FPU_PCXW2 0x13
#define HPPA_NPROC_HPPA 4
#define HPPA_MEMORY_ARCH 0x008
#define HPPA_MEMORY_PDEP 0x009
#define HPPA_BDMA_PARALLEL 0x018
#define HPPA_BDMA_PRDB 0x019
#define HPPA_BDMA_MIDBUSPSI 0x020
#define HPPA_BDMA_HPPBTPSI 0x02f
#define HPPA_BDMA_HPPBT8023 0x051
#define HPPA_BDMA_HPPBLANCON 0x052
#define HPPA_BDMA_HPPB8024 0x058
#define HPPA_BDMA_LANCONS 0x060
#define HPPA_BDMA_EXERCISER 0x094
#define HPPA_BDMA_HPPBHFI 0x100
#define HPPA_ADMA_SCSI 0x039
#define HPPA_ADMA_FWSCSI0 0x03b
#define HPPA_ADMA_HPIB 0x040
#define HPPA_ADMA_HPPBFL 0x041
#define HPPA_ADMA_HPPBIB 0x042
#define HPPA_ADMA_HPPBCL 0x043
#define HPPA_ADMA_HPPBGPS 0x044
#define HPPA_ADMA_HPPBGPL 0x045
#define HPPA_ADMA_2X25 0x046
#define HPPA_ADMA_4X25 0x047
#define HPPA_ADMA_NIMBFB 0x04a
#define HPPA_ADMA_NIMBCL 0x04b
#define HPPA_ADMA_MRTI 0x04c
#define HPPA_ADMA_ACCMUX 0x04d
#define HPPA_ADMA_L8023 0x050
#define HPPA_ADMA_LQFDDI 0x056
#define HPPA_ADMA_LQFDDI1 0x057
#define HPPA_ADMA_GTR 0x05e
#define HPPA_ADMA_FWSCSI 0x089
#define HPPA_ADMA_NETFC 0x091
#define HPPA_ADMA_YATM 0x092
#define HPPA_ADMA_MYRI 0x095
#define HPPA_ADMA_LFEMU 0x098
#define HPPA_ADMA_VATM 0x09a
#define HPPA_ADMA_HSCPCI 0x09d
#define HPPA_ADMA_ATMGSC 0x09e
#define HPPA_ADMA_SHUSB 0x09f
#define HPPA_ADMA_SHFETH 0x0a0
#define HPPA_ADMA_MASSFC 0x0a7
#define HPPA_ADMA_IPFC 0x380
#define HPPA_ADMA_IPATM 0x381
#define HPPA_ADMA_IP100T 0x382
#define HPPA_ADMA_IPNIOVG 0x383
#define HPPA_ADIRECT_APMUX 0x00d
#define HPPA_ADIRECT_RS232 0x00e
#define HPPA_ADIRECT_PEACOCK 0x00f
#define HPPA_ADIRECT_HIL 0x014
#define HPPA_ADIRECT_LEONARDO 0x015
#define HPPA_ADIRECT_HRM 0x016
#define HPPA_ADIRECT_HRC 0x017
#define HPPA_ADIRECT_LPT 0x03a
#define HPPA_ADIRECT_ATTDK 0x04e
#define HPPA_ADIRECT_HPIB 0x09b
#define HPPA_ADIRECT_ROCKYKBD 0x0a8
#define HPPA_ADIRECT_HICONS 0x101
#define HPPA_ADIRECT_HIBOOT 0x102
#define HPPA_OTHER_MIDBVM 0x030
#define HPPA_OTHER_MIDBVS 0x034
#define HPPA_OTHER_MIDBEDU 0x038
#define HPPA_OTHER_SPECFB 0x048
#define HPPA_OTHER_SPECCTL 0x049
#define HPPA_BCPORT_PHANTOM 0x000
#define HPPA_BCPORT_PORT 0x00c
#define HPPA_CIO_CIO 0x010
#define HPPA_CONSOLE_CHEETAH 0x01c
#define HPPA_CONSOLE_NULL 0x01f
#define HPPA_FIO_A_X25 0x02e
#define HPPA_FIO_8X25 0x04f
#define HPPA_FIO_SCSI 0x071
#define HPPA_FIO_LAN 0x072
#define HPPA_FIO_HIL 0x073
#define HPPA_FIO_CENT 0x074
#define HPPA_FIO_RS232 0x075
#define HPPA_FIO_SGC 0x077
#define HPPA_FIO_A1 0x07a
#define HPPA_FIO_A2NB 0x07b
#define HPPA_FIO_FWSCSI 0x07c
#define HPPA_FIO_FDDI 0x07d
#define HPPA_FIO_A1NB 0x07e
#define HPPA_FIO_A2 0x07f
#define HPPA_FIO_HPIB 0x080
#define HPPA_FIO_TR9000 0x086
#define HPPA_FIO_VMENET 0x088
#define HPPA_FIO_BOOTROM 0x08f
#define HPPA_FIO_DINOPCK 0x096
#define HPPA_FIO_EISALAN 0x097
#define HPPA_FIO_WHPIB 0x099
#define HPPA_FIO_SPPCON 0x0a1
#define HPPA_FIO_PCILAN 0x0a2
#define HPPA_FIO_PCIDSK 0x0a3
#define HPPA_FIO_SPPCORE 0x0a4
#define HPPA_FIO_SONICET 0x0a6
#define HPPA_FIO_PCIMISC 0x0a9
#define HPPA_FIO_METHEUS 0x320
#define HPPA_FIO_BARCO 0x340
#define HPPA_FIO_HUGHES 0x360
#define HPPA_FIO_GSCSI 0x082
#define HPPA_FIO_GPCFD 0x083
#define HPPA_FIO_GPCIO 0x084
#define HPPA_FIO_GSGC 0x085
#define HPPA_FIO_GISDN 0x087
#define HPPA_FIO_GSCSCSI 0x089
#define HPPA_FIO_GLAN 0x08a
#define HPPA_FIO_GRS232 0x08c
#define HPPA_FIO_GRJ16 0x08d
#define HPPA_BHA_DIO 0x003
#define HPPA_BHA_SGC 0x005
#define HPPA_BHA_GSC 0x007
#define HPPA_BHA_ASP 0x070
#define HPPA_BHA_EISA 0x076
#define HPPA_BHA_VME 0x078
#define HPPA_BHA_LASI 0x081
#define HPPA_BHA_PCMCIA 0x08b
#define HPPA_BHA_WAX 0x08e
#define HPPA_BHA_WEISA 0x090
#define HPPA_BHA_TIMI 0x093
#define HPPA_BHA_EPIC 0x0a5
#define HPPA_IOA_UTURN 0x00b
#define HPPA_IOA_PLUTO 0x00c
#define HPPA_BRIDGE_DINO 0x00a
#define HPPA_BRIDGE_SAGA 0x0a5
#define HPPA_FABRIC_DNACA 0x0aa
#define HPPA_FABRIC_TOGO 0x0ab
#define HPPA_FABRIC_SAKURA 0x0ac

354
sys/arch/hppa/dev/cpudevs_data.h
View File

@ -1,354 +0,0 @@
/*
* THIS FILE AUTOMATICALLY GENERATED. DO NOT EDIT.
* generated from:
* OpenBSD: cpudevs,v 1.44 2007/05/18 15:57:35 kettenis Exp
*/
{HPPA_TYPE_BOARD, HPPA_BOARD_HP840, "840/930 (Indigo)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP825, "825/925 (FireFox)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP835, "83[45]/[69]35 (TopGun)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP845, "845/645 (Technical ShoGun)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP850, "850/950 (Cheetah)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP949, "949 (Commercial ShoGun)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP950S, "950S (Cheetah)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP855, "855/955 (Jaguar)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP860, "860/960 (Cougar)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP870, "865/870/980 (Panther)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP810, "810 (Burgundy)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP822, "822/922 (SilverFox Low)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP832, "832/932 (SilverFox High)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP808, "808/815/920 (Lego, SilverLite)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP842, "842/948 (SilverBullet Low)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP852, "852/958 (SilverBullet High)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HPOBOE, "(Oboe)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HPDRAGON, "(Dragon)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP890, "890/990/992 (Chimera)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP891, "891/T500 (TNT 100)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP892, "892/T520 (TNT 120)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP893_T540, "893/T540/T600 (Jade 180 U)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HPHXPROC, "Hitachi X Processor" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP720, "720 (Cobra)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP750_66, "750/66 (Coral)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP730_66, "730/66 (King Cobra)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP735_99, "735/99 (Hardball)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP755_99, "755/99 (Coral II)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP755_125, "755/125 (Coral II)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP735_130, "735/130 (Snake Cheetah)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP817, "817/827/957/957LX/FH20 (Nova Low)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP837, "837/847/857/967/967LX/FGHI30 (Nova High)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP807, "807/917/917LX/927/927LX/937/937LX/947/947LX/F10 (Nova8)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP867, "867/877/977/GHI40 (Nova64)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP887T, "887/897/987/GHI50 (TNova)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP887, "887/897/GHI70 (Hydra96 (Nova))" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP887T96, "887/897/GHI60 (TNova96)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP710, "710/50 (Bushmaster)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP705, "705/35 (Flounder)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP715_50, "715/50 (Scorpio)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP715_33, "715/33 (Scorpio Jr.)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP715S_50, "715S/50 (Spider-50)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP715S_33, "715S/33 (Spider-33)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP715T_50, "715T/50 (Trailways-50)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP715T_33, "715T/33 (Trailways-33)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP715_75, "715/75 (Scorpio Sr.)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP715_99, "715/99 (Scorpio 100)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP725_50, "725/50 (Spectra)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP725_75, "725/75 (Spectra)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP725_99, "725/99 (Spectra)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP745I_50, "745i/747i/50 (Pace)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP742I_50, "742i/50 (Sidewinder)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP747I_100, "745i/747i/100 (Fast Pace)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HPE23, "806/E23 (Orville)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HPE25, "806/E25 (Wilbur)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HPE35, "816/E35 (Wright Brothers 80)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HPE45, "826/E45 (Wright Brothers 96)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HPD210, "811/D210/D310 (UltraLight L 100)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HPD200, "801/D200/D300 (UltraLight L 75)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP778_B132L, "778/B132L (Merlin L2 132)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP778_B160L, "778/B160L (Merlin L2 160)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP778_B132LP, "778/B132L+ (Merlin L2+ 132)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP778_B180L, "778/B180L+ (Merlin L2+ 180)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP779_C132L, "779/C132L (Raven L2 132)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP779_C160L, "779/C160L (Raven L2 160)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP779_C180L, "779/C180L (Raven L2 180)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP779_C160L1, "779/C160L (Raven L2 160)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP712_132L2, "712/132 (L2 Upgrade)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP712_160L2, "712/160 (L2 Upgrade)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP712_132L21, "712/132 (L2 Upgrade)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP712_160L21, "712/160 (L2 Upgrade)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP744_132L, "744/132L (Anole-132L)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP744_165L, "744/165L (Anole-165L)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP803, "803/D220 (UltraLight L2 132)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP813, "813/D320 (UltraLight L2 160)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP778_B132, "778/B132 (Merlin Jr. L2 132)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP800_A132, "800/A132 (Staccato L2 132)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP800_A180C, "800/A180C (Staccato L2 180)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP809, "809/K100 (KittyHawk DC2-100)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP839, "839/K210 (KittyHawk DC3-120)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP829, "829/K400 (KittyHawk DC3-100)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP849, "849/K410 (KittyHawk DC3-120)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP770_J210XC, "770/J210XC (LighteningHawk)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP770_J200, "770/J200 (SkyHawk 100)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP770_J210, "770/J210 (SkyHawk 120)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP841, "841/D210/D410 (UltraLight Proc 1-way T'120)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP851, "851/D210-2/D410-2 (UltraLight Proc 2-way T'120)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP821_1, "821/D200/D400 (UltraLight Proc 1-way T'100)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP831, "831/D200-2/D400-2 (UltraLight Proc 2-way T'100)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP819, "819/K200 (KittyHawk DC2 100)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP859, "859/K220 (ThunderHawk DC3- 120 1M)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP869, "869/K420 (ThunderHawk DC3 120 1M)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP780_C110, "780/C110 (Raven 120 T')" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP804, "804/K450 (Mohawk 160 U 1M DC3)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP889, "889/K460 (Mohawk 180 U 1M DC3)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP780_C100, "780/C100 (Raven 100 T')" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP780_J282, "780/J282 (FireHawk 180 U)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP800V, "800/V2200/V2500 (SPP2000)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP780_C230, "780/C230 (Raven U 230)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP780_C240, "780/C240 (Raven U 240)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP780_C160, "780/C160 (Raven U 160)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP780_C180XP, "780/C180XP (Raven U 180)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP780_C200, "780/C200 (Raven U 200)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP780_C180P, "780/C180+ (Raven U 180+)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP841_1, "841/D260/D360 (UltraLight 1-way T120 1MB)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP851_1, "851/D260/D360 (UltraLight 2-way T120 1MB)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP861, "861/D270/D370 (UltraLight 1-way U160 512K)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP871, "871/D270/D370 (UltraLight 2-way U160 512K)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP802, "802/K250 (MoHawk U160 1M DC3-)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP879, "879/K260 (MoHawk U180 1M DC3-)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP810D, "810/D380/R380 (UltraLight 1-way U180 1M)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP820, "820/D280 (UltraLight 2-way U180 1M)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP898, "898/K370 (BraveHawk 200 DC3-)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP899, "899/K570 (BraveHawk 200 DC3)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP800V2, "800/V2500 (SPP2500)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP782_J2240, "782/J2240 (SummitHawk U+)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP800K, "800/K580 (DragonHawk U+ 240 DC3)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP821, "821/D350/R350 (UltraLight 1w U+/240)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP800D, "800/D390/R390 (UltraLight 2w U+/240)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP785_C3000, "785/C3000 (AllegroHigh W)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP785_B1000, "785/B1000 (AllegroLow W)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP785_J5000, "785/J5000 (Forte W 2w)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP800_N400036, "800/N4000-36/rp7400 (Prelude W)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP785_J7000, "785/J7000 (Forte W 4w)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP800_L200044, "800/L2000-44/rp5450 (Rhapsody 440)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP800_L200036, "800/L2000-36/rp5450 (Rhapsody 360)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP785_C360, "780/C360 (Raven W 360)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP800_L100044, "800/L1000-44/rp5400 (Rhapsody DC-440)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP800_L100036, "800/L1000-36/rp5400 (Rhapsody DC-360)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP897_A50044, "897/A500-44/rp2450 (Crescendo 440)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP800_N400044, "800/N4000-44/rp7400 (Prelude W 440)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP785_C3600, "785/C3600 (Allegro)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP786_B2000, "786/B2000 (Kazoo W+)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP785_J5600, "785/J5600 (Forte W+ 2w)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP785_J7600, "785/J7600 (Forte W+ 4w)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP800_N400055, "800/N4000-55/rp7400 (Prelude W+ 550)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP785_J6000, "785/J6000 (Duet W+)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP897_A5005X, "897/A500-5X/rp2450 (Crescendo 550)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP897_A40044, "897/A400-44/rp2400 (Crescendo 440)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP800_N40005X, "800/N4000-5X/rp7410 (Keystone W+ 550)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP800_L150044, "800/L1500-44/rp5430 (Rhapsody wave 2 W+)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP800_L150036, "800/L1500-36/rp5430 (Rhapsody wave 2 W+)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP800_L30005X, "800/L3000-5X/rp5470 (Marcato W+)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP785_C3700, "785/C3700" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP785_J6700, "785/J6700 (Duet W2)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP785_B2600, "785/B2600 (Piccolo W+)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP897_A4006X, "897/A400-6X/rp2430 (Crescendo DC-W2)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP897_A5006X, "897/A500-6X/rp2470 (Crescendo 650 W2)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP897_A5007X, "897/A500-7X/rp2470 (Crescendo 750 W2)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP800_N40007X, "800/N4000-7X/rp7410 (Keystone/Matterhorn W2 750)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP800_N40006X, "800/N4000-6X/rp7410 (Keystone/Matterhorn W2 650)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HITACHIW, "(Hitachi W)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP785_C8000, "785/C8000" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP712_60, "712/60 (Gecko)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP712_80, "712/80 (King Gecko)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP712_100, "712/100 (King Gecko)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP743I_64, "743i/64 (Anole-64)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP743I_100, "743i/100 (Anole-100)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP712_120, "712/120 (King Gecko)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP715_80, "715/80 (Scorpio-L)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP715_64, "715/64 (Mirage Jr.)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP715_100, "715/100 (Mirage Sr.)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP715_100XC, "715/100XC (Turnip)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP725_100, "725/100 (Electra)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP725_120, "725/120 (Electra)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP715_100L, "715/100L (Scorpio-L)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP715_120L, "715/120L (Scorpio-L)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP725_80L, "725/80L (Spectra-L)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP725_100L, "725/100L (Spectra-L)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP725_120L, "725/120L (Spectra-L)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP743_50, "743/50 (Jason)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP743_100, "743/100 (Jason)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP715_80M, "715/80 (Mirage)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP811, "811/DX5 (SAIC L-80)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP801, "801/DX0 (Rocky1 L-80)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HP743T, "743T (Anole T)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HITACHIT80, "(Hitachi Tiny 80)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_HITACHIT64, "(Hitachi Tiny 64)" },
{HPPA_TYPE_BOARD, HPPA_BOARD_NEC, "(NEC Aska)" },
{HPPA_TYPE_BUS, HPPA_BUS_MID_BUS, "MID_BUS" },
{HPPA_TYPE_BUS, HPPA_BUS_SMB, "SMB" },
{HPPA_TYPE_BUS, HPPA_BUS_HPPB, "HP-PB" },
{HPPA_TYPE_BUS, HPPA_BUS_SUMMIT, "Summit" },
{HPPA_TYPE_BUS, HPPA_BUS_VVSC, "Viper-VSC" },
{HPPA_TYPE_BUS, HPPA_BUS_VHPPB, "Viper-HPPB" },
{HPPA_TYPE_BUS, HPPA_BUS_K9KSC, "K9-KSC" },
{HPPA_TYPE_BUS, HPPA_BUS_SPSSC, "Spider-SSC" },
{HPPA_TYPE_BUS, HPPA_BUS_STSSC, "Stiletto-SSC" },
{HPPA_TYPE_BUS, HPPA_BUS_GSCHPPB, "GSC-HPPB" },
{HPPA_TYPE_BUS, HPPA_BUS_GSCHSC, "GSC+(HSC)" },
{HPPA_TYPE_BUS, HPPA_BUS_RUNWAY, "Runway" },
{HPPA_TYPE_BUS, HPPA_BUS_GSC, "GSC" },
{HPPA_TYPE_BUS, HPPA_BUS_GSCP, "GSC++" },
{HPPA_TYPE_BUS, HPPA_BUS_NECSB, "NEC System Bus" },
{HPPA_TYPE_BUS, HPPA_BUS_ROPES, "Ropes" },
{HPPA_TYPE_BUS, HPPA_BUS_MERCED, "Merced" },
{HPPA_TYPE_CPU, HPPA_CPU_SOFTEMU, "Software Emulation" },
{HPPA_TYPE_CPU, HPPA_CPU_PCXT2, "PCXT' (Thunderbird')" },
{HPPA_TYPE_CPU, HPPA_CPU_PCXL, "PCXL (Hummingbird)" },
{HPPA_TYPE_CPU, HPPA_CPU_PCXU, "PCXU (Onyx)" },
{HPPA_TYPE_CPU, HPPA_CPU_PCXL2, "PCXL2 (Velociraptor)" },
{HPPA_TYPE_CPU, HPPA_CPU_PCXUP, "PCXU+ (Vulcan)" },
{HPPA_TYPE_CPU, HPPA_CPU_PCXW, "PCXW (Vulcan)" },
{HPPA_TYPE_CPU, HPPA_CPU_PCXW2, "PCXW2 (Piranha)" },
{HPPA_TYPE_FPU, HPPA_FPU_SOFTEMU, "Software Emulation" },
{HPPA_TYPE_FPU, HPPA_FPU_INDIGO, "Indigo" },
{HPPA_TYPE_FPU, HPPA_FPU_TYCO, "Sterling I MIU (TYCO)" },
{HPPA_TYPE_FPU, HPPA_FPU_ROC, "Sterling I MIU (ROC w/Weitek)" },
{HPPA_TYPE_FPU, HPPA_FPU_FPCW, "FPC (NMOS-III w/Weitek)" },
{HPPA_TYPE_FPU, HPPA_FPU_FPCB, "FPC (NMOS-III w/Bit)" },
{HPPA_TYPE_FPU, HPPA_FPU_PCXS, "PCXS (Timex-II)" },
{HPPA_TYPE_FPU, HPPA_FPU_PCXT, "PCXT (Rolex - CMOS-26B)" },
{HPPA_TYPE_FPU, HPPA_FPU_HARP, "HARP-I" },
{HPPA_TYPE_FPU, HPPA_FPU_PCXT2, "PCXT' (Tornado)" },
{HPPA_TYPE_FPU, HPPA_FPU_PA50, "PA-50 (Hitachi)" },
{HPPA_TYPE_FPU, HPPA_FPU_PCXL, "PCXL (CMOS-26B)" },
{HPPA_TYPE_FPU, HPPA_FPU_PCXU, "PCXU/PCXU+" },
{HPPA_TYPE_FPU, HPPA_FPU_VR, "VR" },
{HPPA_TYPE_FPU, HPPA_FPU_PCXW, "PCXW" },
{HPPA_TYPE_FPU, HPPA_FPU_PCXW2, "PCXW2" },
{HPPA_TYPE_NPROC, HPPA_NPROC_HPPA, "PA-RISC" },
{HPPA_TYPE_MEMORY, HPPA_MEMORY_ARCH, "architected memory module" },
{HPPA_TYPE_MEMORY, HPPA_MEMORY_PDEP, "pdep memory module" },
{HPPA_TYPE_BDMA, HPPA_BDMA_PARALLEL, "Parallel I/O" },
{HPPA_TYPE_BDMA, HPPA_BDMA_PRDB, "Parallel RDB" },
{HPPA_TYPE_BDMA, HPPA_BDMA_MIDBUSPSI, "MID_BUS PSI" },
{HPPA_TYPE_BDMA, HPPA_BDMA_HPPBTPSI, "HP-PB Transit PSI" },
{HPPA_TYPE_BDMA, HPPA_BDMA_HPPBT8023, "HP-PB Transit 802.3" },
{HPPA_TYPE_BDMA, HPPA_BDMA_HPPBLANCON, "Miura LAN/Console (J2146A)" },
{HPPA_TYPE_BDMA, HPPA_BDMA_HPPB8024, "HP-PB Transit 802.4" },
{HPPA_TYPE_BDMA, HPPA_BDMA_LANCONS, "LAN/Console" },
{HPPA_TYPE_BDMA, HPPA_BDMA_EXERCISER, "GSC+ Exerciser" },
{HPPA_TYPE_BDMA, HPPA_BDMA_HPPBHFI, "HP-PB HF Interface" },
{HPPA_TYPE_ADMA, HPPA_ADMA_SCSI, "SCSI" },
{HPPA_TYPE_ADMA, HPPA_ADMA_FWSCSI0, "Wizard FW SCSI" },
{HPPA_TYPE_ADMA, HPPA_ADMA_HPIB, "HP-IB" },
{HPPA_TYPE_ADMA, HPPA_ADMA_HPPBFL, "HP-PB HP-FL" },
{HPPA_TYPE_ADMA, HPPA_ADMA_HPPBIB, "HP-PB LoQuix HP-IB" },
{HPPA_TYPE_ADMA, HPPA_ADMA_HPPBCL, "HP-PB Crypt LoQuix" },
{HPPA_TYPE_ADMA, HPPA_ADMA_HPPBGPS, "HP-PB Shazam GPIO" },
{HPPA_TYPE_ADMA, HPPA_ADMA_HPPBGPL, "HP-PB LoQuix GPIO" },
{HPPA_TYPE_ADMA, HPPA_ADMA_2X25, "2-Port X.25 NIO_ACC" },
{HPPA_TYPE_ADMA, HPPA_ADMA_4X25, "4-Port X.25 NIO_ACC" },
{HPPA_TYPE_ADMA, HPPA_ADMA_NIMBFB, "Nimbus Frame Buffer" },
{HPPA_TYPE_ADMA, HPPA_ADMA_NIMBCL, "Nimbus Control" },
{HPPA_TYPE_ADMA, HPPA_ADMA_MRTI, "Martian RTI" },
{HPPA_TYPE_ADMA, HPPA_ADMA_ACCMUX, "ACC Mux" },
{HPPA_TYPE_ADMA, HPPA_ADMA_L8023, "Lanbrusca 802.3" },
{HPPA_TYPE_ADMA, HPPA_ADMA_LQFDDI, "HP-PB LoQuix FDDI" },
{HPPA_TYPE_ADMA, HPPA_ADMA_LQFDDI1, "HP-PB LoQuix FDDI (28670A)" },
{HPPA_TYPE_ADMA, HPPA_ADMA_GTR, "TI TokenRing" },
{HPPA_TYPE_ADMA, HPPA_ADMA_FWSCSI, "FW SCSI" },
{HPPA_TYPE_ADMA, HPPA_ADMA_NETFC, "Net FC" },
{HPPA_TYPE_ADMA, HPPA_ADMA_YATM, "GSC+ YLIASTER ATM" },
{HPPA_TYPE_ADMA, HPPA_ADMA_MYRI, "Hamlyn GSC+ Network Card" },
{HPPA_TYPE_ADMA, HPPA_ADMA_LFEMU, "Lo-fat Emulator" },
{HPPA_TYPE_ADMA, HPPA_ADMA_VATM, "GSC+ Venus ATM" },
{HPPA_TYPE_ADMA, HPPA_ADMA_HSCPCI, "HP HSC-PCI Cards" },
{HPPA_TYPE_ADMA, HPPA_ADMA_ATMGSC, "Alaxis GSC+ ATM" },
{HPPA_TYPE_ADMA, HPPA_ADMA_SHUSB, "SummitHawk 230 USB" },
{HPPA_TYPE_ADMA, HPPA_ADMA_SHFETH, "SummitHawk 230 100BaseT" },
{HPPA_TYPE_ADMA, HPPA_ADMA_MASSFC, "Add-on mass FC" },
{HPPA_TYPE_ADMA, HPPA_ADMA_IPFC, "Interphase NIO-FC" },
{HPPA_TYPE_ADMA, HPPA_ADMA_IPATM, "Interphase NIO-ATM" },
{HPPA_TYPE_ADMA, HPPA_ADMA_IP100T, "Interphase NIO-100BaseT" },
{HPPA_TYPE_ADMA, HPPA_ADMA_IPNIOVG, "Interphase NIO-100VG" },
{HPPA_TYPE_ADIRECT, HPPA_ADIRECT_APMUX, "AP/MUX" },
{HPPA_TYPE_ADIRECT, HPPA_ADIRECT_RS232, "RS-232" },
{HPPA_TYPE_ADIRECT, HPPA_ADIRECT_PEACOCK, "Peacock Graphics" },
{HPPA_TYPE_ADIRECT, HPPA_ADIRECT_HIL, "HIL" },
{HPPA_TYPE_ADIRECT, HPPA_ADIRECT_LEONARDO, "Leonardo" },
{HPPA_TYPE_ADIRECT, HPPA_ADIRECT_HRM, "HP-PB HRM" },
{HPPA_TYPE_ADIRECT, HPPA_ADIRECT_HRC, "HP-PB HRC" },
{HPPA_TYPE_ADIRECT, HPPA_ADIRECT_LPT, "Centronics interface" },
{HPPA_TYPE_ADIRECT, HPPA_ADIRECT_ATTDK, "AT&T DataKit" },
{HPPA_TYPE_ADIRECT, HPPA_ADIRECT_HPIB, "Test&Meas GSC HPIB" },
{HPPA_TYPE_ADIRECT, HPPA_ADIRECT_ROCKYKBD, "Rocky2 Front Keyboard" },
{HPPA_TYPE_ADIRECT, HPPA_ADIRECT_HICONS, "Hitachi Console Module" },
{HPPA_TYPE_ADIRECT, HPPA_ADIRECT_HIBOOT, "Hitachi Boot Module" },
{HPPA_TYPE_OTHER, HPPA_OTHER_MIDBVM, "MID_BUS Verification Master" },
{HPPA_TYPE_OTHER, HPPA_OTHER_MIDBVS, "MID_BUS Verification Slave" },
{HPPA_TYPE_OTHER, HPPA_OTHER_MIDBEDU, "MID_BUS Verification EDU" },
{HPPA_TYPE_OTHER, HPPA_OTHER_SPECFB, "Spectograph frame buffer" },
{HPPA_TYPE_OTHER, HPPA_OTHER_SPECCTL, "Spectograph control" },
{HPPA_TYPE_BCPORT, HPPA_BCPORT_PHANTOM, "Phantom Port" },
{HPPA_TYPE_BCPORT, HPPA_BCPORT_PORT, "Bus Converter Port" },
{HPPA_TYPE_CIO, HPPA_CIO_CIO, "CIO" },
{HPPA_TYPE_CONSOLE, HPPA_CONSOLE_CHEETAH, "Cheetah Console" },
{HPPA_TYPE_CONSOLE, HPPA_CONSOLE_NULL, "Jason/Anole Null Console" },
{HPPA_TYPE_FIO, HPPA_FIO_A_X25, "Armyknife Optional X.25" },
{HPPA_TYPE_FIO, HPPA_FIO_8X25, "8-Port X.25 EISA-ACC" },
{HPPA_TYPE_FIO, HPPA_FIO_SCSI, "NCR 53C700 SCSI" },
{HPPA_TYPE_FIO, HPPA_FIO_LAN, "Core LAN" },
{HPPA_TYPE_FIO, HPPA_FIO_HIL, "Core HIL" },
{HPPA_TYPE_FIO, HPPA_FIO_CENT, "Core Centronics" },
{HPPA_TYPE_FIO, HPPA_FIO_RS232, "Core RS-232C" },
{HPPA_TYPE_FIO, HPPA_FIO_SGC, "SGC Graphics" },
{HPPA_TYPE_FIO, HPPA_FIO_A1, "Core audio (int.)" },
{HPPA_TYPE_FIO, HPPA_FIO_A2NB, "Advanced audio (ext.)" },
{HPPA_TYPE_FIO, HPPA_FIO_FWSCSI, "NCR 53C720 FW-SCSI" },
{HPPA_TYPE_FIO, HPPA_FIO_FDDI, "Core FDDI" },
{HPPA_TYPE_FIO, HPPA_FIO_A1NB, "Core audio (ext.)" },
{HPPA_TYPE_FIO, HPPA_FIO_A2, "Advanced audio (int.)" },
{HPPA_TYPE_FIO, HPPA_FIO_HPIB, "Core HPIB" },
{HPPA_TYPE_FIO, HPPA_FIO_TR9000, "GSC IBM TokenRing" },
{HPPA_TYPE_FIO, HPPA_FIO_VMENET, "VME Networking" },
{HPPA_TYPE_FIO, HPPA_FIO_BOOTROM, "BOOT ROM" },
{HPPA_TYPE_FIO, HPPA_FIO_DINOPCK, "Dino PC Keyboard" },
{HPPA_TYPE_FIO, HPPA_FIO_EISALAN, "Cascade EISA 100VG lan" },
{HPPA_TYPE_FIO, HPPA_FIO_WHPIB, "Wax/Clark/Dino HPIB" },
{HPPA_TYPE_FIO, HPPA_FIO_SPPCON, "SPP2000 Console TTY" },
{HPPA_TYPE_FIO, HPPA_FIO_PCILAN, "PCI Plug-In LAN" },
{HPPA_TYPE_FIO, HPPA_FIO_PCIDSK, "PCI Plug-In Disk" },
{HPPA_TYPE_FIO, HPPA_FIO_SPPCORE, "SPP2000 Core BA" },
{HPPA_TYPE_FIO, HPPA_FIO_SONICET, "Sonic Ethernet" },
{HPPA_TYPE_FIO, HPPA_FIO_PCIMISC, "Misc PCI Plug-in" },
{HPPA_TYPE_FIO, HPPA_FIO_METHEUS, "Metheus Frame Buffer" },
{HPPA_TYPE_FIO, HPPA_FIO_BARCO, "BARCO CX4500 VME Graphics Console" },
{HPPA_TYPE_FIO, HPPA_FIO_HUGHES, "Hughes TOG VME FDDI" },
{HPPA_TYPE_FIO, HPPA_FIO_GSCSI, "NCR 53C710 SCSI" },
{HPPA_TYPE_FIO, HPPA_FIO_GPCFD, "floppy controller" },
{HPPA_TYPE_FIO, HPPA_FIO_GPCIO, "PS/2 port" },
{HPPA_TYPE_FIO, HPPA_FIO_GSGC, "GIO Graphics" },
{HPPA_TYPE_FIO, HPPA_FIO_GISDN, "Core ISDN" },
{HPPA_TYPE_FIO, HPPA_FIO_GSCSCSI, "GSC SCSI" },
{HPPA_TYPE_FIO, HPPA_FIO_GLAN, "Core LAN" },
{HPPA_TYPE_FIO, HPPA_FIO_GRS232, "Core RS-232C" },
{HPPA_TYPE_FIO, HPPA_FIO_GRJ16, "Optional RJ-16" },
{HPPA_TYPE_BHA, HPPA_BHA_DIO, "DIO Bus Adapter" },
{HPPA_TYPE_BHA, HPPA_BHA_SGC, "SGC Bus Adapter" },
{HPPA_TYPE_BHA, HPPA_BHA_GSC, "GSC Bus Adapter" },
{HPPA_TYPE_BHA, HPPA_BHA_ASP, "Core Bus Adapter (ASP)" },
{HPPA_TYPE_BHA, HPPA_BHA_EISA, "EISA Bus Adapter" },
{HPPA_TYPE_BHA, HPPA_BHA_VME, "VME Bus Adapter" },
{HPPA_TYPE_BHA, HPPA_BHA_LASI, "LASI Bus Adapter" },
{HPPA_TYPE_BHA, HPPA_BHA_PCMCIA, "PCMCIA Bus Adapter" },
{HPPA_TYPE_BHA, HPPA_BHA_WAX, "WAX Bus Adapter" },
{HPPA_TYPE_BHA, HPPA_BHA_WEISA, "WAX EISA Bus Adapter" },
{HPPA_TYPE_BHA, HPPA_BHA_TIMI, "TIMI Bus Adapter" },
{HPPA_TYPE_BHA, HPPA_BHA_EPIC, "Epic PCI Bus Adapter" },
{HPPA_TYPE_IOA, HPPA_IOA_UTURN, "U2/UTurn Runway BC Port" },
{HPPA_TYPE_IOA, HPPA_IOA_PLUTO, "Pluto BC Port" },
{HPPA_TYPE_BRIDGE, HPPA_BRIDGE_DINO, "PCI Bridge" },
{HPPA_TYPE_BRIDGE, HPPA_BRIDGE_SAGA, "Saga PCI Bridge" },
{HPPA_TYPE_FABRIC, HPPA_FABRIC_DNACA, "Halfdome DNA Central Agent" },
{HPPA_TYPE_FABRIC, HPPA_FABRIC_TOGO, "Halfdome TOGO Fabric Crossbar" },
{HPPA_TYPE_FABRIC, HPPA_FABRIC_SAKURA, "Halfdome Sakura Fabric Router" },
{ -1 }

119
sys/arch/hppa/dev/devlist2h.awk
View File

@ -1,119 +0,0 @@
# $OpenBSD: devlist2h.awk,v 1.6 2004/04/07 18:24:19 mickey Exp $
#
# Copyright (c) 1998-2003 Michael Shalayeff
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
# INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
# SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
# STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
# IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
# THE POSSIBILITY OF SUCH DAMAGE.
#
BEGIN {
ncpu = 0;
cpuh="cpudevs.h";
cpud="cpudevs_data.h";
SUBSEP = "_";
}
/^[ \t]*$/ {next}
/^[ \t]*\/\*/ {busted++}
/^[ \t]*#/ {next}
busted {
cp = match($0, /\*\//);
if(!cp) {
next;
} else if (cp + 1 == length($0)) {
busted = 0;
next;
} else {
sub(/.*\*\//, "");
busted = 0;
}
}
# first line is rcsid, beware
NR == 1 {
VERSION = $0;
gsub("\\$", "", VERSION);
printf("/*\n * THIS FILE AUTOMATICALLY GENERATED. DO NOT EDIT.\n" \
" * generated from:\n *\t%s\n */\n\n", VERSION) > cpud;
printf("/*\n * THIS FILE AUTOMATICALLY GENERATED. DO NOT EDIT.\n" \
" * generated from:\n *\t%s\n */\n\n", VERSION) > cpuh;
}
$1 == "type" {
printf("#define\tHPPA_TYPE_%s\t%s\n", toupper($2), $3) > cpuh;
types[tolower($2)] = toupper($2);
next;
}
NR > 1 {
if (tolower($1) in types) {
printf("#define\tHPPA_%s_%s\t%s\n", toupper($1),
toupper($2), $3) > cpuh;
printf("{HPPA_TYPE_%s,\tHPPA_%s_%s,\t\"", toupper($1),
toupper($1), toupper($2), $3) > cpud;
f = 4;
while (f <= NF) {
sub(/[ \t]*/, "", $f);
ep = match($f, /\*\//);
if (busted && !ep) {
f++;
continue;
}
if (match($f, /\/\*/)) {
if (ep) {
sub(/\/\*/, "", $f);
} else {
sub(/\/\*.*$/, "", $f);
busted++;
}
}
if (ep) {
gsub(/^.*\*\//, "", $f);
busted = 0;
}
if (length($f)) {
if (f > 4)
printf (" ") > cpud;
printf ("%s", $f) > cpud;
}
f++;
}
printf("\" },\n") > cpud;
} else {
printf("WHA at line %d\n", NR);
exit(1);
}
}
END {
if (busted) {
print("unterminated comment at the EOF\n");
exit(1);
}
printf("{ -1 }\n") > cpud;
}

1840
sys/arch/hppa/dev/dino.c
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File diff suppressed because it is too large Load Diff

1351
sys/arch/hppa/dev/elroy.c
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File diff suppressed because it is too large Load Diff

148
sys/arch/hppa/dev/elroyreg.h
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@ -1,148 +0,0 @@
/* $OpenBSD: elroyreg.h,v 1.1 2007/05/21 22:43:38 kettenis Exp $ */
/*
* Copyright (c) 2005 Michael Shalayeff
* All rights reserved.
*
* Permission to use, copy, modify, and distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF MIND, USE, DATA OR PROFITS, WHETHER IN
* AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT
* OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
struct elroy_regs {
/* std PCI bridge header */
u_int32_t pci_id; /* 0x000 rw PCI_ID */
u_int32_t pci_cmdstat; /* 0x004 rw PCI_COMMAND_STATUS_REG */
u_int32_t pci_class; /* 0x008 ro PCI_CLASS_REG */
u_int32_t pci_bhlc; /* 0x00c rw PCI_BHLC_REG */
u_int32_t res0[0x30/4]; /* 0x010 */
/* HW Bridge registers */
u_int32_t pci_conf_addr; /* 0x040 rw config space address */
u_int32_t pad040;
u_int32_t pci_conf_data; /* 0x048 rw config space data */
u_int32_t pad048;
u_int64_t elroy_mtlt; /* 0x050 */
u_int32_t busnum; /* 0x058 bus number/scratch */
u_int32_t par058;
u_int64_t res1; /* 0x060 */
u_int64_t rope; /* 0x068 rope parity, loopback */
u_int64_t err_addr; /* 0x070 error log: address */
u_int64_t suspend; /* 0x078 rw suspend control */
u_int32_t arb_mask; /* 0x080 rw arbitration mask */
u_int32_t pad080;
#define ELROY_ARB_ENABLE 0x01 /* enable arbitration */
#define ELROY_ARB_PCIDEVA 0x02 /* PCI device A allow */
#define ELROY_ARB_PCIDEVB 0x04 /* PCI device A allow */
#define ELROY_ARB_PCIDEVC 0x08 /* PCI device A allow */
#define ELROY_ARB_PCIDEVD 0x10 /* PCI device A allow */
#define ELROY_ARB_PCIDEVE 0x20 /* PCI device A allow */
#define ELROY_ARB_PCIDEVF 0x40 /* PCI device A allow */
#define ELROY_ARB_PCIDEVG 0x80 /* PCI device A allow */
u_int64_t arb_pri; /* 0x088 arbitration priority */
u_int64_t arb_mode; /* 0x090 arbitration mode */
u_int64_t mtlt; /* 0x098 */
u_int64_t res2[12]; /* 0x0a0 */
u_int64_t mod_info; /* 0x100 */
u_int32_t control; /* 0x108 */
#define ELROY_CONTROL_RF 0x01 /* reset pci */
#define ELROY_CONTROL_VE 0x08 /* VGA enable */
#define ELROY_CONTROL_CL 0x10 /* clear error log */
#define ELROY_CONTROL_CE 0x20 /* clear error log enable */
#define ELROY_CONTROL_HF 0x40 /* hard fail enable */
u_int32_t status; /* 0x10c */
#define ELROY_STATUS_RC 0x01 /* reset complete */
#define ELROY_STATUS_BITS "\020\01RC"
u_int64_t res3[30]; /* 0x110 */
u_int64_t lmmio_base; /* 0x200 */
u_int64_t lmmio_mask; /* 0x208 */
u_int64_t gmmio_base; /* 0x210 */
u_int64_t gmmio_mask; /* 0x218 */
u_int64_t wlmmio_base; /* 0x220 */
u_int64_t wlmmio_mask; /* 0x228 */
u_int64_t wgmmio_base; /* 0x230 */
u_int64_t wgmmio_mask; /* 0x238 */
u_int32_t io_base; /* 0x240 */
u_int32_t pad240;
u_int32_t io_mask; /* 0x248 */
u_int32_t pad248;
u_int32_t res4[4]; /* 0x250 */
u_int32_t eio_base; /* 0x260 */
u_int32_t pad260;
u_int32_t eio_mask; /* 0x268 */
u_int32_t pad268;
#define ELROY_BASE_RE 0x01 /* range enable */
u_int64_t res5; /* 0x270 */
u_int64_t dmac_ctrl; /* 0x278 DMA connection control */
u_int64_t res6[16]; /* 0x280 */
u_int32_t ibase; /* 0x300 */
u_int32_t pad300;
u_int32_t imask; /* 0x308 */
u_int32_t pad308;
u_int64_t hint_cfg; /* 0x310 */
u_int64_t res7[13]; /* 0x318 */
u_int64_t hints[14]; /* 0x380 */
u_int64_t res8[2]; /* 0x3f0 */
u_int64_t res9[64]; /* 0x400 */
u_int64_t pad0; /* 0x600 */
u_int64_t pci_drive; /* 0x608 */
u_int64_t rope_cfg; /* 0x610 */
u_int64_t clk_ctl; /* 0x618 */
u_int32_t pad1; /* 0x620 */
u_int32_t res10[23]; /* 0x624 */
u_int32_t err_cfg; /* 0x680 error config */
u_int32_t pad680;
#define ELROY_ERRCFG_PW 0x01 /* PIO writes parity errors */
#define ELROY_ERRCFG_PR 0x02 /* PIO reads parity errors */
#define ELROY_ERRCFG_DW 0x04 /* DMA writes parity errors */
#define ELROY_ERRCFG_DR 0x08 /* DMA reads parity errors */
#define ELROY_ERRCFG_CM 0x10 /* no fatal on config space */
#define ELROY_ERRCFG_SMART 0x20 /* smart bus mode */
u_int64_t err_stat; /* 0x688 error status */
u_int64_t err_mid; /* 0x690 error log: master id */
u_int64_t rope_estat; /* 0x698 rope error status */
u_int64_t rope_eclr; /* 0x6a0 rope error clear */
u_int64_t res11[42]; /* 0x6a8 */
u_int64_t regbus; /* 0x7f8 reads 0x3ff */
u_int32_t apic_addr; /* 0x800 APIC address register */
u_int32_t pad800;
u_int64_t res12;
u_int32_t apic_data; /* 0x810 APIC data register */
u_int32_t pad808;
u_int64_t res13[5];
u_int32_t apic_eoi; /* 0x840 APIC interrupt ack */
u_int32_t pad840;
u_int32_t apic_softint; /* 0x850 write generates softint */
u_int32_t pad850;
u_int64_t res14[123]; /* 0x858 */
/*0x1000 */
} __packed;
/* APIC registers */
#define APIC_VERSION 0x01
#define APIC_VERSION_MASK 0xff
#define APIC_VERSION_NENT 0xff0000
#define APIC_VERSION_NENT_SHIFT 16
#define APIC_ENT0(i) (0x10 + (i)*2)
#define APIC_ENT0_VEC 0x000ff
#define APIC_ENT0_MOD 0x00700 /* delivery mode */
#define APIC_ENT0_FXD 0x00000
#define APIC_ENT0_RDR 0x00100
#define APIC_ENT0_PMI 0x00200
#define APIC_ENT0_NMI 0x00400
#define APIC_ENT0_INI 0x00500
#define APIC_ENT0_EXT 0x00700
#define APIC_ENT0_PEND 0x01000 /* int is pending */
#define APIC_ENT0_LOW 0x02000 /* polarity */
#define APIC_ENT0_LEV 0x08000 /* edge/level */
#define APIC_ENT0_MASK 0x10000 /* mask int */
#define APIC_ENT1(i) (0x11 + (i)*2)

57
sys/arch/hppa/dev/elroyvar.h
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@ -1,57 +0,0 @@
/* $OpenBSD: elroyvar.h,v 1.4 2009/08/22 02:54:50 mk Exp $ */
/*
* Copyright (c) 2005 Michael Shalayeff
* All rights reserved.
*
* Permission to use, copy, modify, and distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF MIND, USE, DATA OR PROFITS, WHETHER IN
* AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT
* OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include <machine/pdc.h>
struct elroy_softc {
struct device sc_dv;
int sc_ver;
hppa_hpa_t sc_hpa;
bus_space_tag_t sc_bt;
bus_space_handle_t sc_bh;
bus_dma_tag_t sc_dmat;
volatile struct elroy_regs *sc_regs;
bus_addr_t sc_iobase;
u_int32_t sc_imr;
int sc_nints;
int *sc_irq;
struct pdc_pat_pci_rt *sc_int_tbl;
int sc_int_tbl_sz;
struct hppa_pci_chipset_tag sc_pc;
struct hppa_bus_space_tag sc_iot;
struct hppa_bus_space_tag sc_memt;
char sc_memexname[20];
struct extent *sc_memex;
struct hppa_bus_dma_tag sc_dmatag;
};
void apic_attach(struct elroy_softc *sc);
int apic_intr(void *v);
int apic_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp);
const char *apic_intr_string(void *v, pci_intr_handle_t ih);
void *apic_intr_establish(void *v, pci_intr_handle_t ih, int pri,
int (*handler)(void *), void *arg, const char *name);
void apic_intr_disestablish(void *v, void *cookie);
void elroy_write32(volatile u_int32_t *p, u_int32_t v);
u_int32_t elroy_read32(volatile u_int32_t *p);

91
sys/arch/hppa/dev/gecko.c
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@ -1,91 +0,0 @@
/* $OpenBSD: gecko.c,v 1.2 2022/03/13 08:04:38 mpi Exp $ */
/*
* Copyright (c) 2007 Mark Kettenis
*
* Permission to use, copy, modify, and distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include <sys/param.h>
#include <sys/device.h>
#include <sys/kernel.h>
#include <sys/systm.h>
#include <machine/autoconf.h>
#include <machine/bus.h>
#include <machine/cpu.h>
#include <machine/iomod.h>
#include <machine/pdc.h>
#include <hppa/dev/cpudevs.h>
struct gecko_softc {
struct device sc_dv;
bus_space_tag_t sc_iot;
bus_space_handle_t sc_ioh;
};
int gecko_match(struct device *, void *, void *);
void gecko_attach(struct device *, struct device *, void *);
const struct cfattach gecko_ca = {
sizeof(struct gecko_softc), gecko_match, gecko_attach
};
struct cfdriver gecko_cd = {
NULL, "gecko", DV_DULL
};
int
gecko_match(struct device *parent, void *match, void *aux)
{
struct confargs *ca = aux;
if (ca->ca_type.iodc_type != HPPA_TYPE_BCPORT ||
ca->ca_type.iodc_sv_model != HPPA_BCPORT_PORT)
return (0);
if (ca->ca_type.iodc_model == 0x50 &&
ca->ca_type.iodc_revision == 0x00)
return (1);
return (0);
}
void
gecko_attach(struct device *parent, struct device *self, void *aux)
{
struct gecko_softc *sc = (struct gecko_softc *)self;
struct confargs *ca = aux, nca;
bus_space_handle_t ioh;
volatile struct iomod *regs;
sc->sc_iot = ca->ca_iot;
if (bus_space_map(sc->sc_iot, ca->ca_hpa, IOMOD_HPASIZE, 0,
&sc->sc_ioh)) {
printf(": can't map IO space\n");
return;
}
regs = bus_space_vaddr(ca->ca_iot, ioh);
#if 1
printf(": %x-%x", regs->io_io_low, regs->io_io_high);
#endif
printf("\n");
nca = *ca;
nca.ca_hpamask = HPPA_IOBEGIN;
pdc_scanbus(self, &nca, MAXMODBUS, regs->io_io_low);
}

238
sys/arch/hppa/dev/lasi.c
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@ -1,238 +0,0 @@
/* $OpenBSD: lasi.c,v 1.23 2018/05/14 13:54:39 kettenis Exp $ */
/*
* Copyright (c) 1998-2003 Michael Shalayeff
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
* THE POSSIBILITY OF SUCH DAMAGE.
*/
#undef LASIDEBUG
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <sys/reboot.h>
#include <machine/bus.h>
#include <machine/iomod.h>
#include <machine/reg.h>
#include <machine/autoconf.h>
#include <hppa/dev/cpudevs.h>
#include <hppa/gsc/gscbusvar.h>
#define LASI_IOMASK 0xfff00000
struct lasi_hwr {
u_int32_t lasi_power;
#define LASI_BLINK 0x01
#define LASI_OFF 0x02
u_int32_t lasi_error;
u_int32_t lasi_version;
u_int32_t lasi_reset;
u_int32_t lasi_arbmask;
};
struct lasi_softc {
struct device sc_dev;
struct lasi_hwr volatile *sc_hw;
struct gsc_attach_args ga; /* for deferred attach */
};
int lasimatch(struct device *, void *, void *);
void lasiattach(struct device *, struct device *, void *);
const struct cfattach lasi_ca = {
sizeof(struct lasi_softc), lasimatch, lasiattach
};
struct cfdriver lasi_cd = {
NULL, "lasi", DV_DULL
};
void lasi_cold_hook(int on);
void lasi_gsc_attach(struct device *self);
int
lasimatch(parent, cfdata, aux)
struct device *parent;
void *cfdata;
void *aux;
{
struct confargs *ca = aux;
/* struct cfdata *cf = cfdata; */
if (ca->ca_type.iodc_type != HPPA_TYPE_BHA ||
ca->ca_type.iodc_sv_model != HPPA_BHA_LASI)
return 0;
return 1;
}
void
lasiattach(parent, self, aux)
struct device *parent;
struct device *self;
void *aux;
{
struct lasi_softc *sc = (struct lasi_softc *)self;
struct confargs *ca = aux;
struct gscbus_ic *ic;
bus_space_handle_t ioh, ioh2;
int s;
if (bus_space_map(ca->ca_iot, ca->ca_hpa,
IOMOD_HPASIZE, 0, &ioh)) {
printf(": can't map TRS space\n");
return;
}
if (bus_space_map(ca->ca_iot, ca->ca_hpa + 0xc000,
IOMOD_HPASIZE, 0, &ioh2)) {
bus_space_unmap(ca->ca_iot, ioh, IOMOD_HPASIZE);
printf(": can't map IO space\n");
return;
}
sc->sc_hw = (struct lasi_hwr *)(ca->ca_hpa + 0xc000);
ic = (struct gscbus_ic *)ca->ca_hpa;
/* XXX should we reset the chip here? */
printf(": rev %d.%d\n", (sc->sc_hw->lasi_version & 0xf0) >> 4,
sc->sc_hw->lasi_version & 0xf);
/* interrupts guts */
s = splhigh();
ic->iar = 0; /* will be set up by gsc when attaching */
ic->icr = 0;
ic->imr = ~0U;
(void)ic->irr;
ic->imr = 0;
splx(s);
#ifdef USELEDS
/* figure out the leds address */
switch (cpu_hvers) {
case HPPA_BOARD_HP712_60:
case HPPA_BOARD_HP712_80:
case HPPA_BOARD_HP712_100:
case HPPA_BOARD_HP743I_64:
case HPPA_BOARD_HP743I_100:
case HPPA_BOARD_HP712_120:
break; /* only has one led. works different */
case HPPA_BOARD_HP715_64:
case HPPA_BOARD_HP715_80:
case HPPA_BOARD_HP715_100:
case HPPA_BOARD_HP715_100XC:
case HPPA_BOARD_HP725_100:
case HPPA_BOARD_HP725_120:
if (bus_space_map(ca->ca_iot, ca->ca_hpa - 0x20000,
4, 0, (bus_space_handle_t *)&machine_ledaddr))
machine_ledaddr = NULL;
machine_ledword = 1;
break;
case HPPA_BOARD_HP800_A180C:
case HPPA_BOARD_HP778_B132L:
case HPPA_BOARD_HP778_B132LP:
case HPPA_BOARD_HP778_B160L:
case HPPA_BOARD_HP778_B180L:
case HPPA_BOARD_HP780_C100:
case HPPA_BOARD_HP780_C110:
case HPPA_BOARD_HP779_C132L:
case HPPA_BOARD_HP779_C160L:
case HPPA_BOARD_HP779_C180L:
case HPPA_BOARD_HP779_C160L1:
if (bus_space_map(ca->ca_iot, 0xf0190000,
4, 0, (bus_space_handle_t *)&machine_ledaddr))
machine_ledaddr = NULL;
machine_ledword = 1;
break;
default:
machine_ledaddr = (u_int8_t *)sc->sc_hw;
machine_ledword = 1;
break;
}
#endif
sc->ga.ga_ca = *ca; /* clone from us */
if (!strcmp(parent->dv_xname, "mainbus0")) {
sc->ga.ga_dp.dp_bc[0] = sc->ga.ga_dp.dp_bc[1];
sc->ga.ga_dp.dp_bc[1] = sc->ga.ga_dp.dp_bc[2];
sc->ga.ga_dp.dp_bc[2] = sc->ga.ga_dp.dp_bc[3];
sc->ga.ga_dp.dp_bc[3] = sc->ga.ga_dp.dp_bc[4];
sc->ga.ga_dp.dp_bc[4] = sc->ga.ga_dp.dp_bc[5];
sc->ga.ga_dp.dp_bc[5] = sc->ga.ga_dp.dp_mod;
sc->ga.ga_dp.dp_mod = 0;
}
sc->ga.ga_name = "gsc";
sc->ga.ga_hpamask = LASI_IOMASK;
sc->ga.ga_parent = gsc_lasi;
sc->ga.ga_ic = ic;
if (sc->sc_dev.dv_unit)
config_defer(self, lasi_gsc_attach);
else {
extern void (*cold_hook)(int);
lasi_gsc_attach(self);
/* could be already set by power(4) */
if (!cold_hook)
cold_hook = lasi_cold_hook;
}
}
void
lasi_gsc_attach(self)
struct device *self;
{
struct lasi_softc *sc = (struct lasi_softc *)self;
config_found(self, &sc->ga, gscprint);
}
void
lasi_cold_hook(on)
int on;
{
struct lasi_softc *sc = lasi_cd.cd_devs[0];
if (!sc)
return;
switch (on) {
case HPPA_COLD_COLD:
sc->sc_hw->lasi_power = LASI_BLINK;
break;
case HPPA_COLD_HOT:
sc->sc_hw->lasi_power = 0;
break;
case HPPA_COLD_OFF:
sc->sc_hw->lasi_power = LASI_OFF;
break;
}
}

156
sys/arch/hppa/dev/lcd.c
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@ -1,156 +0,0 @@
/* $OpenBSD: lcd.c,v 1.6 2022/03/13 08:04:38 mpi Exp $ */
/*
* Copyright (c) 2007 Mark Kettenis
*
* Permission to use, copy, modify, and distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include <sys/param.h>
#include <sys/device.h>
#include <sys/kernel.h>
#include <sys/systm.h>
#include <sys/timeout.h>
#include <machine/autoconf.h>
#include <machine/bus.h>
#include <machine/cpu.h>
#include <machine/pdc.h>
#define LCD_CLS 0x01
#define LCD_HOME 0x02
#define LCD_LOCATE(X, Y) (((Y) & 1 ? 0xc0 : 0x80) | ((X) & 0x0f))
struct lcd_softc {
struct device sc_dv;
bus_space_tag_t sc_iot;
bus_space_handle_t sc_cmdh, sc_datah;
u_int sc_delay;
u_int8_t sc_heartbeat[3];
struct timeout sc_to;
int sc_on;
struct blink_led sc_blink;
};
int lcd_match(struct device *, void *, void *);
void lcd_attach(struct device *, struct device *, void *);
const struct cfattach lcd_ca = {
sizeof(struct lcd_softc), lcd_match, lcd_attach
};
struct cfdriver lcd_cd = {
NULL, "lcd", DV_DULL
};
void lcd_mountroot(struct device *);
void lcd_write(struct lcd_softc *, const char *);
void lcd_blink(void *, int);
void lcd_blink_finish(void *);
int
lcd_match(struct device *parent, void *match, void *aux)
{
struct confargs *ca = aux;
if (strcmp(ca->ca_name, "lcd") == 0)
return (1);
return (0);
}
void
lcd_attach(struct device *parent, struct device *self, void *aux)
{
struct lcd_softc *sc = (struct lcd_softc *)self;
struct confargs *ca = aux;
struct pdc_chassis_lcd *pdc_lcd = (void *)ca->ca_pdc_iodc_read;
int i;
sc->sc_iot = ca->ca_iot;
if (bus_space_map(sc->sc_iot, pdc_lcd->cmd_addr,
1, 0, &sc->sc_cmdh)) {
printf(": cannot map cmd register\n");
return;
}
if (bus_space_map(sc->sc_iot, pdc_lcd->data_addr,
1, 0, &sc->sc_datah)) {
printf(": cannot map data register\n");
bus_space_unmap(sc->sc_iot, sc->sc_cmdh, 1);
return;
}
printf(": model %d\n", pdc_lcd->model);
sc->sc_delay = pdc_lcd->delay;
for (i = 0; i < 3; i++)
sc->sc_heartbeat[i] = pdc_lcd->heartbeat[i];
timeout_set(&sc->sc_to, lcd_blink_finish, sc);
sc->sc_blink.bl_func = lcd_blink;
sc->sc_blink.bl_arg = sc;
blink_led_register(&sc->sc_blink);
config_mountroot(self, lcd_mountroot);
}
void
lcd_mountroot(struct device *self)
{
struct lcd_softc *sc = (struct lcd_softc *)self;
bus_space_write_1(sc->sc_iot, sc->sc_cmdh, 0, LCD_CLS);
delay(100 * sc->sc_delay);
bus_space_write_1(sc->sc_iot, sc->sc_cmdh, 0, LCD_LOCATE(0, 0));
delay(sc->sc_delay);
lcd_write(sc, "OpenBSD/" MACHINE);
}
void
lcd_write(struct lcd_softc *sc, const char *str)
{
while (*str) {
bus_space_write_1(sc->sc_iot, sc->sc_datah, 0, *str++);
delay(sc->sc_delay);
}
}
void
lcd_blink(void *v, int on)
{
struct lcd_softc *sc = v;
sc->sc_on = on;
bus_space_write_1(sc->sc_iot, sc->sc_cmdh, 0, sc->sc_heartbeat[0]);
timeout_add_usec(&sc->sc_to, sc->sc_delay);
}
void
lcd_blink_finish(void *v)
{
struct lcd_softc *sc = v;
u_int8_t data;
if (sc->sc_on)
data = sc->sc_heartbeat[1];
else
data = sc->sc_heartbeat[2];
bus_space_write_1(sc->sc_iot, sc->sc_datah, 0, data);
}

70
sys/arch/hppa/dev/lpt_ssio.c
View File

@ -1,70 +0,0 @@
/* $OpenBSD: lpt_ssio.c,v 1.2 2022/03/13 08:04:38 mpi Exp $ */
/*
* Copyright (c) 2007 Mark Kettenis
*
* Permission to use, copy, modify, and distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <machine/bus.h>
#include <dev/ic/lptreg.h>
#include <dev/ic/lptvar.h>
#include <hppa/dev/ssiovar.h>
int lpt_ssio_match(struct device *, void *, void *);
void lpt_ssio_attach(struct device *, struct device *, void *);
const struct cfattach lpt_ssio_ca = {
sizeof(struct lpt_softc), lpt_ssio_match, lpt_ssio_attach
};
int
lpt_ssio_match(struct device *parent, void *match, void *aux)
{
struct cfdata *cf = match;
struct ssio_attach_args *saa = aux;
if (strcmp(saa->saa_name, "lpt") != 0)
return (0);
/* Check locators. */
if (cf->ssiocf_irq != SSIO_UNK_IRQ && cf->ssiocf_irq != saa->saa_irq)
return (0);
return (1);
}
void
lpt_ssio_attach(struct device *parent, struct device *self, void *aux)
{
struct lpt_softc *sc = (void *)self;
struct ssio_attach_args *saa = aux;
sc->sc_iot = saa->saa_iot;
if (bus_space_map(sc->sc_iot, saa->saa_iobase, LPT_NPORTS,
0, &sc->sc_ioh)) {
printf(": cannot map io space\n");
return;
}
lpt_attach_common(sc);
sc->sc_ih = ssio_intr_establish(IPL_TTY, saa->saa_irq,
lptintr, sc, sc->sc_dev.dv_xname);
}

594
sys/arch/hppa/dev/mongoose.c
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@ -1,594 +0,0 @@
/* $OpenBSD: mongoose.c,v 1.23 2022/03/13 08:04:38 mpi Exp $ */
/*
* Copyright (c) 1998-2003 Michael Shalayeff
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
* THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <sys/reboot.h>
#include <machine/bus.h>
#include <machine/iomod.h>
#include <machine/autoconf.h>
#include <hppa/dev/cpudevs.h>
#include <hppa/dev/viper.h>
#include <dev/eisa/eisareg.h>
#include <dev/eisa/eisavar.h>
#include <dev/isa/isareg.h>
#include <dev/isa/isavar.h>
#include <hppa/dev/mongoosereg.h>
#include <hppa/dev/mongoosevar.h>
void mgattach_gedoens(struct device *, struct device *, void *);
int mgmatch_gedoens(struct device *, void *, void *);
const struct cfattach mg_gedoens_ca = {
sizeof(struct mongoose_softc), mgmatch_gedoens, mgattach_gedoens
};
struct cfdriver mongoose_cd = {
NULL, "mongoose", DV_DULL
};
void mg_eisa_attach_hook(struct device *parent,
struct device *self,
struct eisabus_attach_args *mg);
int mg_intr_map(void *v, u_int irq, eisa_intr_handle_t *ehp);
const char *mg_intr_string(void *v, int irq);
void mg_isa_attach_hook(struct device *parent,
struct device *self,
struct isabus_attach_args *iba);
void *mg_intr_establish(void *v, int irq, int type, int pri,
int (*handler)(void *), void *arg, const char *name);
void mg_intr_disestablish(void *v, void *cookie);
int mg_intr_check(void *v, int irq, int type);
int mg_eisa_iomap(void *v, bus_addr_t addr, bus_size_t size,
int flags, bus_space_handle_t *bshp);
int mg_eisa_memmap(void *v, bus_addr_t addr, bus_size_t size,
int flags, bus_space_handle_t *bshp);
void mg_eisa_memunmap(void *v, bus_space_handle_t bsh,
bus_size_t size);
void mg_isa_barrier(void *v, bus_space_handle_t h, bus_size_t o,
bus_size_t l, int op);
u_int16_t mg_isa_r2(void *v, bus_space_handle_t h, bus_size_t o);
u_int32_t mg_isa_r4(void *v, bus_space_handle_t h, bus_size_t o);
void mg_isa_w2(void *v, bus_space_handle_t h, bus_size_t o,
u_int16_t vv);
void mg_isa_w4(void *v, bus_space_handle_t h, bus_size_t o,
u_int32_t vv);
void mg_isa_rm_2(void *v, bus_space_handle_t h, bus_size_t o,
u_int16_t *a, bus_size_t c);
void mg_isa_rm_4(void *v, bus_space_handle_t h, bus_size_t o,
u_int32_t *a, bus_size_t c);
void mg_isa_wm_2(void *v, bus_space_handle_t h, bus_size_t o,
const u_int16_t *a, bus_size_t c);
void mg_isa_wm_4(void *v, bus_space_handle_t h, bus_size_t o,
const u_int32_t *a, bus_size_t c);
void mg_isa_sm_2(void *v, bus_space_handle_t h, bus_size_t o,
u_int16_t vv, bus_size_t c);
void mg_isa_sm_4(void *v, bus_space_handle_t h, bus_size_t o,
u_int32_t vv, bus_size_t c);
void mg_isa_rr_2(void *v, bus_space_handle_t h, bus_size_t o,
u_int16_t *a, bus_size_t c);
void mg_isa_rr_4(void *v, bus_space_handle_t h, bus_size_t o,
u_int32_t *a, bus_size_t c);
void mg_isa_wr_2(void *v, bus_space_handle_t h, bus_size_t o,
const u_int16_t *a, bus_size_t c);
void mg_isa_wr_4(void *v, bus_space_handle_t h, bus_size_t o,
const u_int32_t *a, bus_size_t c);
void mg_isa_sr_2(void *v, bus_space_handle_t h, bus_size_t o,
u_int16_t vv, bus_size_t c);
void mg_isa_sr_4(void *v, bus_space_handle_t h, bus_size_t o,
u_int32_t vv, bus_size_t c);
/* TODO: DMA guts */
void
mg_eisa_attach_hook(struct device *parent, struct device *self,
struct eisabus_attach_args *mg)
{
}
int
mg_intr_map(void *v, u_int irq, eisa_intr_handle_t *ehp)
{
*ehp = irq;
return 0;
}
const char *
mg_intr_string(void *v, int irq)
{
static char buf[16];
snprintf(buf, sizeof buf, "isa irq %d", irq);
return buf;
}
void
mg_isa_attach_hook(struct device *parent, struct device *self,
struct isabus_attach_args *iba)
{
}
void *
mg_intr_establish(void *v, int irq, int type, int pri,
int (*handler)(void *), void *arg, const char *name)
{
struct hppa_isa_iv *iv;
struct mongoose_softc *sc = v;
volatile u_int8_t *imr, *pic;
if (!sc || irq < 0 || irq >= MONGOOSE_NINTS ||
(0 <= irq && irq < MONGOOSE_NINTS && sc->sc_iv[irq].iv_handler))
return NULL;
if (type != IST_LEVEL && type != IST_EDGE) {
#ifdef DEBUG
printf("%s: bad interrupt level (%d)\n", sc->sc_dev.dv_xname,
type);
#endif
return NULL;
}
iv = &sc->sc_iv[irq];
if (iv->iv_handler) {
#ifdef DEBUG
printf("%s: irq %d already established\n", sc->sc_dev.dv_xname,
irq);
#endif
return NULL;
}
iv->iv_name = name;
iv->iv_pri = pri;
iv->iv_handler = handler;
iv->iv_arg = arg;
if (irq < 8) {
imr = &sc->sc_ctrl->imr0;
pic = &sc->sc_ctrl->pic0;
} else {
imr = &sc->sc_ctrl->imr1;
pic = &sc->sc_ctrl->pic1;
irq -= 8;
}
*imr |= 1 << irq;
*pic |= (type == IST_LEVEL) << irq;
/* TODO: ack it? */
return iv;
}
void
mg_intr_disestablish(void *v, void *cookie)
{
struct hppa_isa_iv *iv = cookie;
struct mongoose_softc *sc = v;
int irq;
volatile u_int8_t *imr;
if (!sc || !cookie)
return;
irq = iv - sc->sc_iv;
if (irq < 8)
imr = &sc->sc_ctrl->imr0;
else
imr = &sc->sc_ctrl->imr1;
*imr &= ~(1 << irq);
/* TODO: ack it? */
iv->iv_handler = NULL;
}
int
mg_intr_check(void *v, int irq, int type)
{
return 0;
}
int
mg_intr(void *v)
{
struct mongoose_softc *sc = v;
struct hppa_isa_iv *iv;
int s, irq = 0;
iv = &sc->sc_iv[irq];
s = splraise(iv->iv_pri);
(iv->iv_handler)(iv->iv_arg);
splx(s);
return 0;
}
int
mg_eisa_iomap(void *v, bus_addr_t addr, bus_size_t size, int flags,
bus_space_handle_t *bshp)
{
struct mongoose_softc *sc = v;
/* see if it's ISA space we are mapping */
if (0x100 <= addr && addr < 0x400) {
#define TOISA(a) ((((a) & 0x3f8) << 9) + ((a) & 7))
size = TOISA(addr + size) - TOISA(addr);
addr = TOISA(addr);
}
return (sc->sc_bt->hbt_map)(NULL, sc->sc_iomap + addr, size,
flags, bshp);
}
int
mg_eisa_memmap(void *v, bus_addr_t addr, bus_size_t size, int flags,
bus_space_handle_t *bshp)
{
/* TODO: eisa memory map */
return -1;
}
void
mg_eisa_memunmap(void *v, bus_space_handle_t bsh, bus_size_t size)
{
/* TODO: eisa memory unmap */
}
void
mg_isa_barrier(void *v, bus_space_handle_t h, bus_size_t o, bus_size_t l, int op)
{
sync_caches();
}
u_int16_t
mg_isa_r2(void *v, bus_space_handle_t h, bus_size_t o)
{
register u_int16_t r = *((volatile u_int16_t *)(h + o));
return letoh16(r);
}
u_int32_t
mg_isa_r4(void *v, bus_space_handle_t h, bus_size_t o)
{
register u_int32_t r = *((volatile u_int32_t *)(h + o));
return letoh32(r);
}
void
mg_isa_w2(void *v, bus_space_handle_t h, bus_size_t o, u_int16_t vv)
{
*((volatile u_int16_t *)(h + o)) = htole16(vv);
}
void
mg_isa_w4(void *v, bus_space_handle_t h, bus_size_t o, u_int32_t vv)
{
*((volatile u_int32_t *)(h + o)) = htole32(vv);
}
void
mg_isa_rm_2(void *v, bus_space_handle_t h, bus_size_t o, u_int16_t *a, bus_size_t c)
{
h += o;
while (c--)
*(a++) = letoh16(*(volatile u_int16_t *)h);
}
void
mg_isa_rm_4(void *v, bus_space_handle_t h, bus_size_t o, u_int32_t *a, bus_size_t c)
{
h += o;
while (c--)
*(a++) = letoh32(*(volatile u_int32_t *)h);
}
void
mg_isa_wm_2(void *v, bus_space_handle_t h, bus_size_t o, const u_int16_t *a, bus_size_t c)
{
register u_int16_t r;
h += o;
while (c--) {
r = *(a++);
*(volatile u_int16_t *)h = htole16(r);
}
}
void
mg_isa_wm_4(void *v, bus_space_handle_t h, bus_size_t o, const u_int32_t *a, bus_size_t c)
{
register u_int32_t r;
h += o;
while (c--) {
r = *(a++);
*(volatile u_int32_t *)h = htole32(r);
}
}
void
mg_isa_sm_2(void *v, bus_space_handle_t h, bus_size_t o, u_int16_t vv, bus_size_t c)
{
vv = htole16(vv);
h += o;
while (c--)
*(volatile u_int16_t *)h = vv;
}
void
mg_isa_sm_4(void *v, bus_space_handle_t h, bus_size_t o, u_int32_t vv, bus_size_t c)
{
vv = htole32(vv);
h += o;
while (c--)
*(volatile u_int32_t *)h = vv;
}
void
mg_isa_rr_2(void *v, bus_space_handle_t h, bus_size_t o, u_int16_t *a, bus_size_t c)
{
volatile u_int16_t *p = (u_int16_t *)(h + o);
u_int32_t r;
while (c--) {
r = *p++;
*a++ = letoh16(r);
}
}
void
mg_isa_rr_4(void *v, bus_space_handle_t h, bus_size_t o, u_int32_t *a, bus_size_t c)
{
volatile u_int32_t *p = (u_int32_t *)(h + o);
u_int32_t r;
while (c--) {
r = *p++;
*a++ = letoh32(r);
}
}
void
mg_isa_wr_2(void *v, bus_space_handle_t h, bus_size_t o, const u_int16_t *a, bus_size_t c)
{
volatile u_int16_t *p = (u_int16_t *)(h + o);
u_int32_t r;
while (c--) {
r = *a++;
*p++ = htole16(r);
}
}
void
mg_isa_wr_4(void *v, bus_space_handle_t h, bus_size_t o, const u_int32_t *a, bus_size_t c)
{
volatile u_int32_t *p = (u_int32_t *)(h + o);
u_int32_t r;
while (c--) {
r = *a++;
*p++ = htole32(r);
}
}
void
mg_isa_sr_2(void *v, bus_space_handle_t h, bus_size_t o, u_int16_t vv, bus_size_t c)
{
volatile u_int16_t *p = (u_int16_t *)(h + o);
vv = htole16(vv);
while (c--)
*p++ = vv;
}
void
mg_isa_sr_4(void *v, bus_space_handle_t h, bus_size_t o, u_int32_t vv, bus_size_t c)
{
volatile u_int32_t *p = (u_int32_t *)(h + o);
vv = htole32(vv);
while (c--)
*p++ = vv;
}
int
mgattach_common(sc)
struct mongoose_softc *sc;
{
struct hppa_bus_space_tag *bt;
union mongoose_attach_args ea;
char brid[EISA_IDSTRINGLEN];
viper_eisa_en();
/* BUS RESET */
sc->sc_ctrl->nmi_ext = MONGOOSE_NMI_BUSRESET;
DELAY(1);
sc->sc_ctrl->nmi_ext = 0;
DELAY(100);
/* determine eisa board id */
{
u_int8_t id[4], *p;
p = (u_int8_t *)(sc->sc_iomap + EISA_SLOTOFF_VID);
id[0] = *p++;
id[1] = *p++;
id[2] = *p++;
id[3] = *p++;
brid[0] = EISA_VENDID_0(id);
brid[1] = EISA_VENDID_1(id);
brid[2] = EISA_VENDID_2(id);
brid[3] = EISA_PRODID_0(id + 2);
brid[4] = EISA_PRODID_1(id + 2);
brid[5] = EISA_PRODID_2(id + 2);
brid[6] = EISA_PRODID_3(id + 2);
brid[7] = '\0';
}
printf (": %s rev %d, %d MHz\n", brid, sc->sc_regs->version,
(sc->sc_regs->clock? 33 : 25));
sc->sc_regs->liowait = 1; /* disable isa wait states */
sc->sc_regs->lock = 1; /* bus unlock */
/* attach EISA */
sc->sc_ec.ec_v = sc;
sc->sc_ec.ec_attach_hook = mg_eisa_attach_hook;
sc->sc_ec.ec_intr_establish = mg_intr_establish;
sc->sc_ec.ec_intr_disestablish = mg_intr_disestablish;
sc->sc_ec.ec_intr_string = mg_intr_string;
sc->sc_ec.ec_intr_map = mg_intr_map;
/* inherit the bus tags for eisa from the mainbus */
bt = &sc->sc_eiot;
bcopy(sc->sc_bt, bt, sizeof(*bt));
bt->hbt_cookie = sc;
bt->hbt_map = mg_eisa_iomap;
#define R(n) bt->__CONCAT(hbt_,n) = &__CONCAT(mg_isa_,n)
/* R(barrier); */
R(r2); R(r4); R(w2); R(w4);
R(rm_2);R(rm_4);R(wm_2);R(wm_4);R(sm_2);R(sm_4);
R(rr_2);R(rr_4);R(wr_2);R(wr_4);R(sr_2);R(sr_4);
bt = &sc->sc_ememt;
bcopy(sc->sc_bt, bt, sizeof(*bt));
bt->hbt_cookie = sc;
bt->hbt_map = mg_eisa_memmap;
bt->hbt_unmap = mg_eisa_memunmap;
/* attachment guts */
ea.mongoose_eisa.eba_busname = "eisa";
ea.mongoose_eisa.eba_iot = &sc->sc_eiot;
ea.mongoose_eisa.eba_memt = &sc->sc_ememt;
ea.mongoose_eisa.eba_dmat = NULL /* &sc->sc_edmat */;
ea.mongoose_eisa.eba_ec = &sc->sc_ec;
config_found((struct device *)sc, &ea.mongoose_eisa, mgprint);
sc->sc_ic.ic_v = sc;
sc->sc_ic.ic_attach_hook = mg_isa_attach_hook;
sc->sc_ic.ic_intr_establish = mg_intr_establish;
sc->sc_ic.ic_intr_disestablish = mg_intr_disestablish;
sc->sc_ic.ic_intr_check = mg_intr_check;
/* inherit the bus tags for isa from the eisa */
bt = &sc->sc_imemt;
bcopy(&sc->sc_ememt, bt, sizeof(*bt));
bt = &sc->sc_iiot;
bcopy(&sc->sc_eiot, bt, sizeof(*bt));
/* TODO: DMA tags */
/* attachment guts */
ea.mongoose_isa.iba_busname = "isa";
ea.mongoose_isa.iba_iot = &sc->sc_iiot;
ea.mongoose_isa.iba_memt = &sc->sc_imemt;
#if NISADMA > 0
ea.mongoose_isa.iba_dmat = &sc->sc_idmat;
#endif
ea.mongoose_isa.iba_ic = &sc->sc_ic;
config_found((struct device *)sc, &ea.mongoose_isa, mgprint);
#undef R
return (0);
}
int
mgprint(aux, pnp)
void *aux;
const char *pnp;
{
union mongoose_attach_args *ea = aux;
if (pnp)
printf ("%s at %s", ea->mongoose_name, pnp);
return (UNCONF);
}
int
mgmatch_gedoens(parent, cfdata, aux)
struct device *parent;
void *cfdata;
void *aux;
{
register struct confargs *ca = aux;
/* struct cfdata *cf = cfdata; */
bus_space_handle_t ioh;
if (ca->ca_type.iodc_type != HPPA_TYPE_BHA ||
(ca->ca_type.iodc_sv_model != HPPA_BHA_EISA &&
ca->ca_type.iodc_sv_model != HPPA_BHA_WEISA))
return 0;
if (bus_space_map(ca->ca_iot, ca->ca_hpa + MONGOOSE_MONGOOSE,
IOMOD_HPASIZE, 0, &ioh))
return 0;
/* XXX check EISA signature */
bus_space_unmap(ca->ca_iot, ioh, IOMOD_HPASIZE);
return 1;
}
void
mgattach_gedoens(parent, self, aux)
struct device *parent;
struct device *self;
void *aux;
{
register struct confargs *ca = aux;
register struct mongoose_softc *sc = (struct mongoose_softc *)self;
bus_space_handle_t ioh;
sc->sc_bt = ca->ca_iot;
sc->sc_iomap = ca->ca_hpa;
if (bus_space_map(ca->ca_iot, ca->ca_hpa + MONGOOSE_MONGOOSE,
sizeof(struct mongoose_regs), 0, &ioh) != 0) {
printf(": can't map IO space\n");
return;
}
sc->sc_regs = (struct mongoose_regs *)ioh;
if (bus_space_map(ca->ca_iot, ca->ca_hpa + MONGOOSE_CTRL,
sizeof(struct mongoose_ctrl), 0, &ioh) != 0) {
printf(": can't map control registers\n");
bus_space_unmap(ca->ca_iot, (bus_space_handle_t)sc->sc_regs,
sizeof(struct mongoose_regs));
return;
}
sc->sc_ctrl = (struct mongoose_ctrl *)ioh;
if (mgattach_common(sc) != 0)
return;
/* attach interrupt */
sc->sc_ih = cpu_intr_establish(IPL_HIGH, ca->ca_irq,
mg_intr, sc, sc->sc_dev.dv_xname);
}

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sys/arch/hppa/dev/mongoosereg.h
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@ -1,130 +0,0 @@
/* $OpenBSD: mongoosereg.h,v 1.2 2008/08/24 18:53:36 miod Exp $ */
/*
* Copyright (c) 1998-2003 Michael Shalayeff
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
* THE POSSIBILITY OF SUCH DAMAGE.
*/
/* EISA Bus Adapter registers definitions */
#define MONGOOSE_MONGOOSE 0x10000
struct mongoose_regs {
u_int8_t version;
u_int8_t lock;
u_int8_t liowait;
u_int8_t clock;
u_int8_t reserved[0xf000 - 4];
u_int8_t intack;
};
#define MONGOOSE_CTRL 0x00000
#define MONGOOSE_NINTS 16
struct mongoose_ctrl {
struct dma0 {
struct {
u_int16_t addr : 8;
u_int16_t count: 8;
} ch[4];
u_int8_t command;
u_int8_t request;
u_int8_t mask_channel;
u_int8_t mode;
u_int8_t clr_byte_ptr;
u_int8_t master_clear;
u_int8_t mask_clear;
u_int8_t master_write;
u_int8_t pad[15];
} dma0;
u_int8_t irr0; /* 0x20 */
u_int8_t imr0;
u_int8_t iack; /* 0x22 -- 2 b2b reads generate
(e)isa Iack cycle & returns int level */
u_int8_t pad0[29];
struct timers {
u_int8_t sysclk;
u_int8_t refresh;
u_int8_t spkr;
u_int8_t ctrl;
u_int32_t pad;
} tmr[2]; /* 0x40 -- timers control */
u_int8_t pad1[16];
u_int16_t inmi; /* 0x60 NMI control */
u_int8_t pad2[30];
struct {
u_int8_t pad0;
u_int8_t ch2;
u_int8_t ch3;
u_int8_t ch1;
u_int8_t pad1;
u_int8_t pad2[3];
u_int8_t ch0;
u_int8_t pad4;
u_int8_t ch6;
u_int8_t ch7;
u_int8_t ch5;
u_int8_t pad5[3];
u_int8_t pad6[16];
} pr; /* 0x80 */
u_int8_t irr1; /* 0xa0 */
u_int8_t imr1;
u_int8_t pad3[30];
struct dma1 {
struct {
u_int32_t addr : 16;
u_int32_t count: 16;
} ch[4];
u_int16_t command;
u_int16_t request;
u_int16_t mask_channel;
u_int16_t mode;
u_int16_t clr_byte_ptr;
u_int16_t master_clear;
u_int16_t mask_clear;
u_int16_t master_write;
} dma1; /* 0xc0 */
u_int8_t master_req; /* 0xe0 master request register */
u_int8_t pad4[31];
u_int8_t pad5[0x3d0]; /* 0x4d0 */
u_int8_t pic0; /* 0 - edge, 1 - level */
u_int8_t pic1;
u_int8_t pad6[0x460];
u_int8_t nmi;
u_int8_t nmi_ext;
#define MONGOOSE_NMI_BUSRESET 0x01
#define MONGOOSE_NMI_IOPORT_EN 0x02
#define MONGOOSE_NMI_EN 0x04
#define MONGOOSE_NMI_MTMO_EN 0x08
#define MONGOOSE_NMI_RES4 0x10
#define MONGOOSE_NMI_IOPORT_INT 0x20
#define MONGOOSE_NMI_MASTER_INT 0x40
#define MONGOOSE_NMI_INT 0x80
};
#define MONGOOSE_IOMAP 0x100000

71
sys/arch/hppa/dev/mongoosevar.h
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@ -1,71 +0,0 @@
/* $OpenBSD: mongoosevar.h,v 1.2 2007/05/10 17:59:24 deraadt Exp $ */
/*
* Copyright (c) 1998-2003 Michael Shalayeff
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
* THE POSSIBILITY OF SUCH DAMAGE.
*/
struct hppa_isa_iv {
const char *iv_name;
int (*iv_handler)(void *arg);
void *iv_arg;
int iv_pri;
/* don't do sharing, we won't have many slots anyway
struct hppa_isa_iv *iv_next;
*/
};
struct mongoose_softc {
struct device sc_dev;
void *sc_ih;
bus_space_tag_t sc_bt;
volatile struct mongoose_regs *sc_regs;
volatile struct mongoose_ctrl *sc_ctrl;
bus_addr_t sc_iomap;
/* interrupts section */
struct hppa_eisa_chipset sc_ec;
struct hppa_isa_chipset sc_ic;
struct hppa_isa_iv sc_iv[MONGOOSE_NINTS];
/* isa/eisa bus guts */
struct hppa_bus_space_tag sc_eiot;
struct hppa_bus_space_tag sc_ememt;
struct hppa_bus_dma_tag sc_edmat;
struct hppa_bus_space_tag sc_iiot;
struct hppa_bus_space_tag sc_imemt;
struct hppa_bus_dma_tag sc_idmat;
};
union mongoose_attach_args {
char *mongoose_name;
struct eisabus_attach_args mongoose_eisa;
struct isabus_attach_args mongoose_isa;
};
int mgattach_common(struct mongoose_softc *);
int mgprint(void *, const char *);
int mg_intr(void *);

447
sys/arch/hppa/dev/pdc.c
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@ -1,447 +0,0 @@
/* $OpenBSD: pdc.c,v 1.41 2022/03/13 08:04:38 mpi Exp $ */
/*
* Copyright (c) 1998-2003 Michael Shalayeff
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
* THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "com.h"
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <sys/tty.h>
#include <sys/timeout.h>
#include <dev/cons.h>
#include <machine/conf.h>
#include <machine/pdc.h>
#include <machine/iomod.h>
#include <machine/autoconf.h>
typedef
struct pdc_softc {
struct device sc_dv;
struct tty *sc_tty;
struct timeout sc_to;
} pdcsoftc_t;
pdcio_t pdc;
int pdcret[32] PDC_ALIGNMENT;
char pdc_consbuf[IODC_MINIOSIZ] PDC_ALIGNMENT;
iodcio_t pdc_cniodc, pdc_kbdiodc;
pz_device_t *pz_kbd, *pz_cons;
int pdcngetc(dev_t);
void pdcnputc(dev_t, char *);
struct consdev pdccons = { NULL, NULL, pdccngetc, pdccnputc,
nullcnpollc, NULL, makedev(22, 0), CN_LOWPRI };
int pdcmatch(struct device *, void *, void *);
void pdcattach(struct device *, struct device *, void *);
const struct cfattach pdc_ca = {
sizeof(pdcsoftc_t), pdcmatch, pdcattach
};
struct cfdriver pdc_cd = {
NULL, "pdc", DV_DULL
};
void pdcstart(struct tty *tp);
void pdctimeout(void *v);
int pdcparam(struct tty *tp, struct termios *);
int pdccnlookc(dev_t dev, int *cp);
#if NCOM > 0
/* serial console speed table */
static int pdc_speeds[] = {
B50,
B75,
B110,
B150,
B300,
B600,
B1200,
B2400,
B4800,
B7200,
B9600,
B19200,
B38400,
B57600,
B115200,
B230400,
};
#endif
void
pdc_init()
{
static int kbd_iodc[IODC_MAXSIZE/sizeof(int)];
static int cn_iodc[IODC_MAXSIZE/sizeof(int)];
int err;
/* XXX locore've done it XXX pdc = (pdcio_t)PAGE0->mem_pdc; */
pz_kbd = &PAGE0->mem_kbd;
pz_cons = &PAGE0->mem_cons;
/* XXX should we reset the console/kbd here?
well, /boot did that for us anyway */
if ((err = pdc_call((iodcio_t)pdc, 0, PDC_IODC, PDC_IODC_READ,
pdcret, pz_cons->pz_hpa, IODC_IO, cn_iodc, IODC_MAXSIZE)) < 0 ||
(err = pdc_call((iodcio_t)pdc, 0, PDC_IODC, PDC_IODC_READ,
pdcret, pz_kbd->pz_hpa, IODC_IO, kbd_iodc, IODC_MAXSIZE)) < 0) {
#ifdef DEBUG
printf("pdc_init: failed reading IODC (%d)\n", err);
#endif
}
pdc_cniodc = (iodcio_t)cn_iodc;
pdc_kbdiodc = (iodcio_t)kbd_iodc;
/* Start out with pdc as the console. */
cn_tab = &pdccons;
/* Figure out console settings. */
#if NCOM > 0
if (PAGE0->mem_cons.pz_class == PCL_DUPLEX) {
struct pz_device *pzd = &PAGE0->mem_cons;
extern int comdefaultrate;
#ifdef DEBUG
printf("console: class %d flags %b ",
pzd->pz_class, pzd->pz_flags, PZF_BITS);
printf("bc %d/%d/%d/%d/%d/%d ",
pzd->pz_bc[0], pzd->pz_bc[1], pzd->pz_bc[2],
pzd->pz_bc[3], pzd->pz_bc[4], pzd->pz_bc[5]);
printf("mod %x layers %x/%x/%x/%x/%x/%x hpa %x\n", pzd->pz_mod,
pzd->pz_layers[0], pzd->pz_layers[1], pzd->pz_layers[2],
pzd->pz_layers[3], pzd->pz_layers[4], pzd->pz_layers[5],
pzd->pz_hpa);
#endif
/* compute correct baud rate */
if (PZL_SPEED(pzd->pz_layers[0]) <
sizeof(pdc_speeds) / sizeof(int))
comdefaultrate =
pdc_speeds[PZL_SPEED(pzd->pz_layers[0])];
else
comdefaultrate = B9600; /* XXX */
}
#endif
}
int
pdcmatch(parent, cfdata, aux)
struct device *parent;
void *cfdata;
void *aux;
{
struct cfdata *cf = cfdata;
struct confargs *ca = aux;
/* there could be only one */
if (cf->cf_unit > 0 && !strcmp(ca->ca_name, "pdc"))
return 0;
return 1;
}
void
pdcattach(parent, self, aux)
struct device *parent;
struct device *self;
void *aux;
{
struct pdc_softc *sc = (struct pdc_softc *)self;
if (!pdc)
pdc_init();
printf("\n");
timeout_set(&sc->sc_to, pdctimeout, sc);
}
int
pdcopen(dev, flag, mode, p)
dev_t dev;
int flag, mode;
struct proc *p;
{
int unit = minor(dev);
struct pdc_softc *sc;
struct tty *tp;
int s;
int error = 0, setuptimeout = 0;
if (unit >= pdc_cd.cd_ndevs || (sc = pdc_cd.cd_devs[unit]) == NULL)
return ENXIO;
s = spltty();
if (sc->sc_tty)
tp = sc->sc_tty;
else {
tp = sc->sc_tty = ttymalloc(0);
}
tp->t_oproc = pdcstart;
tp->t_param = pdcparam;
tp->t_dev = dev;
if ((tp->t_state & TS_ISOPEN) == 0) {
ttychars(tp);
tp->t_iflag = TTYDEF_IFLAG;
tp->t_oflag = TTYDEF_OFLAG;
tp->t_cflag = TTYDEF_CFLAG|CLOCAL;
tp->t_lflag = TTYDEF_LFLAG;
tp->t_ispeed = tp->t_ospeed = B9600;
ttsetwater(tp);
setuptimeout = 1;
} else if (tp->t_state&TS_XCLUDE && suser(p) != 0) {
splx(s);
return (EBUSY);
}
tp->t_state |= TS_CARR_ON;
splx(s);
error = (*linesw[tp->t_line].l_open)(dev, tp, p);
if (error == 0 && setuptimeout)
pdctimeout(sc);
return error;
}
int
pdcclose(dev, flag, mode, p)
dev_t dev;
int flag, mode;
struct proc *p;
{
int unit = minor(dev);
struct tty *tp;
struct pdc_softc *sc;
if (unit >= pdc_cd.cd_ndevs || (sc = pdc_cd.cd_devs[unit]) == NULL)
return ENXIO;
tp = sc->sc_tty;
timeout_del(&sc->sc_to);
(*linesw[tp->t_line].l_close)(tp, flag, p);
ttyclose(tp);
return 0;
}
int
pdcread(dev, uio, flag)
dev_t dev;
struct uio *uio;
int flag;
{
int unit = minor(dev);
struct tty *tp;
struct pdc_softc *sc;
if (unit >= pdc_cd.cd_ndevs || (sc = pdc_cd.cd_devs[unit]) == NULL)
return ENXIO;
tp = sc->sc_tty;
return ((*linesw[tp->t_line].l_read)(tp, uio, flag));
}
int
pdcwrite(dev, uio, flag)
dev_t dev;
struct uio *uio;
int flag;
{
int unit = minor(dev);
struct tty *tp;
struct pdc_softc *sc;
if (unit >= pdc_cd.cd_ndevs || (sc = pdc_cd.cd_devs[unit]) == NULL)
return ENXIO;
tp = sc->sc_tty;
return ((*linesw[tp->t_line].l_write)(tp, uio, flag));
}
int
pdcioctl(dev, cmd, data, flag, p)
dev_t dev;
u_long cmd;
caddr_t data;
int flag;
struct proc *p;
{
int unit = minor(dev);
int error;
struct tty *tp;
struct pdc_softc *sc;
if (unit >= pdc_cd.cd_ndevs || (sc = pdc_cd.cd_devs[unit]) == NULL)
return ENXIO;
tp = sc->sc_tty;
error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p);
if (error >= 0)
return error;
error = ttioctl(tp, cmd, data, flag, p);
if (error >= 0)
return error;
return ENOTTY;
}
int
pdcparam(tp, t)
struct tty *tp;
struct termios *t;
{
return 0;
}
void
pdcstart(tp)
struct tty *tp;
{
int s;
s = spltty();
if (tp->t_state & (TS_TTSTOP | TS_BUSY)) {
splx(s);
return;
}
ttwakeupwr(tp);
tp->t_state |= TS_BUSY;
while (tp->t_outq.c_cc != 0)
pdccnputc(tp->t_dev, getc(&tp->t_outq));
tp->t_state &= ~TS_BUSY;
splx(s);
}
int
pdcstop(tp, flag)
struct tty *tp;
int flag;
{
int s;
s = spltty();
if (tp->t_state & TS_BUSY)
if ((tp->t_state & TS_TTSTOP) == 0)
tp->t_state |= TS_FLUSH;
splx(s);
return 0;
}
void
pdctimeout(v)
void *v;
{
struct pdc_softc *sc = v;
struct tty *tp = sc->sc_tty;
int c;
while (pdccnlookc(tp->t_dev, &c)) {
if (tp->t_state & TS_ISOPEN)
(*linesw[tp->t_line].l_rint)(c, tp);
}
timeout_add(&sc->sc_to, 1);
}
struct tty *
pdctty(dev)
dev_t dev;
{
int unit = minor(dev);
struct pdc_softc *sc;
if (unit >= pdc_cd.cd_ndevs || (sc = pdc_cd.cd_devs[unit]) == NULL)
return NULL;
return sc->sc_tty;
}
int
pdccnlookc(dev, cp)
dev_t dev;
int *cp;
{
int err, l;
int s = splhigh();
err = pdc_call(pdc_kbdiodc, 0, pz_kbd->pz_hpa, IODC_IO_CONSIN,
pz_kbd->pz_spa, pz_kbd->pz_layers, pdcret, 0, pdc_consbuf, 1, 0);
l = pdcret[0];
*cp = pdc_consbuf[0];
splx(s);
#ifdef DEBUG
if (err < 0)
printf("pdccnlookc: input error: %d\n", err);
#endif
return l;
}
int
pdccngetc(dev)
dev_t dev;
{
int c;
if (!pdc)
return 0;
while(!pdccnlookc(dev, &c))
;
return (c);
}
void
pdccnputc(dev, c)
dev_t dev;
int c;
{
register int err;
int s = splhigh();
*pdc_consbuf = c;
err = pdc_call(pdc_cniodc, 0, pz_cons->pz_hpa, IODC_IO_CONSOUT,
pz_cons->pz_spa, pz_cons->pz_layers, pdcret, 0, pdc_consbuf, 1, 0);
splx(s);
if (err < 0) {
#ifdef DEBUG
printf("pdccnputc: output error: %d\n", err);
#endif
}
}

77
sys/arch/hppa/dev/phantomas.c
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@ -1,77 +0,0 @@
/* $OpenBSD: phantomas.c,v 1.6 2022/03/13 08:04:38 mpi Exp $ */
/*
* Copyright (c) 2002 Michael Shalayeff
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
* THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <machine/pdc.h>
#include <machine/iomod.h>
#include <machine/autoconf.h>
#include <hppa/dev/cpudevs.h>
struct cfdriver phantomas_cd = {
NULL, "phantomas", DV_DULL
};
struct phantomas_softc {
struct device sc_dev;
};
int phantomasmatch(struct device *, void *, void *);
void phantomasattach(struct device *, struct device *, void *);
const struct cfattach phantomas_ca = {
sizeof(struct phantomas_softc), phantomasmatch, phantomasattach
};
int
phantomasmatch(struct device *parent, void *cfdata, void *aux)
{
struct confargs *ca = aux;
if (ca->ca_type.iodc_type != HPPA_TYPE_BCPORT ||
ca->ca_type.iodc_sv_model != HPPA_BCPORT_PHANTOM)
return (0);
return (1);
}
void
phantomasattach(struct device *parent, struct device *self, void *aux)
{
struct confargs *ca = aux, nca;
printf("\n");
nca = *ca;
nca.ca_hpamask = HPPA_IOBEGIN;
pdc_scanbus(self, &nca, MAXMODBUS, 0, 0);
}

191
sys/arch/hppa/dev/power.c
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@ -1,191 +0,0 @@
/* $OpenBSD: power.c,v 1.11 2022/03/13 08:04:38 mpi Exp $ */
/*
* Copyright (c) 2003 Michael Shalayeff
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
* THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/param.h>
#include <sys/proc.h>
#include <sys/signalvar.h>
#include <sys/kernel.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <sys/kthread.h>
#include <machine/reg.h>
#include <machine/pdc.h>
#include <machine/autoconf.h>
#include <hppa/dev/cpudevs.h>
struct power_softc {
struct device sc_dev;
void *sc_ih;
struct proc *sc_thread;
void (*sc_kicker)(void *);
int sc_dr_cnt;
paddr_t sc_pwr_reg;
volatile int sc_interrupted;
};
int powermatch(struct device *, void *, void *);
void powerattach(struct device *, struct device *, void *);
const struct cfattach power_ca = {
sizeof(struct power_softc), powermatch, powerattach
};
struct cfdriver power_cd = {
NULL, "power", DV_DULL
};
void power_thread_create(void *v);
void power_thread_dr(void *v);
void power_thread_reg(void *v);
void power_cold_hook_reg(int);
int power_intr(void *);
int
powermatch(struct device *parent, void *cfdata, void *aux)
{
struct cfdata *cf = cfdata;
struct confargs *ca = aux;
if (cf->cf_unit > 0 && !strcmp(ca->ca_name, "power"))
return (0);
return (1);
}
void
powerattach(struct device *parent, struct device *self, void *aux)
{
struct power_softc *sc = (struct power_softc *)self;
struct confargs *ca = aux;
switch (cpu_hvers) {
case HPPA_BOARD_HP712_60:
case HPPA_BOARD_HP712_80:
case HPPA_BOARD_HP712_100:
case HPPA_BOARD_HP712_120:
sc->sc_kicker = power_thread_dr;
printf(": DR25\n");
break;
default:
if (ca->ca_hpa) {
extern void (*cold_hook)(int);
sc->sc_pwr_reg = ca->ca_hpa;
cold_hook = power_cold_hook_reg;
sc->sc_kicker = power_thread_reg;
printf("\n");
} else
printf(": not available\n");
break;
}
if (ca->ca_irq >= 0)
sc->sc_ih = cpu_intr_establish(IPL_CLOCK, ca->ca_irq,
power_intr, sc, sc->sc_dev.dv_xname);
if (sc->sc_kicker)
kthread_create_deferred(power_thread_create, sc);
}
int
power_intr(void *v)
{
struct power_softc *sc = v;
sc->sc_interrupted = 1;
return (1);
}
void
power_thread_create(void *v)
{
struct power_softc *sc = v;
if (kthread_create(sc->sc_kicker, sc, &sc->sc_thread,
sc->sc_dev.dv_xname))
printf("WARNING: failed to create kernel power thread\n");
}
void
power_thread_dr(void *v)
{
struct power_softc *sc = v;
u_int32_t r;
for (;;) {
mfcpu(DR0_PCXL_SHINT_EN, r); /* XXX don't ask */
if (r & 0x80000000)
sc->sc_dr_cnt = 0;
else
sc->sc_dr_cnt++;
/*
* the bit is undampened straight wire from the power
* switch and thus we have do dampen it ourselves.
*/
if (sc->sc_dr_cnt == hz / 10)
prsignal(initprocess, SIGUSR2);
tsleep_nsec(v, PWAIT, "drpower", MSEC_TO_NSEC(100));
}
}
void
power_thread_reg(void *v)
{
struct power_softc *sc = v;
u_int32_t r;
for (;;) {
__asm volatile("ldwas 0(%1), %0"
: "=&r" (r) : "r" (sc->sc_pwr_reg));
if (!(r & 1))
prsignal(initprocess, SIGUSR2);
tsleep_nsec(v, PWAIT, "regpower", MSEC_TO_NSEC(100));
}
}
void
power_cold_hook_reg(int on)
{
extern struct pdc_power_info pdc_power_info; /* machdep.c */
int error;
if ((error = pdc_call((iodcio_t)pdc, 0, PDC_SOFT_POWER,
PDC_SOFT_POWER_ENABLE, &pdc_power_info,
on == HPPA_COLD_HOT)))
printf("power_cold_hook_reg: failed (%d)\n", error);
}

166
sys/arch/hppa/dev/siop_sgc.c
View File

@ -1,166 +0,0 @@
/* $OpenBSD: siop_sgc.c,v 1.2 2022/03/13 08:04:38 mpi Exp $ */
/*
* Copyright (c) 2007 Mark Kettenis
*
* Permission to use, copy, modify, and distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include <sys/param.h>
#include <sys/device.h>
#include <sys/systm.h>
#include <machine/autoconf.h>
#include <machine/bus.h>
#include <machine/iomod.h>
#include <scsi/scsi_all.h>
#include <scsi/scsiconf.h>
#include <dev/ic/siopreg.h>
#include <dev/ic/siopvar_common.h>
#include <dev/ic/siopvar.h>
#include <hppa/dev/cpudevs.h>
#define IO_II_INTEN 0x20000000
#define IO_II_PACKEN 0x10000000
#define IO_II_PREFETCHEN 0x08000000
int siop_sgc_match(struct device *, void *, void *);
void siop_sgc_attach(struct device *, struct device *, void *);
int siop_sgc_intr(void *);
void siop_sgc_reset(struct siop_common_softc *);
u_int8_t siop_sgc_r1(void *, bus_space_handle_t, bus_size_t);
u_int16_t siop_sgc_r2(void *, bus_space_handle_t, bus_size_t);
void siop_sgc_w1(void *, bus_space_handle_t, bus_size_t, u_int8_t);
void siop_sgc_w2(void *, bus_space_handle_t, bus_size_t, u_int16_t);
struct siop_sgc_softc {
struct siop_softc sc_siop;
bus_space_tag_t sc_iot;
bus_space_handle_t sc_ioh;
struct hppa_bus_space_tag sc_bustag;
};
const struct cfattach siop_gedoens_ca = {
sizeof(struct siop_sgc_softc), siop_sgc_match, siop_sgc_attach
};
int
siop_sgc_match(struct device *parent, void *match, void *aux)
{
struct confargs *ca = aux;
if (ca->ca_type.iodc_type != HPPA_TYPE_ADMA ||
ca->ca_type.iodc_sv_model != HPPA_ADMA_FWSCSI)
return 0;
return 1;
}
void
siop_sgc_attach(struct device *parent, struct device *self, void *aux)
{
struct siop_sgc_softc *sc = (struct siop_sgc_softc *)self;
struct confargs *ca = aux;
volatile struct iomod *regs;
sc->sc_iot = ca->ca_iot;
if (bus_space_map(sc->sc_iot, ca->ca_hpa,
IOMOD_HPASIZE, 0, &sc->sc_ioh)) {
printf(": cannot map io space\n");
return;
}
sc->sc_bustag = *sc->sc_iot;
sc->sc_bustag.hbt_r1 = siop_sgc_r1;
sc->sc_bustag.hbt_r2 = siop_sgc_r2;
sc->sc_bustag.hbt_w1 = siop_sgc_w1;
sc->sc_bustag.hbt_w2 = siop_sgc_w2;
sc->sc_siop.sc_c.features = SF_CHIP_PF | SF_CHIP_BE | SF_BUS_WIDE;
sc->sc_siop.sc_c.maxburst = 4;
sc->sc_siop.sc_c.maxoff = 8;
sc->sc_siop.sc_c.clock_div = 3;
sc->sc_siop.sc_c.clock_period = 250;
sc->sc_siop.sc_c.ram_size = 0;
sc->sc_siop.sc_c.sc_reset = siop_sgc_reset;
sc->sc_siop.sc_c.sc_dmat = ca->ca_dmatag;
sc->sc_siop.sc_c.sc_rt = &sc->sc_bustag;
bus_space_subregion(sc->sc_iot, sc->sc_ioh, IOMOD_DEVOFFSET,
IOMOD_HPASIZE - IOMOD_DEVOFFSET, &sc->sc_siop.sc_c.sc_rh);
regs = bus_space_vaddr(sc->sc_iot, sc->sc_ioh);
regs->io_command = CMD_RESET;
while ((regs->io_status & IO_ERR_MEM_RY) == 0)
delay(100);
regs->io_ii_rw = IO_II_PACKEN | IO_II_PREFETCHEN;
siop_sgc_reset(&sc->sc_siop.sc_c);
regs->io_eim = cpu_gethpa(0) | (31 - ca->ca_irq);
regs->io_ii_rw |= IO_II_INTEN;
cpu_intr_establish(IPL_BIO, ca->ca_irq, siop_intr, sc,
sc->sc_siop.sc_c.sc_dev.dv_xname);
printf(": NCR53C720 rev %d\n", bus_space_read_1(sc->sc_siop.sc_c.sc_rt,
sc->sc_siop.sc_c.sc_rh, SIOP_CTEST3) >> 4);
siop_attach(&sc->sc_siop);
}
void
siop_sgc_reset(struct siop_common_softc *sc)
{
bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_DCNTL, DCNTL_EA);
bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST0, CTEST0_EHP);
bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST4, CTEST4_MUX);
bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STIME0,
(0xc << STIME0_SEL_SHIFT));
}
u_int8_t
siop_sgc_r1(void *v, bus_space_handle_t h, bus_size_t o)
{
return *(volatile u_int8_t *)(h + (o ^ 3));
}
u_int16_t
siop_sgc_r2(void *v, bus_space_handle_t h, bus_size_t o)
{
if (o == SIOP_SIST0) {
u_int16_t reg;
reg = siop_sgc_r1(v, h, SIOP_SIST0);
reg |= siop_sgc_r1(v, h, SIOP_SIST1) << 8;
return reg;
}
return *(volatile u_int16_t *)(h + (o ^ 2));
}
void
siop_sgc_w1(void *v, bus_space_handle_t h, bus_size_t o, u_int8_t vv)
{
*(volatile u_int8_t *)(h + (o ^ 3)) = vv;
}
void
siop_sgc_w2(void *v, bus_space_handle_t h, bus_size_t o, u_int16_t vv)
{
*(volatile u_int16_t *)(h + (o ^ 2)) = vv;
}

364
sys/arch/hppa/dev/ssio.c
View File

@ -1,364 +0,0 @@
/* $OpenBSD: ssio.c,v 1.8 2022/03/13 08:04:38 mpi Exp $ */
/*
* Copyright (c) 2007 Mark Kettenis
*
* Permission to use, copy, modify, and distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
/*
* Driver for the National Semiconductor PC87560 Legacy I/O chip.
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <machine/bus.h>
#include <machine/iomod.h>
#include <dev/pci/pcireg.h>
#include <dev/pci/pcivar.h>
#include <dev/pci/pcidevs.h>
#include <dev/pci/pciidereg.h>
#include <hppa/dev/ssiovar.h>
#include "ukbd.h"
#if NUKBD > 0
#include <dev/usb/ohcireg.h>
#include <dev/usb/ukbdvar.h>
#endif
/* PCI config space. */
#define SSIO_PCI_DMA_RC2 0x64
#define SSIO_PCI_INT_TC1 0x67
#define SSIO_PCI_INT_TC2 0x68
#define SSIO_PCI_INT_RC1 0x69
#define SSIO_PCI_INT_RC2 0x6a
#define SSIO_PCI_INT_RC3 0x6b
#define SSIO_PCI_INT_RC4 0x6c
#define SSIO_PCI_INT_RC5 0x6d
#define SSIO_PCI_INT_RC6 0x6e
#define SSIO_PCI_INT_RC7 0x6f
#define SSIO_PCI_INT_RC8 0x70
#define SSIO_PCI_INT_RC9 0x71
#define SSIO_PCI_SP1BAR 0x94
#define SSIO_PCI_SP2BAR 0x98
#define SSIO_PCI_PPBAR 0x9c
#define SSIO_PCI_INT_TC1_MASK 0xff
#define SSIO_PCI_INT_TC1_SHIFT 24
#define SSIO_PCI_INT_TC2_MASK 0xff
#define SSIO_PCI_INT_TC2_SHIFT 0
#define SSIO_PCI_INT_RC1_MASK 0xff
#define SSIO_PCI_INT_RC1_SHIFT 8
#define SSIO_PCI_INT_RC2_MASK 0xff
#define SSIO_PCI_INT_RC2_SHIFT 16
#define SSIO_PCI_INT_RC3_MASK 0xff
#define SSIO_PCI_INT_RC3_SHIFT 24
#define SSIO_PCI_INT_RC4_MASK 0xff
#define SSIO_PCI_INT_RC4_SHIFT 0
#define SSIO_PCI_INT_RC5_MASK 0xff
#define SSIO_PCI_INT_RC5_SHIFT 8
#define SSIO_PCI_INT_RC6_MASK 0xff
#define SSIO_PCI_INT_RC6_SHIFT 16
#define SSIO_PCI_INT_RC7_MASK 0xff
#define SSIO_PCI_INT_RC7_SHIFT 24
#define SSIO_PCI_INT_RC8_MASK 0xff
#define SSIO_PCI_INT_RC8_SHIFT 0
#define SSIO_PCI_INT_RC9_MASK 0xff
#define SSIO_PCI_INT_RC9_SHIFT 8
/* Cascaded i8259-compatible PICs. */
#define SSIO_PIC1 0x20
#define SSIO_PIC2 0xa0
#define SSIO_NINTS 16
int ssio_match(struct device *, void *, void *);
void ssio_attach(struct device *, struct device *, void *);
struct ssio_iv {
int (*handler)(void *);
void *arg;
};
struct ssio_iv ssio_intr_table[SSIO_NINTS];
struct ssio_softc {
struct device sc_dev;
bus_space_tag_t sc_iot;
bus_space_handle_t sc_ic1h;
bus_space_handle_t sc_ic2h;
void *sc_ih;
};
const struct cfattach ssio_ca = {
sizeof(struct ssio_softc), ssio_match, ssio_attach
};
struct cfdriver ssio_cd = {
NULL, "ssio", DV_DULL
};
const struct pci_matchid ssio_devices[] = {
{ PCI_VENDOR_NS, PCI_PRODUCT_NS_PC87560 }
};
int ssio_intr(void *);
int ssio_print(void *, const char *);
int
ssio_match(struct device *parent, void *match, void *aux)
{
struct pci_attach_args *pa = aux;
pcireg_t bhlc, id;
pcitag_t tag;
/*
* The firmware doesn't always switch the IDE function into native
* mode. So we do that ourselves since it makes life much simpler.
* Note that we have to do this in the match function since the
* Legacy I/O function attaches after the IDE function.
*/
if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_NS &&
PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_NS_PC87415) {
bhlc = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_BHLC_REG);
if (!PCI_HDRTYPE_MULTIFN(bhlc))
return (0);
tag = pci_make_tag(pa->pa_pc, pa->pa_bus, pa->pa_device, 1);
id = pci_conf_read(pa->pa_pc, tag, PCI_ID_REG);
if (PCI_VENDOR(id) != PCI_VENDOR_NS ||
PCI_PRODUCT(id) != PCI_PRODUCT_NS_PC87560)
return (0);
pa->pa_class |= PCIIDE_INTERFACE_PCI(0) << PCI_INTERFACE_SHIFT;
pa->pa_class |= PCIIDE_INTERFACE_PCI(1) << PCI_INTERFACE_SHIFT;
pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_CLASS_REG,
pa->pa_class);
return (0);
}
return (pci_matchbyid((struct pci_attach_args *)aux, ssio_devices,
sizeof(ssio_devices) / sizeof (ssio_devices[0])));
}
void
ssio_attach(struct device *parent, struct device *self, void *aux)
{
struct ssio_softc *sc = (void *)self;
struct pci_attach_args *pa = aux;
struct ssio_attach_args saa;
pci_intr_handle_t ih;
const char *intrstr;
pcireg_t reg;
#if NUKBD > 0
pcitag_t tag;
#endif
sc->sc_iot = pa->pa_iot;
if (bus_space_map(sc->sc_iot, SSIO_PIC1, 2, 0, &sc->sc_ic1h)) {
printf(": unable to map PIC1 registers\n");
return;
}
if (bus_space_map(sc->sc_iot, SSIO_PIC2, 2, 0, &sc->sc_ic2h)) {
printf(": unable to map PIC2 registers\n");
goto unmap_ic1;
}
if (pci_intr_map(pa, &ih)) {
printf(": unable to map interrupt\n");
goto unmap_ic2;
}
intrstr = pci_intr_string(pa->pa_pc, ih);
/* XXX Probably should be IPL_NESTED. */
sc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_TTY, ssio_intr,
sc, sc->sc_dev.dv_xname);
if (sc->sc_ih == NULL) {
printf(": couldn't establish interrupt\n");
goto unmap_ic2;
}
printf(": %s\n", intrstr);
/*
* We use the following interrupt mapping:
*
* USB (INTD#) IRQ 1
* IDE Channel 1 IRQ 5
* Serial Port 1 IRQ 4
* Serial Port 2 IRQ 3
* Parallel Port IRQ 7
*
* USB and IDE are set to level triggered, all others to edge
* triggered.
*
* We disable all other interrupts since we don't need them.
*/
reg = pci_conf_read(pa->pa_pc, pa->pa_tag, SSIO_PCI_DMA_RC2);
reg &= ~(SSIO_PCI_INT_TC1_MASK << SSIO_PCI_INT_TC1_SHIFT);
reg |= 0x22 << SSIO_PCI_INT_TC1_SHIFT;
pci_conf_write(pa->pa_pc, pa->pa_tag, SSIO_PCI_DMA_RC2, reg);
reg = 0;
reg |= 0x34 << SSIO_PCI_INT_RC1_SHIFT; /* SP1, SP2 */
reg |= 0x07 << SSIO_PCI_INT_RC2_SHIFT; /* PP */
reg |= 0x05 << SSIO_PCI_INT_RC3_SHIFT; /* IDE1 */
pci_conf_write(pa->pa_pc, pa->pa_tag, SSIO_PCI_INT_TC2, reg);
reg = 0;
reg |= 0x10 << SSIO_PCI_INT_RC5_SHIFT; /* INTD# (USB) */
pci_conf_write(pa->pa_pc, pa->pa_tag, SSIO_PCI_INT_RC4, reg);
/* Program PIC1. */
bus_space_write_1(sc->sc_iot, sc->sc_ic1h, 0, 0x11);
bus_space_write_1(sc->sc_iot, sc->sc_ic1h, 1, 0x00);
bus_space_write_1(sc->sc_iot, sc->sc_ic1h, 1, 0x04);
bus_space_write_1(sc->sc_iot, sc->sc_ic1h, 1, 0x01);
/* Priority (3-7,0-2). */
bus_space_write_1(sc->sc_iot, sc->sc_ic1h, 0, 0xc2);
/* Program PIC2. */
bus_space_write_1(sc->sc_iot, sc->sc_ic2h, 0, 0x11);
bus_space_write_1(sc->sc_iot, sc->sc_ic2h, 1, 0x00);
bus_space_write_1(sc->sc_iot, sc->sc_ic2h, 1, 0x02);
bus_space_write_1(sc->sc_iot, sc->sc_ic2h, 1, 0x01);
/* Unmask all interrupts. */
bus_space_write_1(sc->sc_iot, sc->sc_ic1h, 1, 0x00);
bus_space_write_1(sc->sc_iot, sc->sc_ic2h, 1, 0x00);
/* Serial Port 1. */
saa.saa_name = "com";
saa.saa_iot = sc->sc_iot;
saa.saa_iobase = pci_conf_read(pa->pa_pc, pa->pa_tag, SSIO_PCI_SP1BAR);
saa.saa_iobase &= 0xfffffffe;
saa.saa_irq = 4;
config_found(self, &saa, ssio_print);
/* Serial Port 2. */
saa.saa_name = "com";
saa.saa_iot = sc->sc_iot;
saa.saa_iobase = pci_conf_read(pa->pa_pc, pa->pa_tag, SSIO_PCI_SP2BAR);
saa.saa_iobase &= 0xfffffffe;
saa.saa_irq = 3;
config_found(self, &saa, ssio_print);
/* Parallel Port. */
saa.saa_name = "lpt";
saa.saa_iot = sc->sc_iot;
saa.saa_iobase = pci_conf_read(pa->pa_pc, pa->pa_tag, SSIO_PCI_PPBAR);
saa.saa_iobase &= 0xfffffffe;
saa.saa_irq = 7;
config_found(self, &saa, ssio_print);
#if NUKBD > 0
/*
* If a USB keybard is used for console input, the firmware passes
* the mmio address of the USB controller the keyboard is attached
* to. Since we know the USB controller is function 2 on the same
* device and comes right after us (we're function 1 remember),
* this is a convenient spot to mark the USB keyboard as console
* if the address matches.
*/
tag = pci_make_tag(pa->pa_pc, pa->pa_bus, pa->pa_device, 2);
reg = pci_conf_read(pa->pa_pc, tag, PCI_CBMEM);
if (PAGE0->mem_kbd.pz_class == PCL_KEYBD &&
PAGE0->mem_kbd.pz_hpa == reg)
ukbd_cnattach();
#endif
return;
unmap_ic2:
bus_space_unmap(sc->sc_iot, sc->sc_ic2h, 2);
unmap_ic1:
bus_space_unmap(sc->sc_iot, sc->sc_ic1h, 2);
}
int
ssio_intr(void *v)
{
struct ssio_softc *sc = v;
struct ssio_iv *iv;
int claimed = 0;
int irq, isr;
/* Poll for interrupt. */
bus_space_write_1(sc->sc_iot, sc->sc_ic1h, 0, 0x0c);
irq = bus_space_read_1(sc->sc_iot, sc->sc_ic1h, 0);
irq &= 0x07;
if (irq == 7) {
bus_space_write_1(sc->sc_iot, sc->sc_ic1h, 0, 0x0b);
isr = bus_space_read_1(sc->sc_iot, sc->sc_ic1h, 0);
if ((isr & 0x80) == 0)
/* Spurious interrupt. */
return (0);
}
iv = &ssio_intr_table[irq];
if (iv->handler)
claimed = iv->handler(iv->arg);
/* Signal EOI. */
bus_space_write_1(sc->sc_iot, sc->sc_ic1h, 0, 0x60 | (irq & 0x0f));
return (claimed);
}
void *
ssio_intr_establish(int pri, int irq, int (*handler)(void *), void *arg,
const char *name)
{
struct ssio_iv *iv;
if (irq < 0 || irq >= SSIO_NINTS || ssio_intr_table[irq].handler)
return (NULL);
iv = &ssio_intr_table[irq];
iv->handler = handler;
iv->arg = arg;
return (iv);
}
int
ssio_print(void *aux, const char *pnp)
{
struct ssio_attach_args *saa = aux;
if (pnp)
printf("%s at %s", saa->saa_name, pnp);
if (saa->saa_iobase) {
printf(" offset %lx", saa->saa_iobase);
if (!pnp && saa->saa_irq >= 0)
printf(" irq %d", saa->saa_irq);
}
return (UNCONF);
}

29
sys/arch/hppa/dev/ssiovar.h
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@ -1,29 +0,0 @@
/* $OpenBSD: ssiovar.h,v 1.1 2007/06/19 22:51:26 kettenis Exp $ */
/*
* Copyright (c) 2007 Mark Kettenis
*
* Permission to use, copy, modify, and distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
struct ssio_attach_args {
const char *saa_name;
bus_space_tag_t saa_iot;
bus_addr_t saa_iobase;
int saa_irq;
};
#define ssiocf_irq cf_loc[0]
#define SSIO_UNK_IRQ -1
void *ssio_intr_establish(int, int, int (*)(void *), void *, const char *);

68
sys/arch/hppa/dev/sti_pci_machdep.c
View File

@ -1,68 +0,0 @@
/* $OpenBSD: sti_pci_machdep.c,v 1.3 2023/04/13 15:07:43 miod Exp $ */
/*
* Copyright (c) 2007, 2009 Miodrag Vallat.
*
* Permission to use, copy, modify, and distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice, this permission notice, and the disclaimer below
* appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <machine/iomod.h>
#include <machine/autoconf.h>
#include <dev/pci/pcivar.h>
int sti_pci_is_console(struct pci_attach_args *, bus_addr_t *);
int
sti_pci_is_console(struct pci_attach_args *paa, bus_addr_t *bases)
{
u_int32_t cf;
bus_addr_t addr;
int bar;
int rc;
/*
* PAGE0 console information will point to one of our BARs,
* but depending on the particular sti model, this might not
* be the BAR mapping the rom (region #0).
*
* For example, on Visualize FXe, regions #0, #2 and #3 are
* mapped by BAR 0x18, while region #1 is mapped by BAR 0x10,
* which matches PAGE0 console address.
*
* Rather than trying to be smart, reread the region->BAR array
* again, and compare the BAR mapping region #1 against PAGE0
* values, we simply try all the valid BARs; if any of them
* matches what PAGE0 says, then we are the console, and it
* doesn't matter which BAR matched.
*/
for (bar = PCI_MAPREG_START; bar <= PCI_MAPREG_PPB_END; bar += 4) {
cf = pci_conf_read(paa->pa_pc, paa->pa_tag, bar);
rc = pci_mapreg_info(paa->pa_pc, paa->pa_tag, bar,
_PCI_MAPREG_TYPEBITS(cf), &addr, NULL, NULL);
if (PCI_MAPREG_TYPE(cf) == PCI_MAPREG_TYPE_MEM &&
PCI_MAPREG_MEM_TYPE(cf) == PCI_MAPREG_MEM_TYPE_64BIT)
bar += 4;
if (rc == 0 &&
(hppa_hpa_t)addr == (hppa_hpa_t)PAGE0->mem_cons.pz_hpa)
return 1;
}
return 0;
}

223
sys/arch/hppa/dev/sti_sgc.c
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@ -1,223 +0,0 @@
/* $OpenBSD: sti_sgc.c,v 1.41 2022/03/13 08:04:38 mpi Exp $ */
/*
* Copyright (c) 2000-2003 Michael Shalayeff
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
* THE POSSIBILITY OF SUCH DAMAGE.
*/
/*
* These cards has to be known to work so far:
* - HPA1991AGrayscale rev 0.02 (705/35) (byte-wide)
* - HPA1991AC19 rev 0.02 (715/33) (byte-wide)
* - HPA208LC1280 rev 8.04 (712/80) just works
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <machine/bus.h>
#include <machine/cpu.h>
#include <machine/iomod.h>
#include <machine/autoconf.h>
#include <dev/wscons/wsdisplayvar.h>
#include <dev/wscons/wsconsio.h>
#include <dev/ic/stireg.h>
#include <dev/ic/stivar.h>
#include <hppa/dev/cpudevs.h>
#define STI_ROMSIZE (sizeof(struct sti_dd) * 4)
#define STI_ID_FDDI 0x280b31af /* Medusa FDDI ROM id */
/* gecko optional graphics (these share the onboard's prom) */
const char sti_sgc_opt[] = { 0x17, 0x20, 0x30, 0x40, 0x70, 0xc0, 0xd0 };
extern struct cfdriver sti_cd;
int sti_sgc_probe(struct device *, void *, void *);
void sti_sgc_attach(struct device *, struct device *, void *);
paddr_t sti_sgc_getrom(int, struct confargs *);
const struct cfattach sti_gedoens_ca = {
sizeof(struct sti_softc), sti_sgc_probe, sti_sgc_attach
};
/*
* Locate STI ROM.
* On some machines it may not be part of the HPA space.
*/
paddr_t
sti_sgc_getrom(int unit, struct confargs *ca)
{
paddr_t rom = PAGE0->pd_resv2[1];
int i;
if (unit) {
i = -1;
if (ca->ca_type.iodc_sv_model == HPPA_FIO_GSGC)
for (i = sizeof(sti_sgc_opt); i-- &&
sti_sgc_opt[i] != ca->ca_type.iodc_revision; )
;
if (i < 0)
rom = 0;
}
if (rom < HPPA_IOBEGIN) {
if (ca->ca_naddrs > 0)
rom = ca->ca_addrs[0].addr;
else
rom = ca->ca_hpa;
}
return (rom);
}
int
sti_sgc_probe(struct device *parent, void *match, void *aux)
{
struct cfdata *cf = match;
struct confargs *ca = aux;
bus_space_handle_t romh;
paddr_t rom;
u_int32_t id;
u_char devtype;
int rv = 0, romunmapped = 0;
/* due to the graphic nature of this program do probe only one */
if (cf->cf_unit > sti_cd.cd_ndevs)
return (0);
if (ca->ca_type.iodc_type != HPPA_TYPE_FIO)
return (0);
/* these need further checking for the graphics id */
if (ca->ca_type.iodc_sv_model != HPPA_FIO_GSGC &&
ca->ca_type.iodc_sv_model != HPPA_FIO_SGC)
return 0;
rom = sti_sgc_getrom(cf->cf_unit, ca);
#ifdef STIDEBUG
printf ("sti: hpa=%lx, rom=%lx\n", ca->ca_hpa, rom);
#endif
/* if it does not map, probably part of the lasi space */
if ((rv = bus_space_map(ca->ca_iot, rom, STI_ROMSIZE, 0, &romh))) {
#ifdef STIDEBUG
printf ("sti: cannot map rom space (%d)\n", rv);
#endif
if ((rom & HPPA_IOBEGIN) == HPPA_IOBEGIN) {
romh = rom;
romunmapped++;
} else {
/* in this case nobody has no freaking idea */
return 0;
}
}
devtype = bus_space_read_1(ca->ca_iot, romh, 3);
#ifdef STIDEBUG
printf("sti: devtype=%d\n", devtype);
#endif
rv = 1;
switch (devtype) {
case STI_DEVTYPE4:
id = bus_space_read_4(ca->ca_iot, romh, 0x8);
break;
case STI_DEVTYPE1:
id = (bus_space_read_1(ca->ca_iot, romh, 0x10 + 3) << 24) |
(bus_space_read_1(ca->ca_iot, romh, 0x10 + 7) << 16) |
(bus_space_read_1(ca->ca_iot, romh, 0x10 + 11) << 8) |
(bus_space_read_1(ca->ca_iot, romh, 0x10 + 15));
break;
default:
#ifdef STIDEBUG
printf("sti: unknown type (%x)\n", devtype);
#endif
rv = 0;
}
if (rv &&
ca->ca_type.iodc_sv_model == HPPA_FIO_SGC && id == STI_ID_FDDI) {
#ifdef STIDEBUG
printf("sti: not a graphics device\n");
#endif
rv = 0;
}
if (ca->ca_naddrs >= sizeof(ca->ca_addrs)/sizeof(ca->ca_addrs[0])) {
printf("sti: address list overflow\n");
return (0);
}
ca->ca_addrs[ca->ca_naddrs].addr = rom;
ca->ca_addrs[ca->ca_naddrs].size = sti_rom_size(ca->ca_iot, romh);
ca->ca_naddrs++;
if (!romunmapped)
bus_space_unmap(ca->ca_iot, romh, STI_ROMSIZE);
return (rv);
}
void
sti_sgc_attach(struct device *parent, struct device *self, void *aux)
{
struct sti_softc *sc = (void *)self;
struct confargs *ca = aux;
bus_space_handle_t romh;
paddr_t rom;
u_int32_t romlen;
int rv;
int i;
/* we stashed rom addr/len into the last slot during probe */
rom = ca->ca_addrs[ca->ca_naddrs - 1].addr;
romlen = ca->ca_addrs[ca->ca_naddrs - 1].size;
if ((rv = bus_space_map(ca->ca_iot, rom, romlen, 0, &romh))) {
if ((rom & HPPA_IOBEGIN) == HPPA_IOBEGIN)
romh = rom;
else {
printf (": cannot map rom space (%d)\n", rv);
return;
}
}
sc->bases[0] = romh;
for (i = 1; i < STI_REGION_MAX; i++)
sc->bases[i] = ca->ca_hpa;
#ifdef HP7300LC_CPU
/* PCXL2: enable accel i/o for this space */
if (cpu_type == hpcxl2)
eaio_l2(0x8 >> (((ca->ca_hpa >> 25) & 3) - 2));
#endif
if (ca->ca_hpa == (hppa_hpa_t)PAGE0->mem_cons.pz_hpa)
sc->sc_flags |= STI_CONSOLE;
if (sti_attach_common(sc, ca->ca_iot, ca->ca_iot, romh,
STI_CODEBASE_PA) == 0)
startuphook_establish(sti_end_attach, sc);
}

136
sys/arch/hppa/dev/uturn.c
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@ -1,136 +0,0 @@
/* $OpenBSD: uturn.c,v 1.8 2022/03/13 08:04:38 mpi Exp $ */
/*
* Copyright (c) 2004 Michael Shalayeff
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
* THE POSSIBILITY OF SUCH DAMAGE.
*/
/* TODO IOA programming */
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <sys/reboot.h>
#include <machine/iomod.h>
#include <machine/autoconf.h>
#include <hppa/dev/cpudevs.h>
struct uturn_regs {
u_int64_t resv0[2];
u_int64_t status; /* 0x10: */
u_int64_t resv1[5];
u_int64_t debug; /* 0x40: */
};
struct uturn_softc {
struct device sc_dv;
struct uturn_regs volatile *sc_regs;
};
int uturnmatch(struct device *, void *, void *);
void uturnattach(struct device *, struct device *, void *);
const struct cfattach uturn_ca = {
sizeof(struct uturn_softc), uturnmatch, uturnattach
};
struct cfdriver uturn_cd = {
NULL, "uturn", DV_DULL
};
int
uturnmatch(parent, cfdata, aux)
struct device *parent;
void *cfdata;
void *aux;
{
struct confargs *ca = aux;
/* struct cfdata *cf = cfdata; */
/* there will be only one */
if (ca->ca_type.iodc_type != HPPA_TYPE_IOA ||
ca->ca_type.iodc_sv_model != HPPA_IOA_UTURN)
return 0;
if (ca->ca_type.iodc_model == 0x58 &&
ca->ca_type.iodc_revision >= 0x20)
return 0;
return 1;
}
void
uturnattach(parent, self, aux)
struct device *parent;
struct device *self;
void *aux;
{
struct confargs *ca = aux, nca;
struct uturn_softc *sc = (struct uturn_softc *)self;
bus_space_handle_t ioh;
hppa_hpa_t hpa;
if (bus_space_map(ca->ca_iot, ca->ca_hpa, IOMOD_HPASIZE, 0, &ioh)) {
printf(": can't map IO space\n");
return;
}
sc->sc_regs = (struct uturn_regs *)ca->ca_hpa;
printf(": %s rev %d\n",
ca->ca_type.iodc_revision < 0x10? "U2" : "UTurn",
ca->ca_type.iodc_revision & 0xf);
/* keep it real */
((struct iomod *)ioh)->io_control = 0x80;
/*
* U2/UTurn is actually a combination of an Upper Bus
* Converter (UBC) and a Lower Bus Converter (LBC). This
* driver attaches to the UBC; the LBC isn't very interesting,
* so we skip it. This is easy, since it always is module 63,
* hence the MAXMODBUS - 1 below.
*/
nca = *ca;
nca.ca_hpamask = HPPA_IOBEGIN;
pdc_scanbus(self, &nca, MAXMODBUS - 1, 0, 0);
/* XXX On some machines, PDC doesn't tell us about all devices. */
switch (cpu_hvers) {
case HPPA_BOARD_HP809:
case HPPA_BOARD_HP819:
case HPPA_BOARD_HP829:
case HPPA_BOARD_HP839:
case HPPA_BOARD_HP849:
case HPPA_BOARD_HP859:
case HPPA_BOARD_HP869:
hpa = ((struct iomod *)ioh)->io_io_low << 16;
pdc_scanbus(self, &nca, MAXMODBUS - 1, hpa, 0);
break;
default:
break;
}
}

215
sys/arch/hppa/dev/viper.h
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@ -1,215 +0,0 @@
/* $OpenBSD: viper.h,v 1.7 2021/03/11 11:16:56 jsg Exp $ */
/*
* Copyright (c) 1991,1994 The University of Utah and
* the Computer Systems Laboratory (CSL). All rights reserved.
*
* Permission to use, copy, modify and distribute this software is hereby
* granted provided that (1) source code retains these copyright, permission,
* and disclaimer notices, and (2) redistributions including binaries
* reproduce the notices in supporting documentation, and (3) all advertising
* materials mentioning features or use of this software display the following
* acknowledgement: ``This product includes software developed by the
* Computer Systems Laboratory at the University of Utah.''
*
* THE UNIVERSITY OF UTAH AND CSL ALLOW FREE USE OF THIS SOFTWARE IN ITS "AS
* IS" CONDITION. THE UNIVERSITY OF UTAH AND CSL DISCLAIM ANY LIABILITY OF
* ANY KIND FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
*
* CSL requests users of this software to return to csl-dist@cs.utah.edu any
* improvements that they make and grant CSL redistribution rights.
*
* Utah $Hdr: viper.h 1.8 94/12/14$
*/
/*
* Viper control register.
*
* With respect to arbitration preference (*_prf), only one of these may be
* set at any one time. "preference" means that a particular device will
* be granted the bus on every other arbitration cycle; these bits default
* to unset (0). Similarly, a device may be denied the bus (*_den); these
* bits default to *set* (1).
*
* The macros V_CTRL_ANYPRF or V_CTRL_ANYDEN should be used to determine
* if any preference or deny bits are set.
*/
#define VI_CTRL_EISA_DEN 0x00000001 /* EISA denied bus grants */
#define VI_CTRL_EISA_PRF 0x00000002 /* EISA bus has arbitration preference */
#define VI_CTRL_CORE_DEN 0x00000004 /* CORE denied bus grants */
#define VI_CTRL_CORE_PRF 0x00000008 /* CORE bus has arbitration preference */
#define VI_CTRL_SGC0_DEN 0x00000010 /* SGC0 denied bus grants */
#define VI_CTRL_SGC0_PRF 0x00000020 /* SGC0 has arbitration preference */
#define VI_CTRL_SGC1_DEN 0x00000040 /* SGC1 denied bus grants */
#define VI_CTRL_SGC1_PRF 0x00000080 /* SGC1 has arbitration preference */
#define VI_CTRL_CPU_PRF 0x00000200 /* CPU has arbitration preference */
#define VI_CTRL_LPMC_EN 0x00010000 /* enable Low Priority Machine Checks */
#define VI_CTRL_IPREF_EN 0x00020000 /* enable instruction prefetching */
#define VI_CTRL_VSC_TOUT 0xfff80000 /* VSC clocks to wait before buserr tmo */
#define VI_CTRL_ANYPRF 0x02AA
#define VI_CTRL_ANYDEN 0x0055
#define VI_CTRL PAGE0->pz_Pdep.pd_Viper.v_Ctrlcpy
#define VI_CTRL_BITS "\020\001eisa_den\002eisa_prf\003core_den\004core_prf" \
"\005sgc1_den\006sgc1_prf\007sgc0_den\010sgc0_prf" \
"\012cpu_prf\021lpmc_en\022ipref_en"
#define VI_STAT_BITS "\020\001grf_buserr\002cpu_buserr\003ven_tmo" \
"\004ven_buserr\005toc\006hardecc\007softecc\010cmdrst"
struct vi_stat { /* (RO) */
u_int hw_rev :24, /* Viper hardware revision (24 bits!) */
cmdreset: 1, /* set if last chip reset caused by CMD_RESET */
softecc : 1, /* correctable memory error (lpmc_en set) */
hardecc : 1, /* uncorrectable memory error (HPMC) */
toc : 1, /* Transfer Of Control signaled */
vn_ader : 1, /* Venom address error (lpmc_en set) */
vn_vscto: 1, /* Venom VSC timeout (lpmc_en set) */
cpu_ader: 1, /* CPU address error or timeout (HPMC) */
grf_ader: 1; /* Graphics address error */
};
/*
* Viper TRS. The structures have been defined above; the remaining
* fields are described here.
*
* vi_intrwd (WO)
* If a high to low transition of the interrupt line occurs,
* Viper will send this to the CPU to be or'd into its EIR.
* In general, this is an ASP interrupt request.
*
* vi_mem_ctrl (WO)
* Set various DRAM attributes (row, cols, refresh, etc).
*
* vi_mem_wrchk (WO), vi_mem_rdchk (RO)
* read/write data to be for copyin/memtest.
*
* vi_mem_limit (WO)
* Set an upper limit for non-IO memory accesses; this must
* be less than the actual memory size, low 22 bits ignored.
*
* vi_merr_w0, vi_merr_w1, vi_merr_ckbyte, vi_merr_addr (RO)
* If memory error detection enabled and soft/hard ECC error,
* raw double word is stored here (w0: most significant word).
* The raw checkbyte data is stored in "vi_merr_ckbyte".
* The address of last logged error is in "vi_merr_addr".
*
*/
struct vi_trs {
u_int vi_control; /* PAGE0->pz_Pdep.pd_Viper.v_Ctrlcpy */
struct vi_stat vi_status;
u_int vi_intrwd;
u_int vi_resv1[13];
u_int vi_mem_ctrl;
u_int vi_mem_wrchk;
u_int vi_mem_limit;
u_int vi_resv2[1];
u_int vi_merr_w1;
u_int vi_merr_w2;
u_int vi_merr_ckbyte;
u_int vi_mem_rdchk;
u_int vi_merr_addr;
u_int vi_resv3[135];
};
/*
** Viper also creates HPA registers for the graphics accelerator (Venom).
** Venom has two sets of resisters; the User HPA contains registers that
** users are allowed to access, while the Supervisor HPA is only accessible
** by code running at the most privileged level. Both sets of registers
** are defined below.
*/
#define VENOM_USER ((struct vn_user *)0xFFFBC000)
#define VENOM_SUPR ((struct vn_supr *)0xFFFBD000)
/*
* Define bits in the Venom "User Control" register.
*/
struct vnu_ctl {
u_int sdt_msk :16, /* screen door transparency mask */
: 6,
d_z_intp: 1, /* disable Z Interpolation when set */
d_c_intp: 1, /* disable Color Interpolation when set */
d_ad_inc: 1, /* disable I/O Addr Incrementing when set */
: 1,
z_fast : 1, /* enable Fast Z Interpolation when set */
c_pseudo: 1, /* enable Pseudo Color when set (disable RG) */
z_prec24: 1, /* enable 24-bit Z integer precision (o/w 16) */
cmp_intp: 3; /* enable cond: Z intp owrites old Z (<,>,=) */
};
/*
* When vnu_ctl's "z_prec24" is set, 24-bit Z integer precision is enabled
* (otherwise 16-bit integer precision is used). When enabled, the format
* of various User Control registers is changed; `vnu_prec' (defined below)
* should make this format more clear.
*/
union vnu_prec { /* 16 or 24 bit precision */
struct {
u_int zero1; /* must be zero */
u_int intg :16, /* integer part (16 bits) */
frac :12, /* fractional part (12 bits) */
zero2 : 4; /* must be zero */
} prec16;
struct {
u_int frac_lo : 4, /* fractional part (lower 4 bits) */
zero1 :28; /* must be zero */
u_int intg :24, /* integer part (24 bits) */
frac_hi : 8; /* fractional part (upper 8 bits) */
} prec24;
};
#define vnu_p16i prec16.intg
#define vnu_p16f prec16.frac
#define vnu_p24i prec24.intg
#define vnu_p24f ((prec24.frac_hi << 4) | prec24.frac_lo)
#define vnu_p24fh prec24.frac_hi
#define vnu_p24fl prec24.frac_lo
/*
* Venom User HPA registers.
*/
struct vn_user {
u_int vnu_resv1[32];
struct vnu_ctl vnu_uctl; /* user control */
u_int vnu_spancnt; /* span count (13 bits, signed) */
u_int vnu_graddr; /* graphics address (24 bits: 6-29) */
u_int vnu_resv2;
union vnu_prec vnu_zslope; /* Z Slope */
union vnu_prec vnu_z; /* Z */
u_int vnu_resv3[8];
u_int vnu_bslope; /* Blue Slope (12-19:int, 20-31:fra) */
u_int vnu_bcolor; /* Blue Color (12-19:int, 20-31:fra) */
u_int vnu_resv4[2];
u_int vnu_rslope; /* Red Slope (12-19:int, 20-31:fra) */
u_int vnu_rcolor; /* Red Color (12-19:int, 20-31:fra) */
u_int vnu_resv5[2];
u_int vnu_gslope; /* Green Slope (12-19:int, 20-31:fra) */
u_int vnu_gcolor; /* Green Color (12-19:int, 20-31:fra) */
};
/*
* Define bits in Venom "Supervisor Control" register.
*/
struct vns_ctl {
u_int : 4,
ioaddr : 2, /* graphics addr (bits 4 & 5 of `vnu_graddr') */
d_venom : 1, /* disable Venom operation processing */
:25;
};
/*
* Venom Supervisor HPA registers.
*/
struct vn_supr {
u_int vns_resv1[32];
struct vns_ctl vns_sctl; /* supervisor control */
u_int vns_zaddr; /* Z Buffer Address (RO) */
};
void viper_setintrwnd(u_int32_t mask);
void viper_eisa_en(void);

119
sys/arch/hppa/dev/wax.c
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@ -1,119 +0,0 @@
/* $OpenBSD: wax.c,v 1.11 2018/05/14 13:54:39 kettenis Exp $ */
/*
* Copyright (c) 1998-2003 Michael Shalayeff
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
* THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <sys/reboot.h>
#include <machine/iomod.h>
#include <machine/autoconf.h>
#include <hppa/dev/cpudevs.h>
#include <hppa/gsc/gscbusvar.h>
#define WAX_IOMASK 0xfff00000
int waxmatch(struct device *, void *, void *);
void waxattach(struct device *, struct device *, void *);
void wax_gsc_attach(struct device *);
const struct cfattach wax_ca = {
sizeof(struct device), waxmatch, waxattach
};
struct cfdriver wax_cd = {
NULL, "wax", DV_DULL
};
int
waxmatch(parent, cfdata, aux)
struct device *parent;
void *cfdata;
void *aux;
{
struct confargs *ca = aux;
struct cfdata *cf = cfdata;
/* there will be only one */
if (cf->cf_unit > 0 ||
ca->ca_type.iodc_type != HPPA_TYPE_BHA ||
ca->ca_type.iodc_sv_model != HPPA_BHA_WAX)
return 0;
return 1;
}
void
waxattach(parent, self, aux)
struct device *parent;
struct device *self;
void *aux;
{
struct confargs *ca = aux;
struct gsc_attach_args ga;
struct gscbus_ic *ic;
bus_space_handle_t ioh;
int s;
if (bus_space_map(ca->ca_iot, ca->ca_hpa, IOMOD_HPASIZE, 0, &ioh)) {
printf(": can't map IO space\n");
return;
}
printf("\n");
/* interrupts guts */
ic = (struct gscbus_ic *)ca->ca_hpa;
s = splhigh();
ic->iar = 0; /* will be set up by gsc when attaching */
ic->icr = 0;
ic->imr = ~0U;
(void)ic->irr;
ic->imr = 0;
splx(s);
ga.ga_ca = *ca; /* clone from us */
if (!strcmp(parent->dv_xname, "mainbus0")) {
ga.ga_dp.dp_bc[0] = ga.ga_dp.dp_bc[1];
ga.ga_dp.dp_bc[1] = ga.ga_dp.dp_bc[2];
ga.ga_dp.dp_bc[2] = ga.ga_dp.dp_bc[3];
ga.ga_dp.dp_bc[3] = ga.ga_dp.dp_bc[4];
ga.ga_dp.dp_bc[4] = ga.ga_dp.dp_bc[5];
ga.ga_dp.dp_bc[5] = ga.ga_dp.dp_mod;
ga.ga_dp.dp_mod = 0;
}
ga.ga_name = "gsc";
ga.ga_hpamask = WAX_IOMASK;
ga.ga_parent = gsc_wax;
ga.ga_ic = ic;
config_found(self, &ga, gscprint);
}

87
sys/arch/hppa/gsc/arcofi_gsc.c
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@ -1,87 +0,0 @@
/* $OpenBSD: arcofi_gsc.c,v 1.1 2011/12/21 23:12:03 miod Exp $ */
/*
* Copyright (c) 2011 Miodrag Vallat.
*
* Permission to use, copy, modify, and distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <machine/autoconf.h>
#include <machine/bus.h>
#include <machine/cpu.h>
#include <machine/intr.h>
#include <machine/iomod.h>
#include <sys/audioio.h>
#include <dev/audio_if.h>
#include <dev/ic/arcofivar.h>
#include <hppa/dev/cpudevs.h>
#include <hppa/gsc/gscbusvar.h>
int arcofi_gsc_match(struct device *, void *, void *);
void arcofi_gsc_attach(struct device *, struct device *, void *);
const struct cfattach arcofi_gsc_ca = {
sizeof(struct arcofi_softc),
arcofi_gsc_match,
arcofi_gsc_attach
};
int
arcofi_gsc_match(struct device *parent, void *match, void *vaa)
{
struct gsc_attach_args *ga = vaa;
if (ga->ga_type.iodc_type == HPPA_TYPE_FIO &&
(ga->ga_type.iodc_sv_model == HPPA_FIO_A1 ||
ga->ga_type.iodc_sv_model == HPPA_FIO_A1NB))
return 1;
return 0;
}
void
arcofi_gsc_attach(struct device *parent, struct device *self, void *vaa)
{
struct arcofi_softc *sc = (struct arcofi_softc *)self;
struct gsc_attach_args *ga = vaa;
unsigned int u;
for (u = 0; u < ARCOFI_NREGS; u++)
sc->sc_reg[u] = (u << 2) | 0x01;
sc->sc_iot = ga->ga_iot;
if (bus_space_map(sc->sc_iot, ga->ga_hpa, ARCOFI_NREGS << 2, 0,
&sc->sc_ioh) != 0) {
printf(": can't map registers\n");
return;
}
/* XXX no generic IPL_SOFT level available */
sc->sc_sih = softintr_establish(IPL_SOFTTTY, &arcofi_swintr, sc);
if (sc->sc_sih == NULL) {
printf(": can't register soft interrupt\n");
return;
}
gsc_intr_establish((struct gsc_softc *)parent, ga->ga_irq,
IPL_AUDIO, arcofi_hwintr, sc, sc->sc_dev.dv_xname);
printf("\n");
arcofi_attach(sc, "gsc");
}

106
sys/arch/hppa/gsc/com_gsc.c
View File

@ -1,106 +0,0 @@
/* $OpenBSD: com_gsc.c,v 1.22 2022/03/13 08:04:38 mpi Exp $ */
/*
* Copyright (c) 1998-2003 Michael Shalayeff
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
* THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <sys/tty.h>
#include <machine/bus.h>
#include <machine/intr.h>
#include <machine/iomod.h>
#include <machine/autoconf.h>
#include <dev/ic/comreg.h>
#include <dev/ic/comvar.h>
#include <hppa/dev/cpudevs.h>
#include <hppa/gsc/gscbusvar.h>
#define COM_GSC_FREQ 7372800
struct com_gsc_regs {
u_int8_t reset;
};
int com_gsc_probe(struct device *, void *, void *);
void com_gsc_attach(struct device *, struct device *, void *);
const struct cfattach com_gsc_ca = {
sizeof(struct com_softc), com_gsc_probe, com_gsc_attach
};
int
com_gsc_probe(parent, match, aux)
struct device *parent;
void *match, *aux;
{
struct gsc_attach_args *ga = aux;
if (ga->ga_type.iodc_type != HPPA_TYPE_FIO ||
(ga->ga_type.iodc_sv_model != HPPA_FIO_GRS232 &&
ga->ga_type.iodc_sv_model != HPPA_FIO_RS232 &&
ga->ga_type.iodc_sv_model != HPPA_FIO_GRJ16))
return (0);
return (1);
/* HOZER comprobe1(ga->ga_iot, ga->ga_hpa + IOMOD_DEVOFFSET); */
}
void
com_gsc_attach(parent, self, aux)
struct device *parent, *self;
void *aux;
{
struct com_softc *sc = (void *)self;
struct gsc_attach_args *ga = aux;
sc->sc_iot = ga->ga_iot;
sc->sc_iobase = (bus_addr_t)ga->ga_hpa;
if (ga->ga_type.iodc_sv_model != HPPA_FIO_GRJ16)
sc->sc_iobase += IOMOD_DEVOFFSET;
if (bus_space_map(sc->sc_iot, sc->sc_iobase, COM_NPORTS,
0, &sc->sc_ioh)) {
printf(": cannot map io space\n");
return;
}
if (PAGE0->mem_cons.pz_class == PCL_DUPLEX &&
PAGE0->mem_cons.pz_hpa == ga->ga_hpa) {
bus_space_unmap(sc->sc_iot, sc->sc_ioh, COM_NPORTS);
comcnattach(sc->sc_iot, sc->sc_iobase, comdefaultrate,
COM_GSC_FREQ, comconscflag);
}
sc->sc_frequency = COM_GSC_FREQ;
com_attach_subr(sc);
sc->sc_ih = gsc_intr_establish((struct gsc_softc *)parent,
ga->ga_irq, IPL_TTY, comintr, sc, sc->sc_dev.dv_xname);
}

95
sys/arch/hppa/gsc/fdc_gsc.c
View File

@ -1,95 +0,0 @@
/* $OpenBSD: fdc_gsc.c,v 1.6 2022/03/13 08:04:38 mpi Exp $ */
/*
* Copyright (c) 1998 Michael Shalayeff
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
* THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <machine/iomod.h>
#include <machine/bus.h>
#include <machine/intr.h>
#include <machine/autoconf.h>
#include <dev/ic/fdreg.h>
#include <dev/ic/fdlink.h>
#include <hppa/dev/cpudevs.h>
/* controller driver configuration */
int fdc_gsc_probe(struct device *, void *, void *);
void fdc_gsc_attach(struct device *, struct device *, void *);
const struct cfattach fdc_gsc_ca = {
sizeof(struct fdc_softc), fdc_gsc_probe, fdc_gsc_attach
};
int
fdc_gsc_probe(parent, match, aux)
struct device *parent;
void *match, *aux;
{
struct confargs *ca = aux;
bus_space_handle_t ioh;
int rv;
if (ca->ca_type.iodc_type != HPPA_TYPE_FIO ||
ca->ca_type.iodc_sv_model != HPPA_FIO_GPCFD)
return 0;
/* Map the I/O space. */
if (bus_space_map(ca->ca_iot, ca->ca_hpa, IOMOD_HPASIZE, 0, &ioh))
return 0;
rv = fdcprobe1(ca->ca_iot, ioh | IOMOD_DEVOFFSET);
bus_space_unmap(ca->ca_iot, ioh, IOMOD_HPASIZE);
return rv;
}
void
fdc_gsc_attach(parent, self, aux)
struct device *parent, *self;
void *aux;
{
struct fdc_softc *sc = (void *)self;
bus_space_handle_t ioh;
struct confargs *ca = aux;
/* Re-map the I/O space. */
if (bus_space_map(ca->ca_iot, ca->ca_hpa, IOMOD_HPASIZE, 0, &ioh))
panic("fdcattach: couldn't map I/O ports");
ioh |= IOMOD_DEVOFFSET;
sc->sc_iot = ca->ca_iot;
sc->sc_ioh = ioh;
sc->sc_ioh_ctl = ioh + FDCTL_OFFSET;
fdc_attach_subr(sc);
}

159
sys/arch/hppa/gsc/gscbus.c
View File

@ -1,159 +0,0 @@
/* $OpenBSD: gscbus.c,v 1.31 2018/05/14 13:54:39 kettenis Exp $ */
/*
* Copyright (c) 1998 Michael Shalayeff
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
* THE POSSIBILITY OF SUCH DAMAGE.
*/
/* #define GSCDEBUG */
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <sys/malloc.h>
#include <sys/mbuf.h>
#include <sys/reboot.h>
#include <machine/iomod.h>
#include <machine/autoconf.h>
#include <machine/cpufunc.h>
#include <hppa/dev/viper.h>
#include <hppa/gsc/gscbusvar.h>
int gscmatch(struct device *, void *, void *);
void gscattach(struct device *, struct device *, void *);
const struct cfattach gsc_ca = {
sizeof(struct gsc_softc), gscmatch, gscattach
};
struct cfdriver gsc_cd = {
NULL, "gsc", DV_DULL
};
int
gscmatch(parent, cfdata, aux)
struct device *parent;
void *cfdata;
void *aux;
{
struct confargs *ca = aux;
return !strcmp(ca->ca_name, "gsc");
}
void
gscattach(parent, self, aux)
struct device *parent;
struct device *self;
void *aux;
{
struct gsc_softc *sc = (struct gsc_softc *)self;
struct gsc_attach_args *ga = aux;
int s, irqbit;
sc->sc_iot = ga->ga_iot;
sc->sc_ic = ga->ga_ic;
irqbit = cpu_intr_findirq();
if (irqbit >= 0)
printf(" irq %d", irqbit);
#ifdef USELEDS
if (machine_ledaddr)
printf(": %sleds", machine_ledword? "word" : "");
#endif
printf ("\n");
if (irqbit < 0)
sc->sc_ih = NULL;
else
sc->sc_ih = cpu_intr_establish(IPL_NESTED, irqbit,
gsc_intr, (void *)sc->sc_ic, sc->sc_dev.dv_xname);
if (sc->sc_ih == NULL) {
printf("%s: can't establish interrupt\n", sc->sc_dev.dv_xname);
return;
}
/*
* On ASP, the IAR register is not writable; we need to go through
* the memory controller to achieve proper routing.
*/
s = splhigh();
if (ga->ga_parent == gsc_asp)
viper_setintrwnd(1 << irqbit);
else
sc->sc_ic->iar = cpu_gethpa(0) | (31 - irqbit);
splx(s);
pdc_scanbus(self, &ga->ga_ca, MAXMODBUS, 0, 0);
}
int
gscprint(aux, pnp)
void *aux;
const char *pnp;
{
struct gsc_attach_args *ga = aux;
if (pnp)
printf("%s at %s", ga->ga_name, pnp);
return (UNCONF);
}
void *
gsc_intr_establish(sc, irq, pri, handler, arg, name)
struct gsc_softc *sc;
int pri;
int irq;
int (*handler)(void *v);
void *arg;
const char *name;
{
void *iv;
if ((iv = cpu_intr_map(sc->sc_ih, pri, irq, handler, arg, name)))
sc->sc_ic->imr |= (1 << irq);
else {
#ifdef GSCDEBUG
printf("%s: attaching irq %d, already occupied\n",
sc->sc_dev.dv_xname, irq);
#endif
}
return (iv);
}
void
gsc_intr_disestablish(sc, v)
struct gsc_softc *sc;
void *v;
{
#if notyet
sc->sc_ic->imr &= ~(1 << irq);
cpu_intr_unmap(sc->sc_ih, v);
#endif
}

69
sys/arch/hppa/gsc/gscbusvar.h
View File

@ -1,69 +0,0 @@
/* $OpenBSD: gscbusvar.h,v 1.15 2018/05/14 13:54:39 kettenis Exp $ */
/*
* Copyright (c) 1998-2004 Michael Shalayeff
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
* THE POSSIBILITY OF SUCH DAMAGE.
*/
/*
* Layout of the interrupt registers, part of the parent bus.
*/
struct gscbus_ic {
volatile u_int32_t irr; /* int request register */
volatile u_int32_t imr; /* int mask register */
volatile u_int32_t ipr; /* int pending register */
volatile u_int32_t icr; /* int control register */
volatile u_int32_t iar; /* int address register */
volatile u_int32_t rsvd[3];
};
struct gsc_attach_args {
struct confargs ga_ca;
#define ga_name ga_ca.ca_name
#define ga_iot ga_ca.ca_iot
#define ga_dp ga_ca.ca_dp
#define ga_type ga_ca.ca_type
#define ga_hpa ga_ca.ca_hpa
#define ga_hpamask ga_ca.ca_hpamask
#define ga_dmatag ga_ca.ca_dmatag
#define ga_irq ga_ca.ca_irq
#define ga_pdc_iodc_read ga_ca.ca_pdc_iodc_read
enum { gsc_unknown = 0, gsc_asp, gsc_lasi, gsc_wax } ga_parent;
struct gscbus_ic *ga_ic; /* IC pointer */
};
struct gsc_softc {
struct device sc_dev;
void *sc_ih;
bus_space_tag_t sc_iot;
struct gscbus_ic *sc_ic;
};
void *gsc_intr_establish(struct gsc_softc *sc, int irq, int pri,
int (*handler)(void *v), void *arg, const char *name);
void gsc_intr_disestablish(struct gsc_softc *sc, void *v);
int gsc_intr(void *);
int gscprint(void *, const char *);

1021
sys/arch/hppa/gsc/gsckbc.c
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64
sys/arch/hppa/gsc/gsckbcreg.h
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@ -1,64 +0,0 @@
/* $OpenBSD: gsckbcreg.h,v 1.1 2003/01/31 22:50:19 miod Exp $ */
/*
* Copyright (c) 2003, Miodrag Vallat.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF MIND,
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/*
* Register definitions for the GSC PS/2 compatible keyboard/mouse ports.
*
* These definitions attempt to match <dev/ic/i8042reg.h> names although the
* actual wiring is different.
*/
#define KBSTATP 12 /* controller status port (I) */
#define KBS_DIB 0x01 /* data in buffer */
#define KBS_OCMD 0x02 /* output buffer has command */
#define KBS_PERR 0x04 /* parity error */
#define KBS_TERR 0x08 /* transmission error */
#define KBCMDP 8 /* controller port (O) */
#define KBCP_ENABLE 0x01 /* enable device */
#define KBCP_DIAG 0x20 /* diagnostic mode control */
#define KBDATAP 4 /* data port (I) */
#define KBOUTP 4 /* data port (O) */
#define KBIDP 0 /* id port (I) */
#define ID_KBD 0 /* slot is a keyboard port */
#define ID_MOUSE 1 /* slot is a mouse port */
#define KBRESETP 0 /* reset port (O) */
#define KBMAPSIZE 16 /* size to bus_space_map() */
/*
* Various command definitions not provided by the existing pckbc code.
*/
#define KBC_ID 0xF2 /* get device identifier */
#define KBR_MOUSE_ID 0x00 /* mouse type */
#define KBR_KBD_ID1 0xAB /* keyboard type */
#define KBR_KBD_ID2 0x83
#define KB_MAX_RETRANS 5 /* maximum number of command retrans attempts */

1150
sys/arch/hppa/gsc/harmony.c
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152
sys/arch/hppa/gsc/harmonyreg.h
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@ -1,152 +0,0 @@
/* $OpenBSD: harmonyreg.h,v 1.5 2003/06/02 19:54:29 jason Exp $ */
/*
* Copyright (c) 2003 Jason L. Wright (jason@thought.net)
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* Harmony CS4215/AD1849 register definitions based on:
* "712 I/O Subsystem ERS", Revision 1.1, 12 February 1993
*/
/* harmony always uses a 4K buffer */
#define HARMONY_BUFSIZE 4096
#define HARMONY_NREGS 0x40
#define HARMONY_ID 0x00 /* identification */
#define HARMONY_RESET 0x04 /* reset */
#define HARMONY_CNTL 0x08 /* control */
#define HARMONY_GAINCTL 0x0c /* gain control */
#define HARMONY_PNXTADD 0x10 /* play next address */
#define HARMONY_PCURADD 0x14 /* play current address */
#define HARMONY_RNXTADD 0x18 /* record next address */
#define HARMONY_RCURADD 0x1c /* record current address */
#define HARMONY_DSTATUS 0x20 /* device status */
#define HARMONY_OV 0x24 /* overrange input */
#define HARMONY_PIO 0x28 /* general purpose i/o */
#define HARMONY_DIAG 0x3c /* chi diagnostic */
/* HARMONY_ID */
#define ID_REV_MASK 0x00ff0000 /* revision mask: */
#define ID_REV_SHIFT 16
#define ID_REV_TS 0x00150000 /* teleshare installed */
#define ID_REV_NOTS 0x00140000 /* teleshare not installed */
#define ID_CHIID 0x0000f000 /* CHI identification */
#define ID_CHIID_SHIFT 12
/* HARMONY_RESET */
#define RESET_RST 0x00000001 /* reset codec */
/* HARMONY_CNTL */
#define CNTL_C 0x80000000 /* control mode */
#define CNTL_CODEC_REV_MASK 0x0ff00000 /* codec revision */
#define CNTL_CODEC_REV_SHIFT 20
#define CNTL_EXP_3 0x00020000 /* expansion bit 3 */
#define CNTL_EXP_2 0x00010000 /* expansion bit 2 */
#define CNTL_EXP_1 0x00008000 /* expansion bit 1 */
#define CNTL_EXP_0 0x00004000 /* expansion bit 0 */
#define CNTL_AC 0x00002000 /* autocalibration ad1849 */
#define CNTL_AD 0x00001000 /* ad1849 compat? */
#define CNTL_OLB 0x00000800 /* output level */
#define CNTL_ITS 0x00000400 /* codec immediate tristate */
#define CNTL_LS_MASK 0x00000300 /* loopback select: */
#define CNTL_LS_NONE 0x00000000 /* none */
#define CNTL_LS_INTERNAL 0x00000100 /* internal */
#define CNTL_LS_DIGITAL 0x00000200 /* digital */
#define CNTL_LS_ANALOG 0x00000300 /* analog */
#define CNTL_FORMAT_MASK 0x000000c0 /* encoding format: */
#define CNTL_FORMAT_SLINEAR16BE 0x00000000 /* 16 bit signed linear be */
#define CNTL_FORMAT_ULAW 0x00000040 /* 8 bit ulaw */
#define CNTL_FORMAT_ALAW 0x00000080 /* 8 bit alaw */
#define CNTL_FORMAT_ULINEAR8 0x000000c0 /* 8 bit unsigned linear */
#define CNTL_CHANS_MASK 0x00000020 /* number of channels: */
#define CNTL_CHANS_MONO 0x00000000 /* mono */
#define CNTL_CHANS_STEREO 0x00000020 /* stereo */
#define CNTL_RATE_MASK 0x0000001f /* sample rate (kHz): */
#define CNTL_RATE_5125 0x00000010 /* 5.5125 */
#define CNTL_RATE_6615 0x00000017 /* 6.615 */
#define CNTL_RATE_8000 0x00000008 /* 8 */
#define CNTL_RATE_9600 0x0000000f /* 9.6 */
#define CNTL_RATE_11025 0x00000011 /* 11.025 */
#define CNTL_RATE_16000 0x00000009 /* 16 */
#define CNTL_RATE_18900 0x00000012 /* 18.9 */
#define CNTL_RATE_22050 0x00000013 /* 22.05 */
#define CNTL_RATE_27428 0x0000000a /* 27.42857 */
#define CNTL_RATE_32000 0x0000000b /* 32 */
#define CNTL_RATE_33075 0x00000016 /* 33.075 */
#define CNTL_RATE_37800 0x00000014 /* 37.8 */
#define CNTL_RATE_44100 0x00000015 /* 44.1 */
#define CNTL_RATE_48000 0x0000000e /* 48 */
/* HARMONY_GAINCTL */
#define GAINCTL_HE 0x08000000 /* headphones enable */
#define GAINCTL_LE 0x04000000 /* line output enable */
#define GAINCTL_SE 0x02000000 /* speaker enable */
#define GAINCTL_IS_MASK 0x01000000 /* input select: */
#define GAINCTL_IS_LINE 0x00000000 /* line input */
#define GAINCTL_IS_MICROPHONE 0x01000000 /* microphone */
#define GAINCTL_INPUT_LEFT_M 0x0000f000 /* left input gain */
#define GAINCTL_INPUT_LEFT_S 12
#define GAINCTL_INPUT_RIGHT_M 0x000f0000 /* left input gain */
#define GAINCTL_INPUT_RIGHT_S 16
#define GAINCTL_INPUT_BITS 4
#define GAINCTL_MONITOR_M 0x00f00000 /* monitor gain (inverted) */
#define GAINCTL_MONITOR_S 20
#define GAINCTL_MONITOR_BITS 4
#define GAINCTL_OUTPUT_LEFT_M 0x00000fc0 /* left out gain (inverted) */
#define GAINCTL_OUTPUT_LEFT_S 6
#define GAINCTL_OUTPUT_RIGHT_M 0x0000003f /* right out gain (inverted) */
#define GAINCTL_OUTPUT_RIGHT_S 0
#define GAINCTL_OUTPUT_BITS 6
/* HARMONY_PCURADD */
#define PCURADD_BUFMASK (~(HARMONY_BUFSIZE - 1))
/* HARMONY_RCURADD */
#define PCURADD_BUFMASK (~(HARMONY_BUFSIZE - 1))
/* HARMONY_DSTATUS */
#define DSTATUS_IE 0x80000000 /* interrupt enable */
#define DSTATUS_PN 0x00000200 /* playback next empty */
#define DSTATUS_PC 0x00000100 /* playback dma active */
#define DSTATUS_RN 0x00000002 /* record next empty */
#define DSTATUS_RC 0x00000001 /* record dma active */
/* HARMONY_OV */
#define OV_OV 0x00000001 /* input over range */
/* HARMONY_PIO */
#define PIO_PO 0x00000002 /* parallel output */
#define PIO_PI 0x00000001 /* parallel input */
/* HARMONY_DIAG */
#define DIAG_CO 0x00000001 /* sclk from codec */
/* CS4215_REV */
#define CS4215_REV_VER 0x0f
#define CS4215_REV_VER_C 0x00 /* CS4215 rev C */
#define CS4215_REV_VER_D 0x01 /* CS4215 rev D */
#define CS4215_REV_VER_E 0x02 /* CS4215 rev E/AD1849K */

114
sys/arch/hppa/gsc/harmonyvar.h
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@ -1,114 +0,0 @@
/* $OpenBSD: harmonyvar.h,v 1.9 2016/09/19 06:46:43 ratchov Exp $ */
/*
* Copyright (c) 2003 Jason L. Wright (jason@thought.net)
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#define HARMONY_PORT_INPUT_LVL 0
#define HARMONY_PORT_INPUT_OV 1
#define HARMONY_PORT_OUTPUT_LVL 2
#define HARMONY_PORT_OUTPUT_GAIN 3
#define HARMONY_PORT_MONITOR_LVL 4
#define HARMONY_PORT_RECORD_SOURCE 5
#define HARMONY_PORT_OUTPUT_SOURCE 6
#define HARMONY_PORT_INPUT_CLASS 7
#define HARMONY_PORT_OUTPUT_CLASS 8
#define HARMONY_PORT_MONITOR_CLASS 9
#define HARMONY_PORT_RECORD_CLASS 10
#define HARMONY_IN_MIC 0
#define HARMONY_IN_LINE 1
#define HARMONY_OUT_LINE 0
#define HARMONY_OUT_SPEAKER 1
#define HARMONY_OUT_HEADPHONE 2
#define PLAYBACK_EMPTYS 3 /* playback empty buffers */
#define CAPTURE_EMPTYS 3 /* capture empty buffers */
struct harmony_volume {
u_char left, right;
};
struct harmony_empty {
u_int8_t playback[PLAYBACK_EMPTYS][HARMONY_BUFSIZE];
u_int8_t capture[CAPTURE_EMPTYS][HARMONY_BUFSIZE];
};
struct harmony_dma {
struct harmony_dma *d_next;
bus_dmamap_t d_map;
bus_dma_segment_t d_seg;
caddr_t d_kva;
size_t d_size;
};
struct harmony_channel {
struct harmony_dma *c_current;
bus_size_t c_segsz;
bus_size_t c_cnt;
bus_size_t c_blksz;
bus_addr_t c_lastaddr;
void (*c_intr)(void *);
void *c_intrarg;
bus_addr_t c_theaddr;
};
struct harmony_softc {
struct device sc_dv;
bus_dma_tag_t sc_dmat;
bus_space_tag_t sc_bt;
bus_space_handle_t sc_bh;
int sc_open;
u_int32_t sc_cntlbits;
int sc_need_commit;
int sc_playback_empty;
bus_addr_t sc_playback_paddrs[PLAYBACK_EMPTYS];
int sc_capture_empty;
bus_addr_t sc_capture_paddrs[CAPTURE_EMPTYS];
bus_dmamap_t sc_empty_map;
bus_dma_segment_t sc_empty_seg;
int sc_empty_rseg;
struct harmony_empty *sc_empty_kva;
struct harmony_dma *sc_dmas;
int sc_playing, sc_capturing;
struct harmony_channel sc_playback, sc_capture;
struct harmony_volume sc_monitor_lvl, sc_input_lvl, sc_output_lvl;
int sc_in_port, sc_out_port, sc_hasulinear8;
int sc_micpreamp, sc_ov, sc_outputgain;
int sc_teleshare;
struct timeout sc_acc_tmo;
u_int32_t sc_acc, sc_acc_num, sc_acc_cnt;
};
#define READ_REG(sc, reg) \
bus_space_read_4((sc)->sc_bt, (sc)->sc_bh, (reg))
#define WRITE_REG(sc, reg, val) \
bus_space_write_4((sc)->sc_bt, (sc)->sc_bh, (reg), (val))
#define SYNC_REG(sc, reg, flags) \
bus_space_barrier((sc)->sc_bt, (sc)->sc_bh, (reg), sizeof(u_int32_t), \
(flags))

93
sys/arch/hppa/gsc/hil_gsc.c
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@ -1,93 +0,0 @@
/* $OpenBSD: hil_gsc.c,v 1.6 2022/03/13 08:04:38 mpi Exp $ */
/*
* Copyright (c) 2003, Miodrag Vallat.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <machine/cpu.h>
#include <machine/intr.h>
#include <machine/iomod.h>
#include <machine/autoconf.h>
#include <machine/bus.h>
#include <hppa/dev/cpudevs.h>
#include <hppa/gsc/gscbusvar.h>
#include <machine/hil_machdep.h>
#include <dev/hil/hilvar.h>
int hil_gsc_match(struct device *, void *, void *);
void hil_gsc_attach(struct device *, struct device *, void *);
struct hil_gsc_softc {
struct hil_softc sc_hs;
int sc_hil_console;
};
const struct cfattach hil_gsc_ca = {
sizeof(struct hil_gsc_softc), hil_gsc_match, hil_gsc_attach
};
int
hil_gsc_match(struct device *parent, void *match, void *aux)
{
struct gsc_attach_args *ga = aux;
if (ga->ga_type.iodc_type != HPPA_TYPE_FIO ||
ga->ga_type.iodc_sv_model != HPPA_FIO_HIL)
return (0);
return (1);
}
void
hil_gsc_attach(struct device *parent, struct device *self, void *aux)
{
struct hil_gsc_softc *gsc = (void *)self;
struct hil_softc *sc = &gsc->sc_hs;
struct gsc_attach_args *ga = aux;
sc->sc_bst = ga->ga_iot;
if (bus_space_map(ga->ga_iot, ga->ga_hpa,
HILMAPSIZE, 0, &sc->sc_bsh)) {
printf(": couldn't map hil controller\n");
return;
}
gsc->sc_hil_console = ga->ga_dp.dp_mod == PAGE0->mem_kbd.pz_dp.dp_mod &&
bcmp(ga->ga_dp.dp_bc, PAGE0->mem_kbd.pz_dp.dp_bc, 6) == 0;
hil_attach(sc, &gsc->sc_hil_console);
gsc_intr_establish((struct gsc_softc *)parent, ga->ga_irq, IPL_TTY,
hil_intr, sc, sc->sc_dev.dv_xname);
startuphook_establish(hil_attach_deferred, sc);
}

396
sys/arch/hppa/gsc/if_ie_gsc.c
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@ -1,396 +0,0 @@
/* $OpenBSD: if_ie_gsc.c,v 1.30 2022/03/13 08:04:38 mpi Exp $ */
/*
* Copyright (c) 1998-2004 Michael Shalayeff
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
* THE POSSIBILITY OF SUCH DAMAGE.
*/
/*
* References:
* 1. 82596DX and 82596SX High-Performance 32-bit Local Area Network Coprocessor
* Intel Corporation, November 1996, Order Number: 290219-006
*
* 2. 712 I/O Subsystem ERS Rev 1.0
* Hewlett-Packard, June 17 1992, Dwg No. A-A2263-66510-31
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <sys/socket.h>
#include <sys/sockio.h>
#include <net/if.h>
#include <net/if_media.h>
#include <netinet/in.h>
#include <netinet/if_ether.h>
#include <machine/bus.h>
#include <machine/intr.h>
#include <machine/iomod.h>
#include <machine/autoconf.h>
#include <hppa/dev/cpudevs.h>
#include <hppa/gsc/gscbusvar.h>
#include <dev/ic/i82596reg.h>
#include <dev/ic/i82596var.h>
#define IEGSC_GECKO IEMD_FLAG0
struct ie_gsc_regs {
u_int32_t ie_reset;
u_int32_t ie_port;
u_int32_t ie_attn;
};
#define IE_SIZE 0x8000
int ie_gsc_probe(struct device *, void *, void *);
void ie_gsc_attach(struct device *, struct device *, void *);
const struct cfattach ie_gsc_ca = {
sizeof(struct ie_softc), ie_gsc_probe, ie_gsc_attach
};
static uint64_t ie_gsc_media[] = {
IFM_ETHER | IFM_10_2,
};
#define IE_NMEDIA (sizeof(ie_gsc_media) / sizeof(ie_gsc_media[0]))
char *ie_mem;
void ie_gsc_reset(struct ie_softc *sc, int what);
void ie_gsc_attend(struct ie_softc *sc);
void ie_gsc_run(struct ie_softc *sc);
void ie_gsc_port(struct ie_softc *sc, u_int);
#ifdef USELEDS
int ie_gsc_intrhook(struct ie_softc *sc, int what);
#endif
u_int16_t ie_gsc_read16(struct ie_softc *sc, int offset);
void ie_gsc_write16(struct ie_softc *sc, int offset, u_int16_t v);
void ie_gsc_write24(struct ie_softc *sc, int offset, int addr);
void ie_gsc_memcopyin(struct ie_softc *sc, void *p, int offset, size_t);
void ie_gsc_memcopyout(struct ie_softc *sc, const void *p, int, size_t);
void
ie_gsc_reset(sc, what)
struct ie_softc *sc;
int what;
{
volatile struct ie_gsc_regs *r = (struct ie_gsc_regs *)sc->ioh;
int i;
r->ie_reset = 0;
/*
* per [2] 4.6.2.1
* delay for 10 system clocks + 5 transmit clocks,
* NB: works for system clocks over 10MHz
*/
DELAY(1000);
switch (what) {
case IE_CHIP_PROBE:
break;
case IE_CARD_RESET:
/*
* after the hardware reset:
* inform i825[89]6 about new SCP address,
* maddr must be at least 16-byte aligned
*/
ie_gsc_port(sc, IE_PORT_SCP);
ie_gsc_attend(sc);
for (i = 9000; i-- && ie_gsc_read16(sc, IE_ISCP_BUSY(sc->iscp));
DELAY(100))
pdcache(0, sc->sc_maddr + sc->iscp, IE_ISCP_SZ);
#ifdef I82596_DEBUG
if (i < 0) {
printf("timeout for PORT command (%x)%s\n",
ie_gsc_read16(sc, IE_ISCP_BUSY(sc->iscp)),
(sc->sc_flags & IEGSC_GECKO)? " on gecko":"");
return;
}
#endif
break;
}
}
void
ie_gsc_attend(sc)
struct ie_softc *sc;
{
volatile struct ie_gsc_regs *r = (struct ie_gsc_regs *)sc->ioh;
fdcache(0, (vaddr_t)ie_mem, IE_SIZE);
DELAY(1);
r->ie_attn = 0;
DELAY(1);
}
void
ie_gsc_run(sc)
struct ie_softc *sc;
{
}
void
ie_gsc_port(sc, cmd)
struct ie_softc *sc;
u_int cmd;
{
switch (cmd) {
case IE_PORT_RESET:
cmd = 0;
break;
case IE_PORT_TEST:
cmd = ((u_int)sc->sc_maddr + sc->scp) | 1;
break;
case IE_PORT_SCP:
cmd = ((u_int)sc->sc_maddr + sc->scp) | 2;
break;
case IE_PORT_DUMP:
cmd = 3;
break;
}
if (sc->sc_flags & IEGSC_GECKO) {
volatile struct ie_gsc_regs *r = (struct ie_gsc_regs *)sc->ioh;
r->ie_port = cmd & 0xffff;
DELAY(1000);
r->ie_port = cmd >> 16;
DELAY(1000);
} else {
volatile struct ie_gsc_regs *r = (struct ie_gsc_regs *)sc->ioh;
r->ie_port = cmd >> 16;
DELAY(1000);
r->ie_port = cmd & 0xffff;
DELAY(1000);
}
}
#ifdef USELEDS
int
ie_gsc_intrhook(sc, where)
struct ie_softc *sc;
int where;
{
switch (where) {
case IE_INTR_ENRCV:
ledctl(PALED_NETRCV, 0, 0);
break;
case IE_INTR_ENSND:
ledctl(PALED_NETSND, 0, 0);
break;
case IE_INTR_EXIT:
case IE_INTR_LOOP:
fdcache(0, (vaddr_t)ie_mem, IE_SIZE);
break;
}
return 0;
}
#endif
u_int16_t
ie_gsc_read16(sc, offset)
struct ie_softc *sc;
int offset;
{
volatile u_int16_t *addr = (volatile u_int16_t *)(sc->bh + offset);
asm volatile ("fdc %%r0(%%sr0, %0)" :: "r" (addr));
return *addr;
}
void
ie_gsc_write16(sc, offset, v)
struct ie_softc *sc;
int offset;
u_int16_t v;
{
volatile u_int16_t *addr = (volatile u_int16_t *)(sc->bh + offset);
*addr = v;
asm volatile ("fdc %%r0(%%sr0, %0)" :: "r" (addr));
}
void
ie_gsc_write24(sc, offset, v)
struct ie_softc *sc;
int offset;
int v;
{
volatile u_int16_t *addr = (volatile u_int16_t *)(sc->bh + offset);
addr[0] = (v ) & 0xffff;
addr[1] = (v >> 16) & 0xffff;
asm volatile ("fdc %%r0(%%sr0, %0)" :: "r" (addr+0));
asm volatile ("fdc %%r0(%%sr0, %0)" :: "r" (addr+1));
}
void
ie_gsc_memcopyin(sc, p, offset, size)
struct ie_softc *sc;
void *p;
int offset;
size_t size;
{
pdcache(0, sc->bh + offset, size);
bcopy ((void *)((u_long)sc->bh + offset), p, size);
}
void
ie_gsc_memcopyout(sc, p, offset, size)
struct ie_softc *sc;
const void *p;
int offset;
size_t size;
{
bcopy (p, (void *)((u_long)sc->bh + offset), size);
fdcache(0, sc->bh + offset, size);
}
int
ie_gsc_probe(parent, match, aux)
struct device *parent;
void *match, *aux;
{
struct gsc_attach_args *ga = aux;
if (ga->ga_type.iodc_type != HPPA_TYPE_FIO ||
(ga->ga_type.iodc_sv_model != HPPA_FIO_LAN &&
ga->ga_type.iodc_sv_model != HPPA_FIO_GLAN))
return 0;
return 1;
}
void
ie_gsc_attach(parent, self, aux)
struct device *parent, *self;
void *aux;
{
struct pdc_lan_station_id pdc_mac PDC_ALIGNMENT;
struct ie_softc *sc = (struct ie_softc *)self;
struct gsc_attach_args *ga = aux;
/*bus_dma_segment_t seg;
int rseg;*/
int rv;
#ifdef PMAPDEBUG
extern int pmapdebug;
int opmapdebug = pmapdebug;
pmapdebug = 0;
#endif
sc->iot = sc->bt = ga->ga_iot;
if (bus_space_map(sc->iot, ga->ga_hpa, IOMOD_HPASIZE, 0, &sc->ioh)) {
printf(": can't map IO space\n");
return;
}
if (ga->ga_type.iodc_sv_model == HPPA_FIO_GLAN)
sc->sc_flags |= IEGSC_GECKO;
sc->sc_msize = IE_SIZE;
/* XXX memory must be under 16M until the mi part is fixed */
#if 0
if (bus_dmamem_alloc(ga->ga_dmatag, sc->sc_msize, NBPG, 0,
&seg, 1, &rseg, BUS_DMA_NOWAIT)) {
printf (": cannot allocate %d bytes of DMA memory\n",
sc->sc_msize);
return;
}
if (bus_dmamem_map(ga->ga_dmatag, &seg, rseg, sc->sc_msize,
(caddr_t *)&sc->bh, BUS_DMA_NOWAIT)) {
printf (": cannot map DMA memory\n");
bus_dmamem_free(ga->ga_dmatag, &seg, rseg);
return;
}
bzero((void *)sc->bh, sc->sc_msize);
sc->sc_maddr = kvtop((caddr_t)sc->bh);
#else
sc->bh = (u_int)ie_mem;
sc->sc_maddr = sc->bh;
#endif
sc->sysbus = 0x40 | IE_SYSBUS_82586 | IE_SYSBUS_INTLOW | IE_SYSBUS_TRG | IE_SYSBUS_BE;
sc->do_xmitnopchain = 0;
sc->hwreset = ie_gsc_reset;
sc->chan_attn = ie_gsc_attend;
sc->port = ie_gsc_port;
sc->hwinit = ie_gsc_run;
sc->memcopyout = ie_gsc_memcopyout;
sc->memcopyin = ie_gsc_memcopyin;
sc->ie_bus_read16 = ie_gsc_read16;
sc->ie_bus_write16 = ie_gsc_write16;
sc->ie_bus_write24 = ie_gsc_write24;
#ifdef USELEDS
sc->intrhook = ie_gsc_intrhook;
#else
sc->intrhook = NULL;
#endif
#ifdef I82596_DEBUG
printf(" mem %x[%p]/%x", sc->bh, sc->sc_maddr, sc->sc_msize);
sc->sc_debug = IED_ALL;
#endif
rv = i82596_probe(sc);
if (!rv) {
/*bus_dmamem_free(ga->ga_dmatag, &seg, sc->sc_msize);*/
}
#ifdef PMAPDEBUG
pmapdebug = opmapdebug;
#endif
if (!rv) {
printf("\n");
return;
}
if (pdc_call((iodcio_t)pdc, 0, PDC_LAN_STATION_ID,
PDC_LAN_STATION_ID_READ, &pdc_mac, ga->ga_hpa) < 0)
bcopy((void *)ASP_PROM, sc->sc_arpcom.ac_enaddr,
ETHER_ADDR_LEN);
else
bcopy(pdc_mac.addr, sc->sc_arpcom.ac_enaddr, ETHER_ADDR_LEN);
printf(":");
sc->iscp = 0;
sc->scp = 32;
sc->scb = 94;
sc->buf_area = 256;
sc->buf_area_sz = sc->sc_msize - sc->buf_area;
sc->sc_type = sc->sc_flags & IEGSC_GECKO? "LASI/i82596CA" : "i82596DX";
sc->sc_vers = ga->ga_type.iodc_model * 10 + ga->ga_type.iodc_sv_rev;
i82596_attach(sc, sc->sc_type, (char *)sc->sc_arpcom.ac_enaddr,
ie_gsc_media, IE_NMEDIA, ie_gsc_media[0]);
sc->sc_ih = gsc_intr_establish((struct gsc_softc *)parent,
ga->ga_irq, IPL_NET, i82596_intr, sc, sc->sc_dev.dv_xname);
}

187
sys/arch/hppa/gsc/lpt_gsc.c
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@ -1,187 +0,0 @@
/* $OpenBSD: lpt_gsc.c,v 1.13 2022/03/13 08:04:38 mpi Exp $ */
/*
* Copyright (c) 1998 Michael Shalayeff
* Copyright (c) 1993, 1994 Charles Hannum.
* Copyright (c) 1990 William F. Jolitz, TeleMuse
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This software is a component of "386BSD" developed by
* William F. Jolitz, TeleMuse.
* 4. Neither the name of the developer nor the name "386BSD"
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS A COMPONENT OF 386BSD DEVELOPED BY WILLIAM F. JOLITZ
* AND IS INTENDED FOR RESEARCH AND EDUCATIONAL PURPOSES ONLY. THIS
* SOFTWARE SHOULD NOT BE CONSIDERED TO BE A COMMERCIAL PRODUCT.
* THE DEVELOPER URGES THAT USERS WHO REQUIRE A COMMERCIAL PRODUCT
* NOT MAKE USE OF THIS WORK.
*
* FOR USERS WHO WISH TO UNDERSTAND THE 386BSD SYSTEM DEVELOPED
* BY WILLIAM F. JOLITZ, WE RECOMMEND THE USER STUDY WRITTEN
* REFERENCES SUCH AS THE "PORTING UNIX TO THE 386" SERIES
* (BEGINNING JANUARY 1991 "DR. DOBBS JOURNAL", USA AND BEGINNING
* JUNE 1991 "UNIX MAGAZIN", GERMANY) BY WILLIAM F. JOLITZ AND
* LYNNE GREER JOLITZ, AS WELL AS OTHER BOOKS ON UNIX AND THE
* ON-LINE 386BSD USER MANUAL BEFORE USE. A BOOK DISCUSSING THE INTERNALS
* OF 386BSD ENTITLED "386BSD FROM THE INSIDE OUT" WILL BE AVAILABLE LATE 1992.
*
* THIS SOFTWARE IS PROVIDED BY THE DEVELOPER ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE DEVELOPER BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <machine/bus.h>
#include <machine/intr.h>
#include <machine/iomod.h>
#include <machine/autoconf.h>
#include <dev/ic/lptreg.h>
#include <dev/ic/lptvar.h>
#include <hppa/dev/cpudevs.h>
#include <hppa/gsc/gscbusvar.h>
#define LPTGSC_OFFSET 0x800
int lpt_gsc_probe(struct device *, void *, void *);
void lpt_gsc_attach(struct device *, struct device *, void *);
const struct cfattach lpt_gsc_ca = {
sizeof(struct lpt_softc), lpt_gsc_probe, lpt_gsc_attach
};
/*
* Logic:
* 1) You should be able to write to and read back the same value
* to the data port. Do an alternating zeros, alternating ones,
* walking zero, and walking one test to check for stuck bits.
*
* 2) You should be able to write to and read back the same value
* to the control port lower 5 bits, the upper 3 bits are reserved
* per the IBM PC technical reference manuals and different boards
* do different things with them. Do an alternating zeros, alternating
* ones, walking zero, and walking one test to check for stuck bits.
*
* Some printers drag the strobe line down when the are powered off
* so this bit has been masked out of the control port test.
*
* XXX Some printers may not like a fast pulse on init or strobe, I
* don't know at this point, if that becomes a problem these bits
* should be turned off in the mask byte for the control port test.
*
* 3) Set the data and control ports to a value of 0
*/
int
lpt_gsc_probe(parent, match, aux)
struct device *parent;
void *match, *aux;
{
struct gsc_attach_args *ga = aux;
bus_space_handle_t ioh;
bus_addr_t base;
u_int8_t mask, data;
int i, rv;
if (ga->ga_type.iodc_type != HPPA_TYPE_FIO ||
ga->ga_type.iodc_sv_model != HPPA_FIO_CENT)
return 0;
#ifdef DEBUG
#define ABORT \
do { \
printf("lpt_gsc_probe: mask %x data %x failed\n", mask, \
data); \
return 0; \
} while (0)
#else
#define ABORT do { \
bus_space_unmap(ga->ga_iot, ioh, LPT_NPORTS); \
return 0; \
} while (0)
#endif
base = ga->ga_hpa + LPTGSC_OFFSET;
if (bus_space_map(ga->ga_iot, base, LPT_NPORTS, 0, &ioh)) {
printf("lpt_gsc_probe: cannot map io space\n");
return 0;
}
rv = 0;
mask = 0xff;
data = 0x55; /* Alternating zeros */
if (!lpt_port_test(ga->ga_iot, ioh, base, lpt_data, data, mask))
ABORT;
data = 0xaa; /* Alternating ones */
if (!lpt_port_test(ga->ga_iot, ioh, base, lpt_data, data, mask))
ABORT;
for (i = 0; i < CHAR_BIT; i++) { /* Walking zero */
data = ~(1 << i);
if (!lpt_port_test(ga->ga_iot, ioh, base, lpt_data, data, mask))
ABORT;
}
for (i = 0; i < CHAR_BIT; i++) { /* Walking one */
data = (1 << i);
if (!lpt_port_test(ga->ga_iot, ioh, base, lpt_data, data, mask))
ABORT;
}
bus_space_write_1(ga->ga_iot, ioh, lpt_data, 0);
bus_space_write_1(ga->ga_iot, ioh, lpt_control, 0);
bus_space_unmap(ga->ga_iot, ioh, LPT_NPORTS);
return 1;
}
void
lpt_gsc_attach(parent, self, aux)
struct device *parent, *self;
void *aux;
{
struct lpt_softc *sc = (void *)self;
struct gsc_attach_args *ga = aux;
bus_addr_t base;
/* sc->sc_flags |= LPT_POLLED; */
sc->sc_state = 0;
sc->sc_iot = ga->ga_iot;
base = ga->ga_hpa + LPTGSC_OFFSET;
if (bus_space_map(ga->ga_iot, base, LPT_NPORTS, 0, &sc->sc_ioh)) {
printf(": cannot map io space\n");
return;
}
lpt_attach_common(sc);
sc->sc_ih = gsc_intr_establish((struct gsc_softc *)parent,
ga->ga_irq, IPL_TTY, lptintr, sc, sc->sc_dev.dv_xname);
}

95
sys/arch/hppa/gsc/mongoose_gsc.c
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@ -1,95 +0,0 @@
/* $OpenBSD: mongoose_gsc.c,v 1.2 2022/03/13 08:04:38 mpi Exp $ */
/*
* Copyright (c) 2004, Miodrag Vallat.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <machine/bus.h>
#include <machine/autoconf.h>
#include <hppa/dev/cpudevs.h>
#include <dev/eisa/eisavar.h>
#include <dev/isa/isavar.h>
#include <hppa/dev/mongoosereg.h>
#include <hppa/dev/mongoosevar.h>
#include <hppa/gsc/gscbusvar.h>
void mgattach_gsc(struct device *, struct device *, void *);
int mgmatch_gsc(struct device *, void *, void *);
const struct cfattach mg_gsc_ca = {
sizeof(struct mongoose_softc), mgmatch_gsc, mgattach_gsc
};
int
mgmatch_gsc(struct device *parent, void *cfdata, void *aux)
{
struct gsc_attach_args *ga = aux;
if (ga->ga_type.iodc_type != HPPA_TYPE_BHA ||
ga->ga_type.iodc_sv_model != HPPA_BHA_WEISA)
return (0);
return (1);
}
void
mgattach_gsc(struct device *parent, struct device *self, void *aux)
{
struct mongoose_softc *sc = (struct mongoose_softc *)self;
struct gsc_attach_args *ga = aux;
bus_space_handle_t ioh;
sc->sc_bt = ga->ga_iot;
sc->sc_iomap = ga->ga_hpa;
if (bus_space_map(ga->ga_iot, ga->ga_hpa + MONGOOSE_MONGOOSE,
sizeof(struct mongoose_regs), 0, &ioh) != 0) {
printf(": can't map IO space\n");
return;
}
sc->sc_regs = (struct mongoose_regs *)ioh;
if (bus_space_map(ga->ga_iot, ga->ga_hpa + MONGOOSE_CTRL,
sizeof(struct mongoose_ctrl), 0, &ioh) != 0) {
printf(": can't map control registers\n");
bus_space_unmap(ga->ga_iot, (bus_space_handle_t)sc->sc_regs,
sizeof(struct mongoose_regs));
return;
}
sc->sc_ctrl = (struct mongoose_ctrl *)ioh;
if (mgattach_common(sc) != 0)
return;
sc->sc_ih = gsc_intr_establish((struct gsc_softc *)parent,
ga->ga_irq, IPL_HIGH, mg_intr, sc, sc->sc_dev.dv_xname);
}

172
sys/arch/hppa/gsc/oosiop_gsc.c
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@ -1,172 +0,0 @@
/* $OpenBSD: oosiop_gsc.c,v 1.4 2022/03/13 08:04:38 mpi Exp $ */
/* $NetBSD: oosiop_gsc.c,v 1.2 2003/07/15 02:29:25 lukem Exp $ */
/*
* Copyright (c) 2001 Matt Fredette. All rights reserved.
* Copyright (c) 2001,2002 Izumi Tsutsui. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/*
* Copyright (c) 1998 Michael Shalayeff
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <sys/buf.h>
#include <sys/malloc.h>
#include <scsi/scsi_all.h>
#include <scsi/scsiconf.h>
#include <machine/cpu.h>
#include <machine/intr.h>
#include <machine/iomod.h>
#include <machine/autoconf.h>
#include <machine/bus.h>
#include <dev/ic/oosiopreg.h>
#include <dev/ic/oosiopvar.h>
#include <hppa/dev/cpudevs.h>
#include <hppa/gsc/gscbusvar.h>
#define OOSIOP_GSC_RESET 0x0000
#define OOSIOP_GSC_OFFSET 0x0100
int oosiop_gsc_match(struct device *, void *, void *);
void oosiop_gsc_attach(struct device *, struct device *, void *);
int oosiop_gsc_intr(void *);
const struct cfattach oosiop_gsc_ca = {
sizeof(struct oosiop_softc), oosiop_gsc_match, oosiop_gsc_attach
};
int
oosiop_gsc_match(parent, match, aux)
struct device *parent;
void *match, *aux;
{
struct gsc_attach_args *ga = aux;
if (ga->ga_type.iodc_type != HPPA_TYPE_FIO ||
ga->ga_type.iodc_sv_model != HPPA_FIO_SCSI)
return 0;
return 1;
}
void
oosiop_gsc_attach(parent, self, aux)
struct device *parent, *self;
void *aux;
{
struct oosiop_softc *sc = (void *)self;
struct gsc_attach_args *ga = aux;
bus_space_handle_t ioh;
sc->sc_bst = ga->ga_iot;
sc->sc_dmat = ga->ga_dmatag;
if (bus_space_map(sc->sc_bst, ga->ga_hpa,
OOSIOP_GSC_OFFSET + OOSIOP_NREGS, 0, &ioh))
panic("oosiop_gsc_attach: couldn't map I/O ports");
if (bus_space_subregion(sc->sc_bst, ioh,
OOSIOP_GSC_OFFSET, OOSIOP_NREGS, &sc->sc_bsh))
panic("oosiop_gsc_attach: couldn't get chip ports");
sc->sc_freq = ga->ga_ca.ca_pdc_iodc_read->filler2[14];
if (!sc->sc_freq)
sc->sc_freq = 50 * 1000000;
sc->sc_chip = OOSIOP_700;
sc->sc_id = 7; /* XXX */
/* default values */
sc->sc_scntl0 = OOSIOP_SCNTL0_EPG;
sc->sc_dmode = OOSIOP_DMODE_BL_8;
sc->sc_dwt = 0xff; /* Enable DMA timeout */
sc->sc_ctest7 = 0;
/*
* Reset the SCSI subsystem.
*/
bus_space_write_1(sc->sc_bst, ioh, OOSIOP_GSC_RESET, 0);
DELAY(1000);
/*
* Call common attachment
*/
#ifdef OOSIOP_DEBUG
{
extern int oosiop_debug;
oosiop_debug = -1;
}
#endif /* OOSIOP_DEBUG */
oosiop_attach(sc);
(void)gsc_intr_establish((struct gsc_softc *)parent,
ga->ga_irq, IPL_BIO, oosiop_gsc_intr, sc, sc->sc_dev.dv_xname);
}
/*
* interrupt handler
*/
int
oosiop_gsc_intr(arg)
void *arg;
{
struct oosiop_softc *sc = arg;
int rv;
rv = oosiop_intr(sc);
#ifdef USELEDS
ledctl(PALED_DISK, 0, 0);
#endif
return (rv);
}

193
sys/arch/hppa/gsc/osiop_gsc.c
View File

@ -1,193 +0,0 @@
/* $OpenBSD: osiop_gsc.c,v 1.13 2022/03/13 08:04:38 mpi Exp $ */
/* $NetBSD: osiop_gsc.c,v 1.6 2002/10/02 05:17:50 thorpej Exp $ */
/*
* Copyright (c) 2001 Matt Fredette. All rights reserved.
* Copyright (c) 2001 Izumi Tsutsui. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/*
* Copyright (c) 1998 Michael Shalayeff
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <sys/buf.h>
#include <sys/malloc.h>
#include <scsi/scsi_all.h>
#include <scsi/scsiconf.h>
#include <machine/cpu.h>
#include <machine/intr.h>
#include <machine/iomod.h>
#include <machine/autoconf.h>
#include <machine/bus.h>
#include <dev/ic/osiopreg.h>
#include <dev/ic/osiopvar.h>
#include <hppa/dev/cpudevs.h>
#include <hppa/gsc/gscbusvar.h>
/* #include <hppa/hppa/machdep.h> */
#define OSIOP_GSC_RESET 0x0000
#define OSIOP_GSC_OFFSET 0x0100
int osiop_gsc_match(struct device *, void *, void *);
void osiop_gsc_attach(struct device *, struct device *, void *);
int osiop_gsc_intr(void *);
const struct cfattach osiop_gsc_ca = {
sizeof(struct osiop_softc), osiop_gsc_match, osiop_gsc_attach
};
int
osiop_gsc_match(parent, match, aux)
struct device *parent;
void *match, *aux;
{
struct gsc_attach_args *ga = aux;
if (ga->ga_type.iodc_type != HPPA_TYPE_FIO ||
ga->ga_type.iodc_sv_model != HPPA_FIO_GSCSI)
return 0;
return 1;
}
void
osiop_gsc_attach(parent, self, aux)
struct device *parent, *self;
void *aux;
{
struct osiop_softc *sc = (void *)self;
struct gsc_attach_args *ga = aux;
bus_space_handle_t ioh;
sc->sc_bst = ga->ga_iot;
sc->sc_dmat = ga->ga_dmatag;
if (bus_space_map(sc->sc_bst, ga->ga_hpa,
OSIOP_GSC_OFFSET + OSIOP_NREGS, 0, &ioh))
panic("osiop_gsc_attach: couldn't map I/O ports");
if (bus_space_subregion(sc->sc_bst, ioh,
OSIOP_GSC_OFFSET, OSIOP_NREGS, &sc->sc_reg))
panic("osiop_gsc_attach: couldn't get chip ports");
sc->sc_clock_freq = ga->ga_ca.ca_pdc_iodc_read->filler2[14] / 1000000;
if (!sc->sc_clock_freq)
sc->sc_clock_freq = 50;
sc->sc_dcntl = OSIOP_DCNTL_EA;
/* XXX set burst mode to 8 words (32 bytes) */
sc->sc_ctest7 = OSIOP_CTEST7_CDIS;
sc->sc_dmode = OSIOP_DMODE_BL8; /* | OSIOP_DMODE_FC2 */
sc->sc_flags = 0;
sc->sc_id = 7; /* XXX */
/*
* Reset the SCSI subsystem.
*/
bus_space_write_1(sc->sc_bst, ioh, OSIOP_GSC_RESET, 0);
DELAY(1000);
/*
* Call common attachment
*/
#ifdef OSIOP_DEBUG
{
extern int osiop_debug;
osiop_debug = -1;
}
#endif /* OSIOP_DEBUG */
osiop_attach(sc);
(void)gsc_intr_establish((struct gsc_softc *)parent,
ga->ga_irq, IPL_BIO, osiop_gsc_intr, sc, sc->sc_dev.dv_xname);
}
/*
* interrupt handler
*/
int
osiop_gsc_intr(arg)
void *arg;
{
struct osiop_softc *sc = arg;
u_int8_t istat;
/* This is potentially nasty, since the IRQ is level triggered... */
if (sc->sc_flags & OSIOP_INTSOFF)
return (0);
istat = osiop_read_1(sc, OSIOP_ISTAT);
if ((istat & (OSIOP_ISTAT_SIP | OSIOP_ISTAT_DIP)) == 0)
return (0);
/* Save interrupt details for the back-end interrupt handler */
sc->sc_sstat0 = osiop_read_1(sc, OSIOP_SSTAT0);
sc->sc_istat = istat;
/*
* Per page 4-18 of the LSI 53C710 Technical Manual,
* "insert a delay equivalent to 12 BCLK periods between
* the reads [of DSTAT and SSTAT0] to ensure that the
* interrupts clear properly." 1 BCLK = 40ns. Pg. 6-10.
*/
DELAY(25);
sc->sc_dstat = osiop_read_1(sc, OSIOP_DSTAT);
/* Deal with the interrupt */
osiop_intr(sc);
#ifdef USELEDS
ledctl(PALED_DISK, 0, 0);
#endif
return (1);
}

162
sys/arch/hppa/gsc/siop_gsc.c
View File

@ -1,162 +0,0 @@
/* $OpenBSD: siop_gsc.c,v 1.5 2022/03/13 08:04:38 mpi Exp $ */
/*
* Copyright (c) 2007 Mark Kettenis
*
* Permission to use, copy, modify, and distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include <sys/param.h>
#include <sys/device.h>
#include <sys/systm.h>
#include <machine/autoconf.h>
#include <machine/bus.h>
#include <machine/iomod.h>
#include <scsi/scsi_all.h>
#include <scsi/scsiconf.h>
#include <dev/ic/siopreg.h>
#include <dev/ic/siopvar_common.h>
#include <dev/ic/siopvar.h>
#include <hppa/dev/cpudevs.h>
#include <hppa/gsc/gscbusvar.h>
#define SIOP_GSC_RESET 0x0000
#define SIOP_GSC_OFFSET 0x0100
int siop_gsc_match(struct device *, void *, void *);
void siop_gsc_attach(struct device *, struct device *, void *);
int siop_gsc_intr(void *);
void siop_gsc_reset(struct siop_common_softc *);
u_int8_t siop_gsc_r1(void *, bus_space_handle_t, bus_size_t);
u_int16_t siop_gsc_r2(void *, bus_space_handle_t, bus_size_t);
void siop_gsc_w1(void *, bus_space_handle_t, bus_size_t, u_int8_t);
void siop_gsc_w2(void *, bus_space_handle_t, bus_size_t, u_int16_t);
struct siop_gsc_softc {
struct siop_softc sc_siop;
bus_space_tag_t sc_iot;
bus_space_handle_t sc_ioh;
struct hppa_bus_space_tag sc_bustag;
};
const struct cfattach siop_gsc_ca = {
sizeof(struct siop_gsc_softc), siop_gsc_match, siop_gsc_attach
};
int
siop_gsc_match(struct device *parent, void *match, void *aux)
{
struct gsc_attach_args *ga = aux;
if (ga->ga_type.iodc_type != HPPA_TYPE_FIO ||
ga->ga_type.iodc_sv_model != HPPA_FIO_FWSCSI)
return 0;
return 1;
}
void
siop_gsc_attach(struct device *parent, struct device *self, void *aux)
{
struct siop_gsc_softc *sc = (struct siop_gsc_softc *)self;
struct gsc_attach_args *ga = aux;
sc->sc_iot = ga->ga_iot;
if (bus_space_map(sc->sc_iot, ga->ga_hpa,
IOMOD_HPASIZE, 0, &sc->sc_ioh)) {
printf(": cannot map io space\n");
return;
}
sc->sc_bustag = *sc->sc_iot;
sc->sc_bustag.hbt_r1 = siop_gsc_r1;
sc->sc_bustag.hbt_r2 = siop_gsc_r2;
sc->sc_bustag.hbt_w1 = siop_gsc_w1;
sc->sc_bustag.hbt_w2 = siop_gsc_w2;
sc->sc_siop.sc_c.features = SF_CHIP_PF | SF_CHIP_BE | SF_BUS_WIDE;
sc->sc_siop.sc_c.maxburst = 4;
sc->sc_siop.sc_c.maxoff = 8;
sc->sc_siop.sc_c.clock_div = 3;
sc->sc_siop.sc_c.clock_period = 250;
sc->sc_siop.sc_c.ram_size = 0;
sc->sc_siop.sc_c.sc_reset = siop_gsc_reset;
sc->sc_siop.sc_c.sc_dmat = ga->ga_dmatag;
sc->sc_siop.sc_c.sc_rt = &sc->sc_bustag;
bus_space_subregion(sc->sc_iot, sc->sc_ioh, SIOP_GSC_OFFSET,
IOMOD_HPASIZE - SIOP_GSC_OFFSET, &sc->sc_siop.sc_c.sc_rh);
/*
* Reset the SCSI subsystem.
*/
bus_space_write_1(sc->sc_iot, sc->sc_ioh, SIOP_GSC_RESET, 0);
DELAY(1000);
siop_gsc_reset(&sc->sc_siop.sc_c);
gsc_intr_establish((struct gsc_softc *)parent, ga->ga_irq,
IPL_BIO, siop_intr, sc, sc->sc_siop.sc_c.sc_dev.dv_xname);
printf(": NCR53C720 rev %d\n", bus_space_read_1(sc->sc_siop.sc_c.sc_rt,
sc->sc_siop.sc_c.sc_rh, SIOP_CTEST3) >> 4);
siop_attach(&sc->sc_siop);
}
void
siop_gsc_reset(struct siop_common_softc *sc)
{
bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_DCNTL, DCNTL_EA);
bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST0, CTEST0_EHP);
bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST4, CTEST4_MUX);
bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STIME0,
(0xc << STIME0_SEL_SHIFT));
}
u_int8_t
siop_gsc_r1(void *v, bus_space_handle_t h, bus_size_t o)
{
return *(volatile u_int8_t *)(h + (o ^ 3));
}
u_int16_t
siop_gsc_r2(void *v, bus_space_handle_t h, bus_size_t o)
{
if (o == SIOP_SIST0) {
u_int16_t reg;
reg = siop_gsc_r1(v, h, SIOP_SIST0);
reg |= siop_gsc_r1(v, h, SIOP_SIST1) << 8;
return reg;
}
return *(volatile u_int16_t *)(h + (o ^ 2));
}
void
siop_gsc_w1(void *v, bus_space_handle_t h, bus_size_t o, u_int8_t vv)
{
*(volatile u_int8_t *)(h + (o ^ 3)) = vv;
}
void
siop_gsc_w2(void *v, bus_space_handle_t h, bus_size_t o, u_int16_t vv)
{
*(volatile u_int16_t *)(h + (o ^ 2)) = vv;
}

522
sys/arch/hppa/hppa/autoconf.c
View File

@ -1,522 +0,0 @@
/* $OpenBSD: autoconf.c,v 1.63 2022/09/02 20:06:55 miod Exp $ */
/*
* Copyright (c) 1998-2003 Michael Shalayeff
* Copyright (c) 1992, 1993
* The Regents of the University of California. All rights reserved.
*
* This software was developed by the Computer Systems Engineering group
* at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
* contributed to Berkeley.
*
* All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Lawrence Berkeley Laboratory.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* @(#)autoconf.c 8.4 (Berkeley) 10/1/93
*/
#include "pci.h"
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/buf.h>
#include <sys/disklabel.h>
#include <sys/conf.h>
#include <sys/reboot.h>
#include <sys/device.h>
#include <sys/timeout.h>
#include <uvm/uvm_extern.h>
#include <machine/iomod.h>
#include <machine/autoconf.h>
#include <dev/cons.h>
#include <hppa/dev/cpudevs.h>
#if NPCI > 0
#include <dev/pci/pcivar.h>
#include <dev/pci/pcireg.h>
#endif
/* device we booted from */
struct device *bootdv;
void dumpconf(void);
void (*cold_hook)(int); /* see below */
/*
* LED blinking thing
*/
#ifdef USELEDS
#include <sys/kernel.h>
struct timeout heartbeat_tmo;
void heartbeat(void *);
#endif
#include "cd.h"
#include "sd.h"
#include "st.h"
#include "mpath.h"
#include <scsi/scsi_all.h>
#include <scsi/scsiconf.h>
#if NMPATH > 0
#include <scsi/mpathvar.h>
#endif
#ifdef USELEDS
/*
* turn the heartbeat alive.
* right thing would be to pass counter to each subsequent timeout
* as an argument to heartbeat() incrementing every turn,
* i.e. avoiding the static hbcnt, but doing timeout_set() on each
* timeout_add() sounds ugly, guts of struct timeout looks ugly
* to ponder in even more.
*/
void
heartbeat(v)
void *v;
{
static u_int hbcnt = 0, ocp_total, ocp_idle;
int toggle, cp_mask, cp_total, cp_idle;
struct schedstate_percpu *spc = &(curcpu()->ci_schedstate);
timeout_add(&heartbeat_tmo, hz / 16);
cp_idle = spc->spc_cp_time[CP_IDLE];
cp_total = spc->spc_cp_time[CP_USER] + spc->spc_cp_time[CP_NICE] +
spc->spc_cp_time[CP_SYS] + spc->spc_cp_time[CP_INTR] +
spc->spc_cp_time[CP_IDLE];
if (cp_total == ocp_total)
cp_total = ocp_total + 1;
if (cp_idle == ocp_idle)
cp_idle = ocp_idle + 1;
cp_mask = 0xf0 >> (cp_idle - ocp_idle) * 4 / (cp_total - ocp_total);
cp_mask &= 0xf0;
ocp_total = cp_total;
ocp_idle = cp_idle;
/*
* do this:
*
* |~| |~|
* _| |_| |_,_,_,_
* 0 1 2 3 4 6 7
*/
toggle = 0;
if (hbcnt++ < 8 && hbcnt & 1)
toggle = PALED_HEARTBEAT;
hbcnt &= 15;
ledctl(cp_mask,
(~cp_mask & 0xf0) | PALED_NETRCV | PALED_NETSND | PALED_DISK,
toggle);
}
#endif
/*
* This is called by configure to set dumplo and dumpsize.
* Dumps always skip the first CLBYTES of disk space
* in case there might be a disk label stored there.
* If there is extra space, put dump at the end to
* reduce the chance that swapping trashes it.
*/
void
dumpconf(void)
{
extern int dumpsize;
int nblks, dumpblks; /* size of dump area */
if (dumpdev == NODEV ||
(nblks = (bdevsw[major(dumpdev)].d_psize)(dumpdev)) == 0)
return;
if (nblks <= ctod(1))
return;
dumpblks = cpu_dumpsize();
if (dumpblks < 0)
return;
dumpblks += ctod(physmem);
/* If dump won't fit (incl. room for possible label), punt. */
if (dumpblks > (nblks - ctod(1)))
return;
/* Put dump at end of partition */
dumplo = nblks - dumpblks;
/* dumpsize is in page units, and doesn't include headers. */
dumpsize = physmem;
}
void print_devpath(const char *label, struct pz_device *pz);
void
print_devpath(const char *label, struct pz_device *pz)
{
int i;
printf("%s: ", label);
for (i = 0; i < 6; i++)
if (pz->pz_bc[i] >= 0)
printf("%d/", pz->pz_bc[i]);
printf("%d.%x", pz->pz_mod, pz->pz_layers[0]);
for (i = 1; i < 6 && pz->pz_layers[i]; i++)
printf(".%x", pz->pz_layers[i]);
printf(" class=%d flags=%b hpa=0x%x spa=0x%x io=0x%x\n", pz->pz_class,
pz->pz_flags, PZF_BITS, pz->pz_hpa, pz->pz_spa, pz->pz_iodc_io);
}
struct pdc_memmap pdc_memmap PDC_ALIGNMENT;
struct pdc_sysmap_find pdc_find PDC_ALIGNMENT;
struct pdc_sysmap_addrs pdc_addr PDC_ALIGNMENT;
struct pdc_iodc_read pdc_iodc_read PDC_ALIGNMENT;
void
pdc_scanbus(struct device *self, struct confargs *ca, int maxmod,
hppa_hpa_t hpa, int cpu_scan)
{
int start, end, incr, i;
/* Scan forwards for CPUs, backwards for everything else. */
if (cpu_scan) {
start = 0;
incr = 1;
end = maxmod;
} else {
start = maxmod - 1;
incr = -1;
end = -1;
}
for (i = start; i != end; i += incr) {
struct confargs nca;
int error;
bzero(&nca, sizeof(nca));
nca.ca_iot = ca->ca_iot;
nca.ca_dmatag = ca->ca_dmatag;
nca.ca_dp.dp_bc[0] = ca->ca_dp.dp_bc[1];
nca.ca_dp.dp_bc[1] = ca->ca_dp.dp_bc[2];
nca.ca_dp.dp_bc[2] = ca->ca_dp.dp_bc[3];
nca.ca_dp.dp_bc[3] = ca->ca_dp.dp_bc[4];
nca.ca_dp.dp_bc[4] = ca->ca_dp.dp_bc[5];
nca.ca_dp.dp_bc[5] = ca->ca_dp.dp_mod;
nca.ca_dp.dp_mod = i;
nca.ca_hpamask = ca->ca_hpamask;
nca.ca_naddrs = 0;
nca.ca_hpa = 0;
if (hpa) {
nca.ca_hpa = hpa + IOMOD_HPASIZE * i;
nca.ca_dp.dp_mod = i;
} else if ((error = pdc_call((iodcio_t)pdc, 0, PDC_MEMMAP,
PDC_MEMMAP_HPA, &pdc_memmap, &nca.ca_dp)) == 0)
nca.ca_hpa = pdc_memmap.hpa;
else if ((error = pdc_call((iodcio_t)pdc, 0, PDC_SYSMAP,
PDC_SYSMAP_HPA, &pdc_memmap, &nca.ca_dp)) == 0) {
struct device_path path;
int im, ia;
nca.ca_hpa = pdc_memmap.hpa;
for (im = 0; !(error = pdc_call((iodcio_t)pdc, 0,
PDC_SYSMAP, PDC_SYSMAP_FIND,
&pdc_find, &path, im)) &&
pdc_find.hpa != nca.ca_hpa; im++)
;
if (!error)
nca.ca_hpasz = pdc_find.size << PGSHIFT;
if (!error && pdc_find.naddrs) {
nca.ca_naddrs = pdc_find.naddrs;
if (nca.ca_naddrs > 16) {
nca.ca_naddrs = 16;
printf("WARNING: too many (%d) addrs\n",
pdc_find.naddrs);
}
if (autoconf_verbose)
printf(">> ADDRS:");
for (ia = 0; !(error = pdc_call((iodcio_t)pdc,
0, PDC_SYSMAP, PDC_SYSMAP_ADDR, &pdc_addr,
im, ia + 1)) && ia < nca.ca_naddrs; ia++) {
nca.ca_addrs[ia].addr = pdc_addr.hpa;
nca.ca_addrs[ia].size =
pdc_addr.size << PGSHIFT;
if (autoconf_verbose)
printf(" 0x%lx[0x%x]",
nca.ca_addrs[ia].addr,
nca.ca_addrs[ia].size);
}
if (autoconf_verbose)
printf("\n");
}
}
if (!nca.ca_hpa)
continue;
if (autoconf_verbose)
printf(">> HPA 0x%lx[0x%x]\n",
nca.ca_hpa, nca.ca_hpasz);
if ((error = pdc_call((iodcio_t)pdc, 0, PDC_IODC,
PDC_IODC_READ, &pdc_iodc_read, nca.ca_hpa, IODC_DATA,
&nca.ca_type, sizeof(nca.ca_type))) < 0) {
if (autoconf_verbose)
printf(">> iodc_data error %d\n", error);
continue;
}
nca.ca_pdc_iodc_read = &pdc_iodc_read;
nca.ca_name = hppa_mod_info(nca.ca_type.iodc_type,
nca.ca_type.iodc_sv_model);
if (autoconf_verbose) {
printf(">> probing: flags %b bc %d/%d/%d/%d/%d/%d ",
nca.ca_dp.dp_flags, PZF_BITS,
nca.ca_dp.dp_bc[0], nca.ca_dp.dp_bc[1],
nca.ca_dp.dp_bc[2], nca.ca_dp.dp_bc[3],
nca.ca_dp.dp_bc[4], nca.ca_dp.dp_bc[5]);
printf("mod %x hpa %lx type %x sv %x\n",
nca.ca_dp.dp_mod, nca.ca_hpa,
nca.ca_type.iodc_type, nca.ca_type.iodc_sv_model);
}
if (cpu_scan && nca.ca_type.iodc_type == HPPA_TYPE_NPROC &&
nca.ca_type.iodc_sv_model == HPPA_NPROC_HPPA)
ncpusfound++;
if (cpu_scan &&
((nca.ca_type.iodc_type != HPPA_TYPE_NPROC ||
nca.ca_type.iodc_sv_model != HPPA_NPROC_HPPA) &&
(nca.ca_type.iodc_type != HPPA_TYPE_MEMORY ||
nca.ca_type.iodc_sv_model != HPPA_MEMORY_PDEP)))
continue;
if (!cpu_scan &&
((nca.ca_type.iodc_type == HPPA_TYPE_NPROC &&
nca.ca_type.iodc_sv_model == HPPA_NPROC_HPPA) ||
(nca.ca_type.iodc_type == HPPA_TYPE_MEMORY &&
nca.ca_type.iodc_sv_model == HPPA_MEMORY_PDEP)))
continue;
config_found_sm(self, &nca, mbprint, mbsubmatch);
}
}
const struct hppa_mod_info hppa_knownmods[] = {
#include <hppa/dev/cpudevs_data.h>
};
const char *
hppa_mod_info(type, sv)
int type, sv;
{
const struct hppa_mod_info *mi;
static char fakeid[32];
for (mi = hppa_knownmods; mi->mi_type >= 0 &&
(mi->mi_type != type || mi->mi_sv != sv); mi++);
if (mi->mi_type < 0) {
snprintf(fakeid, sizeof fakeid, "type %x, sv %x", type, sv);
return fakeid;
} else
return mi->mi_name;
}
void
device_register(struct device *dev, void *aux)
{
#if NPCI > 0
extern struct cfdriver pci_cd;
#endif
#if NCD > 0 || NSD > 0 || NST > 0
extern struct cfdriver scsibus_cd;
#endif
struct confargs *ca = aux;
static struct device *elder = NULL;
if (bootdv != NULL)
return; /* We already have a winner */
#if NPCI > 0
if (dev->dv_parent &&
dev->dv_parent->dv_cfdata->cf_driver == &pci_cd) {
struct pci_attach_args *pa = aux;
pcireg_t addr;
int reg;
for (reg = PCI_MAPREG_START; reg < PCI_MAPREG_END; reg += 4) {
addr = pci_conf_read(pa->pa_pc, pa->pa_tag, reg);
if (PCI_MAPREG_TYPE(addr) == PCI_MAPREG_TYPE_IO)
addr = PCI_MAPREG_IO_ADDR(addr);
else
addr = PCI_MAPREG_MEM_ADDR(addr);
if (addr == (pcireg_t)PAGE0->mem_boot.pz_hpa) {
elder = dev;
break;
}
}
} else
#endif
if (ca->ca_hpa == (hppa_hpa_t)PAGE0->mem_boot.pz_hpa) {
/*
* If hpa matches, the only thing we know is that the
* booted device is either this one or one of its children.
* And the children will not necessarily have the correct
* hpa value.
* Save this elder for now.
*/
elder = dev;
} else if (elder == NULL) {
return; /* not the device we booted from */
}
/*
* Unfortunately, we can not match on pz_class vs dv_class on
* older snakes netbooting using the rbootd protocol.
* In this case, we'll end up with pz_class == PCL_RANDOM...
* Instead, trust the device class from what the kernel attached
* now...
*/
switch (dev->dv_class) {
case DV_IFNET:
/*
* Netboot is the top elder
*/
if (elder == dev) {
bootdv = dev;
}
return;
case DV_DISK:
case DV_DULL:
if ((PAGE0->mem_boot.pz_class & PCL_CLASS_MASK) != PCL_RANDOM)
return;
break;
case DV_TAPE:
if ((PAGE0->mem_boot.pz_class & PCL_CLASS_MASK) != PCL_SEQU)
return;
break;
default:
/* No idea what we were booted from, but better ask the user */
return;
}
/*
* If control goes here, we are booted from a block device and we
* matched a block device.
*
* We only grok SCSI boot currently. Match on proper device
* hierarchy and unit/lun values.
*/
#if NCD > 0 || NSD > 0 || NST > 0
if (dev->dv_parent &&
dev->dv_parent->dv_cfdata->cf_driver == &scsibus_cd) {
struct scsi_attach_args *sa = aux;
struct scsi_link *sl = sa->sa_sc_link;
/*
* sd/st/cd is attached to scsibus which is attached to
* the controller. Hence the grandparent here should be
* the elder.
*/
if (dev->dv_parent->dv_parent != elder) {
return;
}
/*
* And now check for proper target and lun values
*/
if (sl->target == PAGE0->mem_boot.pz_layers[0] &&
sl->lun == PAGE0->mem_boot.pz_layers[1]) {
bootdv = dev;
}
}
#endif
}
/*
* cpu_configure:
* called at boot time, configure all devices on system
*/
void
cpu_configure(void)
{
splhigh();
if (config_rootfound("mainbus", "mainbus") == NULL)
panic("no mainbus found");
cpu_intr_init();
spl0();
if (cold_hook)
(*cold_hook)(HPPA_COLD_HOT);
#ifdef USELEDS
timeout_set(&heartbeat_tmo, heartbeat, NULL);
heartbeat(NULL);
#endif
cold = 0;
}
void
diskconf(void)
{
print_devpath("bootpath", &PAGE0->mem_boot);
#if NMPATH > 0
if (bootdv != NULL)
bootdv = mpath_bootdv(bootdv);
#endif
setroot(bootdv, 0, RB_USERREQ);
dumpconf();
}
const struct nam2blk nam2blk[] = {
{ "vnd", 2 },
{ "rd", 3 },
{ "sd", 4 },
{ "cd", 6 },
{ "fd", 7 },
{ "wd", 8 },
{ NULL, -1 }
};

278
sys/arch/hppa/hppa/conf.c
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@ -1,278 +0,0 @@
/* $OpenBSD: conf.c,v 1.75 2022/10/15 10:12:13 jsg Exp $ */
/*-
* Copyright (c) 1991 The Regents of the University of California.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* @(#)conf.c 7.9 (Berkeley) 5/28/91
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/buf.h>
#include <sys/ioctl.h>
#include <sys/tty.h>
#include <sys/vnode.h>
#include <machine/conf.h>
#include "vnd.h"
#include "rd.h"
#include "sd.h"
#include "st.h"
#include "cd.h"
#include "ch.h"
#include "uk.h"
#include "wd.h"
bdev_decl(wd);
cdev_decl(wd);
#if 0
#include "fd.h"
#else
#define NFD 0
#endif
bdev_decl(fd);
cdev_decl(fd);
struct bdevsw bdevsw[] =
{
bdev_swap_init(1,sw), /* 0: swap pseudo-device */
bdev_notdef(), /* 1: was: concatenated disk driver */
bdev_disk_init(NVND,vnd), /* 2: vnode disk driver */
bdev_disk_init(NRD,rd), /* 3: RAM disk */
bdev_disk_init(NSD,sd), /* 4: SCSI disk */
bdev_notdef(), /* 5: was: SCSI tape */
bdev_disk_init(NCD,cd), /* 6: SCSI CD-ROM */
bdev_disk_init(NFD,fd), /* 7: floppy drive */
bdev_disk_init(NWD,wd), /* 8: ST506 drive */
bdev_notdef(), /* 9: */
bdev_notdef(), /* 10: */
bdev_notdef(), /* 11: */
bdev_notdef(), /* 12: */
bdev_notdef(), /* 13: */
bdev_notdef(), /* 14: */
};
int nblkdev = nitems(bdevsw);
#include "audio.h"
#include "video.h"
#include "bio.h"
#include "pty.h"
#include "wsdisplay.h"
#include "wskbd.h"
#include "wsmouse.h"
#include "wsmux.h"
#include "bpfilter.h"
#include "tun.h"
#include "ksyms.h"
#include "kstat.h"
#include "lpt.h"
cdev_decl(lpt);
#include "com.h"
cdev_decl(com);
#include "dt.h"
#include "pf.h"
#include "hotplug.h"
#include "vscsi.h"
#include "pppx.h"
#ifdef USER_PCICONF
#include "pci.h"
cdev_decl(pci);
#endif
#include "usb.h"
#include "uhid.h"
#include "fido.h"
#include "ujoy.h"
#include "ugen.h"
#include "ulpt.h"
#include "ucom.h"
#include "fuse.h"
struct cdevsw cdevsw[] =
{
cdev_cn_init(1,cn), /* 0: virtual console */
cdev_ctty_init(1,ctty), /* 1: controlling terminal */
cdev_mm_init(1,mm), /* 2: /dev/{null,mem,kmem,...} */
cdev_notdef(), /* 3 was /dev/drum */
cdev_tty_init(NPTY,pts), /* 4: pseudo-tty slave */
cdev_ptc_init(NPTY,ptc), /* 5: pseudo-tty master */
cdev_log_init(1,log), /* 6: /dev/klog */
cdev_notdef(), /* 7: was: concatenated disk */
cdev_disk_init(NVND,vnd), /* 8: vnode disk driver */
cdev_disk_init(NRD,rd), /* 9: RAM disk */
cdev_disk_init(NSD,sd), /* 10: SCSI disk */
cdev_tape_init(NST,st), /* 11: SCSI tape */
cdev_disk_init(NCD,cd), /* 12: SCSI cd-rom */
cdev_ch_init(NCH,ch), /* 13: SCSI changer */
cdev_notdef(), /* 14: */
cdev_uk_init(NUK,uk), /* 15: SCSI unknown */
cdev_fd_init(1,filedesc), /* 16: file descriptor pseudo-device */
cdev_bpf_init(NBPFILTER,bpf), /* 17: Berkeley packet filter */
cdev_tun_init(NTUN,tun), /* 18: network tunnel */
cdev_notdef(), /* 19: was LKM */
cdev_random_init(1,random), /* 20: random generator */
cdev_pf_init(NPF,pf), /* 21: packet filter */
cdev_tty_init(1,pdc), /* 22: PDC device */
cdev_tty_init(NCOM,com), /* 23: RS232 */
cdev_disk_init(NFD,fd), /* 24: floppy drive */
cdev_ksyms_init(NKSYMS,ksyms), /* 25: Kernel symbols device */
cdev_lpt_init(NLPT,lpt), /* 26: parallel printer */
cdev_wsdisplay_init(NWSDISPLAY, /* 27: workstation console */
wsdisplay),
cdev_mouse_init(NWSKBD,wskbd), /* 28: keyboards */
cdev_mouse_init(NWSMOUSE,wsmouse), /* 29: mice */
cdev_mouse_init(NWSMUX,wsmux), /* 30: mux */
#ifdef USER_PCICONF
cdev_pci_init(NPCI,pci), /* 31: PCI user */
#else
cdev_notdef(), /* 31: */
#endif
cdev_dt_init(NDT,dt), /* 32: dynamic tracer */
cdev_video_init(NVIDEO,video), /* 33: generic video I/O */
cdev_notdef(), /* 34 */
cdev_audio_init(NAUDIO,audio), /* 35: /dev/audio */
cdev_notdef(), /* 36: was: /dev/crypto */
cdev_bio_init(NBIO,bio), /* 37: ioctl tunnel */
cdev_ptm_init(NPTY,ptm), /* 38: pseudo-tty ptm device */
cdev_disk_init(NWD,wd), /* 39: ST506 disk */
cdev_usb_init(NUSB,usb), /* 40: USB controller */
cdev_usbdev_init(NUHID,uhid), /* 41: USB generic HID */
cdev_usbdev_init(NUGEN,ugen), /* 42: USB generic driver */
cdev_ulpt_init(NULPT,ulpt), /* 43: USB printers */
cdev_notdef(), /* 44: was urio */
cdev_tty_init(NUCOM,ucom), /* 45: USB tty */
cdev_notdef(), /* 46: was USB scanners */
cdev_hotplug_init(NHOTPLUG,hotplug), /* 47: devices hot plugging */
cdev_notdef(), /* 48: */
cdev_notdef(), /* 49: */
cdev_notdef(), /* 50: */
cdev_kstat_init(NKSTAT,kstat), /* 51: kernel statistics */
cdev_notdef(), /* 52: */
cdev_notdef(), /* 53: */
cdev_vscsi_init(NVSCSI,vscsi), /* 54: vscsi */
cdev_notdef(),
cdev_disk_init(1,diskmap), /* 56: disk mapper */
cdev_pppx_init(NPPPX,pppx), /* 57: pppx */
cdev_fuse_init(NFUSE,fuse), /* 58: fuse */
cdev_tun_init(NTUN,tap), /* 59: Ethernet network tunnel */
cdev_notdef(), /* 60: was switch(4) */
cdev_fido_init(NFIDO,fido), /* 61: FIDO/U2F security key */
cdev_pppx_init(NPPPX,pppac), /* 62: PPP Access Concentrator */
cdev_ujoy_init(NUJOY,ujoy), /* 63: USB joystick/gamecontroller */
};
int nchrdev = nitems(cdevsw);
int mem_no = 2; /* major device number of memory special file */
/*
* Swapdev is a fake device implemented
* in sw.c used only internally to get to swstrategy.
* It cannot be provided to the users, because the
* swstrategy routine munches the b_dev and b_blkno entries
* before calling the appropriate driver. This would horribly
* confuse, e.g. the hashing routines. Instead, /dev/drum is
* provided as a character (raw) device.
*/
dev_t swapdev = makedev(0, 0);
const int chrtoblktbl[] = {
/*VCHR*/ /*VBLK*/
/* 0 */ NODEV,
/* 1 */ NODEV,
/* 2 */ NODEV,
/* 3 */ NODEV,
/* 4 */ NODEV,
/* 5 */ NODEV,
/* 6 */ NODEV,
/* 7 */ NODEV,
/* 8 */ 2, /* vnd */
/* 9 */ 3, /* rd */
/* 10 */ 4, /* sd */
/* 11 */ NODEV,
/* 12 */ 6, /* cd */
/* 13 */ NODEV,
/* 14 */ NODEV,
/* 15 */ NODEV,
/* 16 */ NODEV,
/* 17 */ NODEV,
/* 18 */ NODEV,
/* 19 */ NODEV,
/* 20 */ NODEV,
/* 21 */ NODEV,
/* 22 */ NODEV,
/* 23 */ NODEV,
/* 24 */ 7, /* fd */
/* 25 */ NODEV,
/* 26 */ NODEV,
/* 27 */ NODEV,
/* 28 */ NODEV,
/* 29 */ NODEV,
/* 30 */ NODEV,
/* 31 */ NODEV,
/* 32 */ NODEV,
/* 33 */ NODEV,
/* 34 */ NODEV,
/* 35 */ NODEV,
/* 36 */ NODEV,
/* 37 */ NODEV,
/* 38 */ NODEV,
/* 39 */ 8, /* wd */
};
const int nchrtoblktbl = nitems(chrtoblktbl);
/*
* Returns true if dev is /dev/zero.
*/
int
iszerodev(dev_t dev)
{
return (major(dev) == mem_no && minor(dev) == 12);
}
dev_t
getnulldev(void)
{
return makedev(mem_no, 2);
}
/*
* Returns true if dev is /dev/mem or /dev/kmem.
*/
int
iskmemdev(dev_t dev)
{
return (major(dev) == mem_no && minor(dev) < 2);
}

2359
sys/arch/hppa/hppa/db_disasm.c
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