sync with OpenBSD -current
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@ -1,4 +1,4 @@
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/* $OpenBSD: vmm_machdep.c,v 1.20 2024/02/29 16:10:52 guenther Exp $ */
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/* $OpenBSD: vmm_machdep.c,v 1.21 2024/03/12 02:31:15 guenther Exp $ */
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/*
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* Copyright (c) 2014 Mike Larkin <mlarkin@openbsd.org>
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*
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@ -6017,6 +6017,58 @@ svm_handle_msr(struct vcpu *vcpu)
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return (0);
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}
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/* Handle cpuid(0xd) and its subleafs */
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static void
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vmm_handle_cpuid_0xd(struct vcpu *vcpu, uint32_t subleaf, uint64_t *rax,
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uint32_t eax, uint32_t ebx, uint32_t ecx, uint32_t edx)
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{
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if (subleaf == 0) {
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/*
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* CPUID(0xd.0) depends on the value in XCR0 and MSR_XSS. If
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* the guest XCR0 isn't the same as the host then set it, redo
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* the CPUID, and restore it.
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*/
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uint64_t xcr0 = vcpu->vc_gueststate.vg_xcr0;
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/*
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* "ecx enumerates the size required ... for an area
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* containing all the ... components supported by this
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* processor"
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* "ebx enumerates the size required ... for an area
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* containing all the ... components corresponding to bits
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* currently set in xcr0"
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* So: since the VMM 'processor' is what our base kernel uses,
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* the VMM ecx is our ebx
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*/
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ecx = ebx;
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if (xcr0 != (xsave_mask & XFEATURE_XCR0_MASK)) {
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uint32_t dummy;
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xsetbv(0, xcr0);
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CPUID_LEAF(0xd, subleaf, eax, ebx, dummy, edx);
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xsetbv(0, xsave_mask & XFEATURE_XCR0_MASK);
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}
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eax = xsave_mask & XFEATURE_XCR0_MASK;
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edx = (xsave_mask & XFEATURE_XCR0_MASK) >> 32;
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} else if (subleaf == 1) {
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/* mask out XSAVEC, XSAVES, and XFD support */
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eax &= XSAVE_XSAVEOPT | XSAVE_XGETBV1;
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ebx = 0; /* no xsavec or xsaves for now */
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ecx = edx = 0; /* no xsaves for now */
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} else if (subleaf >= 63 ||
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((1ULL << subleaf) & xsave_mask & XFEATURE_XCR0_MASK) == 0) {
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/* disclaim subleaves of features we don't expose */
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eax = ebx = ecx = edx = 0;
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} else {
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/* disclaim compressed alignment or xfd support */
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ecx = 0;
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}
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*rax = eax;
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vcpu->vc_gueststate.vg_rbx = ebx;
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vcpu->vc_gueststate.vg_rcx = ecx;
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vcpu->vc_gueststate.vg_rdx = edx;
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}
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/*
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* vmm_handle_cpuid
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*
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@ -6227,22 +6279,7 @@ vmm_handle_cpuid(struct vcpu *vcpu)
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*rdx = 0;
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break;
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case 0x0d: /* Processor ext. state information */
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if (subleaf == 0) {
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*rax = xsave_mask;
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*rbx = ebx;
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*rcx = ecx;
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*rdx = edx;
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} else if (subleaf == 1) {
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*rax = 0;
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*rbx = 0;
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*rcx = 0;
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*rdx = 0;
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} else {
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*rax = eax;
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*rbx = ebx;
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*rcx = ecx;
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*rdx = edx;
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}
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vmm_handle_cpuid_0xd(vcpu, subleaf, rax, eax, ebx, ecx, edx);
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break;
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case 0x0f: /* QoS info (not supported) */
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DPRINTF("%s: function 0x0f (QoS info) not supported\n",
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@ -1,6 +1,6 @@
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#!/bin/sh -
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#
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# $OpenBSD: newvers.sh,v 1.202 2024/02/29 17:05:10 deraadt Exp $
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# $OpenBSD: newvers.sh,v 1.203 2024/03/12 01:20:30 deraadt Exp $
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# $NetBSD: newvers.sh,v 1.17.2.1 1995/10/12 05:17:11 jtc Exp $
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#
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# Copyright (c) 1984, 1986, 1990, 1993
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@ -71,10 +71,10 @@ ost="SecBSD"
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osr="1.5"
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cat >vers.c <<eof
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#define STATUS "" /* release */
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#if 0
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#define STATUS "-beta" /* just before a release */
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#define STATUS "-current" /* just after a release */
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#if 0
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#define STATUS "" /* release */
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#define STATUS "-beta" /* just before a release */
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#define STATUS "-stable" /* stable branch */
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#endif
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@ -66,6 +66,8 @@ static void apply_edid_quirks(struct edid *edid, struct dc_edid_caps *edid_caps)
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/* Workaround for some monitors that do not clear DPCD 0x317 if FreeSync is unsupported */
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case drm_edid_encode_panel_id('A', 'U', 'O', 0xA7AB):
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case drm_edid_encode_panel_id('A', 'U', 'O', 0xE69B):
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case drm_edid_encode_panel_id('B', 'O', 'E', 0x092A):
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case drm_edid_encode_panel_id('L', 'G', 'D', 0x06D1):
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DRM_DEBUG_DRIVER("Clearing DPCD 0x317 on monitor with panel id %X\n", panel_id);
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edid_caps->panel_patch.remove_sink_ext_caps = true;
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break;
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@ -119,6 +121,8 @@ enum dc_edid_status dm_helpers_parse_edid_caps(
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edid_caps->edid_hdmi = connector->display_info.is_hdmi;
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apply_edid_quirks(edid_buf, edid_caps);
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sad_count = drm_edid_to_sad((struct edid *) edid->raw_edid, &sads);
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if (sad_count <= 0)
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return result;
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@ -145,8 +149,6 @@ enum dc_edid_status dm_helpers_parse_edid_caps(
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else
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edid_caps->speaker_flags = DEFAULT_SPEAKER_LOCATION;
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apply_edid_quirks(edid_buf, edid_caps);
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kfree(sads);
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kfree(sadb);
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@ -6925,6 +6925,23 @@ static int si_dpm_enable(struct amdgpu_device *adev)
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return 0;
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}
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static int si_set_temperature_range(struct amdgpu_device *adev)
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{
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int ret;
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ret = si_thermal_enable_alert(adev, false);
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if (ret)
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return ret;
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ret = si_thermal_set_temperature_range(adev, R600_TEMP_RANGE_MIN, R600_TEMP_RANGE_MAX);
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if (ret)
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return ret;
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ret = si_thermal_enable_alert(adev, true);
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if (ret)
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return ret;
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return ret;
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}
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static void si_dpm_disable(struct amdgpu_device *adev)
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{
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struct rv7xx_power_info *pi = rv770_get_pi(adev);
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@ -7608,6 +7625,18 @@ static int si_dpm_process_interrupt(struct amdgpu_device *adev,
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static int si_dpm_late_init(void *handle)
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{
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int ret;
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struct amdgpu_device *adev = (struct amdgpu_device *)handle;
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if (!adev->pm.dpm_enabled)
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return 0;
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ret = si_set_temperature_range(adev);
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if (ret)
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return ret;
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#if 0 //TODO ?
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si_dpm_powergate_uvd(adev, true);
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#endif
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return 0;
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}
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u64 start, u64 end,
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unsigned int order)
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{
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u64 req_size = mm->chunk_size << order;
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struct drm_buddy_block *block;
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struct drm_buddy_block *buddy;
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DRM_LIST_HEAD(dfs);
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@ -377,6 +378,15 @@ alloc_range_bias(struct drm_buddy *mm,
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if (drm_buddy_block_is_allocated(block))
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continue;
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if (block_start < start || block_end > end) {
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u64 adjusted_start = max(block_start, start);
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u64 adjusted_end = min(block_end, end);
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if (round_down(adjusted_end + 1, req_size) <=
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round_up(adjusted_start, req_size))
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continue;
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}
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if (contains(start, end, block_start, block_end) &&
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order == drm_buddy_block_order(block)) {
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/*
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