sync with OpenBSD -current
This commit is contained in:
parent
fe7a6999d9
commit
f21e607a91
GPG Key ID:
F42C07F07E2E35B7
@ -1,4 +1,4 @@
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/* $OpenBSD: ec_ameth.c,v 1.63 2024/04/17 14:01:33 tb Exp $ */
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/* $OpenBSD: ec_ameth.c,v 1.67 2024/04/18 11:56:53 tb Exp $ */
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/* Written by Dr Stephen N Henson (steve@openssl.org) for the OpenSSL
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* project 2006.
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*/
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@ -820,35 +820,49 @@ static int
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ecdh_cms_set_shared_info(EVP_PKEY_CTX *pctx, CMS_RecipientInfo *ri)
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{
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X509_ALGOR *alg, *kekalg = NULL;
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const ASN1_OBJECT *obj;
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int nid;
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const void *parameter;
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int parameter_type;
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ASN1_OCTET_STRING *ukm;
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const unsigned char *p;
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unsigned char *der = NULL;
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int plen, keylen;
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const EVP_CIPHER *kekcipher;
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EVP_CIPHER_CTX *kekctx;
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int rv = 0;
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int ret = 0;
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if (!CMS_RecipientInfo_kari_get0_alg(ri, &alg, &ukm))
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return 0;
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goto err;
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if (!ecdh_cms_set_kdf_param(pctx, OBJ_obj2nid(alg->algorithm))) {
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X509_ALGOR_get0(&obj, ¶meter_type, ¶meter, alg);
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if ((nid = OBJ_obj2nid(obj)) == NID_undef)
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goto err;
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if (!ecdh_cms_set_kdf_param(pctx, nid)) {
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ECerror(EC_R_KDF_PARAMETER_ERROR);
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return 0;
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goto err;
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}
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if (alg->parameter->type != V_ASN1_SEQUENCE)
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return 0;
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if (parameter_type != V_ASN1_SEQUENCE)
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goto err;
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if ((p = ASN1_STRING_get0_data(parameter)) == NULL)
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goto err;
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plen = ASN1_STRING_length(parameter);
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if ((kekalg = d2i_X509_ALGOR(NULL, &p, plen)) == NULL)
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goto err;
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p = alg->parameter->value.sequence->data;
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plen = alg->parameter->value.sequence->length;
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kekalg = d2i_X509_ALGOR(NULL, &p, plen);
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if (!kekalg)
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/*
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* XXX - the reaching into kekalg below is ugly, but unfortunately the
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* now internal legacy EVP_CIPHER_asn1_to_param() API doesn't interact
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* nicely with the X509_ALGOR API.
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*/
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if ((kekctx = CMS_RecipientInfo_kari_get0_ctx(ri)) == NULL)
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goto err;
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kekctx = CMS_RecipientInfo_kari_get0_ctx(ri);
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if (!kekctx)
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if ((kekcipher = EVP_get_cipherbyobj(kekalg->algorithm)) == NULL)
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goto err;
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kekcipher = EVP_get_cipherbyobj(kekalg->algorithm);
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if (!kekcipher || EVP_CIPHER_mode(kekcipher) != EVP_CIPH_WRAP_MODE)
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if (EVP_CIPHER_mode(kekcipher) != EVP_CIPH_WRAP_MODE)
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goto err;
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if (!EVP_EncryptInit_ex(kekctx, kekcipher, NULL, NULL, NULL))
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goto err;
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@ -859,19 +873,20 @@ ecdh_cms_set_shared_info(EVP_PKEY_CTX *pctx, CMS_RecipientInfo *ri)
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if (EVP_PKEY_CTX_set_ecdh_kdf_outlen(pctx, keylen) <= 0)
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goto err;
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plen = CMS_SharedInfo_encode(&der, kekalg, ukm, keylen);
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if (plen <= 0)
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if ((plen = CMS_SharedInfo_encode(&der, kekalg, ukm, keylen)) <= 0)
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goto err;
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if (EVP_PKEY_CTX_set0_ecdh_kdf_ukm(pctx, der, plen) <= 0)
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goto err;
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der = NULL;
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rv = 1;
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ret = 1;
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err:
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X509_ALGOR_free(kekalg);
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free(der);
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return rv;
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return ret;
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}
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static int
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@ -990,7 +1005,7 @@ ecdh_cms_encrypt(CMS_RecipientInfo *ri)
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* Package wrap algorithm in an AlgorithmIdentifier.
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*
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* Incompatibility of X509_ALGOR_set0() with EVP_CIPHER_param_to_asn1()
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* makes this really gross.
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* makes this really gross. See the XXX in ecdh_cms_set_shared_info().
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*/
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if ((wrap_alg = X509_ALGOR_new()) == NULL)
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@ -1,4 +1,4 @@
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.\" $OpenBSD: CMS_add1_signer.3,v 1.9 2024/03/29 06:43:12 tb Exp $
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.\" $OpenBSD: CMS_add1_signer.3,v 1.10 2024/04/18 16:50:22 tb Exp $
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.\" full merge up to: OpenSSL e9b77246 Jan 20 19:58:49 2017 +0100
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.\"
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.\" This file is a derived work.
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@ -65,7 +65,7 @@
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.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
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.\" OF THE POSSIBILITY OF SUCH DAMAGE.
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.\"
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.Dd $Mdocdate: March 29 2024 $
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.Dd $Mdocdate: April 18 2024 $
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.Dt CMS_ADD1_SIGNER 3
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.Os
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.Sh NAME
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@ -196,8 +196,8 @@ By default, issuer name and serial number are used instead.
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If present, the
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.Vt SMIMECapabilities
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attribute indicates support for the
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following algorithms in preference order: 256-bit AES, Gost R3411-94,
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Gost 28147-89, 192-bit AES, 128-bit AES, triple DES, 128-bit RC2, 64-bit
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following algorithms in preference order: 256-bit AES,
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192-bit AES, 128-bit AES, triple DES, 128-bit RC2, 64-bit
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RC2, DES and 40-bit RC2.
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If any of these algorithms is not available then it will not be
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included.
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@ -1,4 +1,4 @@
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.\" $OpenBSD: CMS_sign.3,v 1.10 2024/03/29 06:43:12 tb Exp $
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.\" $OpenBSD: CMS_sign.3,v 1.11 2024/04/18 16:50:22 tb Exp $
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.\" full merge up to: OpenSSL e9b77246 Jan 20 19:58:49 2017 +0100
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.\"
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.\" This file was written by Dr. Stephen Henson <steve@openssl.org>.
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@ -48,7 +48,7 @@
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.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
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.\" OF THE POSSIBILITY OF SUCH DAMAGE.
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.\"
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.Dd $Mdocdate: March 29 2024 $
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.Dd $Mdocdate: April 18 2024 $
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.Dt CMS_SIGN 3
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.Os
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.Sh NAME
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@ -127,8 +127,8 @@ attribute.
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Omit just the
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.Vt SMIMECapabilities .
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If present, the SMIMECapabilities attribute indicates support for the
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following algorithms in preference order: 256-bit AES, Gost R3411-94,
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Gost 28147-89, 192-bit AES, 128-bit AES, triple DES, 128-bit RC2, 64-bit
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following algorithms in preference order: 256-bit AES,
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192-bit AES, 128-bit AES, triple DES, 128-bit RC2, 64-bit
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RC2, DES and 40-bit RC2.
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If any of these algorithms is not available, then it will not be
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included.
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@ -1,4 +1,4 @@
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.\" $OpenBSD: EVP_PKEY_get_default_digest_nid.3,v 1.8 2024/03/05 19:21:31 tb Exp $
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.\" $OpenBSD: EVP_PKEY_get_default_digest_nid.3,v 1.9 2024/04/18 16:33:33 tb Exp $
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.\" full merge up to: OpenSSL df75c2bf Dec 9 01:02:36 2018 +0100
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.\"
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.\" This file is a derived work.
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@ -66,7 +66,7 @@
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.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
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.\" OF THE POSSIBILITY OF SUCH DAMAGE.
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.\"
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.Dd $Mdocdate: March 5 2024 $
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.Dd $Mdocdate: April 18 2024 $
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.Dt EVP_PKEY_GET_DEFAULT_DIGEST_NID 3
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.Os
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.Sh NAME
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@ -98,7 +98,7 @@ is set to
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.Pp
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Support for the following public key algorithms is built into the library:
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.Pp
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.Bl -column -compact EVP_PKEY_base_id(3) NID_id_Gost28147_89_MAC mandatory
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.Bl -column -compact EVP_PKEY_base_id(3) NID_sha256 mandatory
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.It Xr EVP_PKEY_base_id 3 Ta Pf * Fa pnid Ta return value
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.It Dv EVP_PKEY_DSA Ta Dv NID_sha1 Ta mandatory
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.It Dv EVP_PKEY_EC Ta Dv NID_sha1 Ta mandatory
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@ -1,4 +1,4 @@
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.\" $OpenBSD: EVP_PKEY_set1_RSA.3,v 1.22 2024/03/05 19:21:31 tb Exp $
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.\" $OpenBSD: EVP_PKEY_set1_RSA.3,v 1.23 2024/04/18 16:32:22 tb Exp $
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.\" full merge up to: OpenSSL 99d63d46 Oct 26 13:56:48 2016 -0400
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.\"
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.\" This file is a derived work.
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@ -65,7 +65,7 @@
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.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
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.\" OF THE POSSIBILITY OF SUCH DAMAGE.
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.\"
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.Dd $Mdocdate: March 5 2024 $
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.Dd $Mdocdate: April 18 2024 $
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.Dt EVP_PKEY_SET1_RSA 3
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.Os
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.Sh NAME
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@ -293,7 +293,7 @@ returns the type of
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.Fa pkey
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according to the following table:
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.Pp
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.Bl -column -compact -offset 2n EVP_PKEY_GOSTR NID_X9_62_id_ecPublicKey
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.Bl -column -compact -offset 2n EVP_PKEY_RSA_PSS NID_X9_62_id_ecPublicKey
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.It Sy return value Ta Ta Sy PEM type string
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.It Dv EVP_PKEY_CMAC Ta = Dv NID_cmac Ta CMAC
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.It Dv EVP_PKEY_DH Ta = Dv NID_dhKeyAgreement Ta DH
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@ -310,7 +310,7 @@ returns the actual OID associated with
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Historically keys using the same algorithm could use different OIDs.
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The following deprecated aliases are still supported:
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.Pp
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.Bl -column -compact -offset 2n EVP_PKEY_GOSTR12_ NID_id_tc26_gost3410_2012_512
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.Bl -column -compact -offset 2n EVP_PKEY_DSA4 NID_dsaWithSHA1_2
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.It Sy return value Ta Ta Sy alias for
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.It Dv EVP_PKEY_DSA1 Ta = Dv NID_dsa_2 Ta DSA
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.It Dv EVP_PKEY_DSA2 Ta = Dv NID_dsaWithSHA Ta DSA
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@ -1616,7 +1616,7 @@ static void gfx_v11_0_setup_rb(struct amdgpu_device *adev)
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active_rb_bitmap |= (0x3 << (i * rb_bitmap_width_per_sa));
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}
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active_rb_bitmap |= global_active_rb_bitmap;
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active_rb_bitmap &= global_active_rb_bitmap;
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adev->gfx.config.backend_enable_mask = active_rb_bitmap;
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adev->gfx.config.num_rbs = hweight32(active_rb_bitmap);
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}
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@ -449,10 +449,8 @@ static bool soc21_need_full_reset(struct amdgpu_device *adev)
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{
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switch (adev->ip_versions[GC_HWIP][0]) {
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case IP_VERSION(11, 0, 0):
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return amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__UMC);
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case IP_VERSION(11, 0, 2):
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case IP_VERSION(11, 0, 3):
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return false;
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default:
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return true;
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}
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@ -804,10 +802,35 @@ static int soc21_common_suspend(void *handle)
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return soc21_common_hw_fini(adev);
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}
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static bool soc21_need_reset_on_resume(struct amdgpu_device *adev)
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{
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u32 sol_reg1, sol_reg2;
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/* Will reset for the following suspend abort cases.
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* 1) Only reset dGPU side.
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* 2) S3 suspend got aborted and TOS is active.
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*/
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if (!(adev->flags & AMD_IS_APU) && adev->in_s3 &&
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!adev->suspend_complete) {
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sol_reg1 = RREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_81);
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drm_msleep(100);
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sol_reg2 = RREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_81);
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return (sol_reg1 != sol_reg2);
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}
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return false;
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}
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static int soc21_common_resume(void *handle)
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{
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struct amdgpu_device *adev = (struct amdgpu_device *)handle;
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if (soc21_need_reset_on_resume(adev)) {
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dev_info(adev->dev, "S3 suspend aborted, resetting...");
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soc21_asic_reset(adev);
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}
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return soc21_common_hw_init(adev);
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}
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@ -1980,6 +1980,7 @@ static int unmap_queues_cpsch(struct device_queue_manager *dqm,
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pr_err("HIQ MQD's queue_doorbell_id0 is not 0, Queue preemption time out\n");
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while (halt_if_hws_hang)
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schedule();
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kfd_hws_hang(dqm);
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return -ETIME;
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}
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@ -6126,19 +6126,16 @@ create_stream_for_sink(struct amdgpu_dm_connector *aconnector,
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if (stream->signal == SIGNAL_TYPE_HDMI_TYPE_A)
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mod_build_hf_vsif_infopacket(stream, &stream->vsp_infopacket);
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if (stream->link->psr_settings.psr_feature_enabled || stream->link->replay_settings.replay_feature_enabled) {
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if (stream->signal == SIGNAL_TYPE_DISPLAY_PORT ||
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stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST ||
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stream->signal == SIGNAL_TYPE_EDP) {
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//
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// should decide stream support vsc sdp colorimetry capability
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// before building vsc info packet
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//
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stream->use_vsc_sdp_for_colorimetry = false;
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if (aconnector->dc_sink->sink_signal == SIGNAL_TYPE_DISPLAY_PORT_MST) {
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stream->use_vsc_sdp_for_colorimetry =
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aconnector->dc_sink->is_vsc_sdp_colorimetry_supported;
|
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} else {
|
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if (stream->link->dpcd_caps.dprx_feature.bits.VSC_SDP_COLORIMETRY_SUPPORTED)
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stream->use_vsc_sdp_for_colorimetry = true;
|
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}
|
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stream->use_vsc_sdp_for_colorimetry = stream->link->dpcd_caps.dpcd_rev.raw >= 0x14 &&
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stream->link->dpcd_caps.dprx_feature.bits.VSC_SDP_COLORIMETRY_SUPPORTED;
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|
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if (stream->out_transfer_func->tf == TRANSFER_FUNCTION_GAMMA22)
|
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tf = TRANSFER_FUNC_GAMMA_22;
|
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mod_build_vsc_infopacket(stream, &stream->vsc_infopacket, stream->output_color_space, tf);
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@ -99,20 +99,25 @@ static int dcn316_get_active_display_cnt_wa(
|
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return display_count;
|
||||
}
|
||||
|
||||
static void dcn316_disable_otg_wa(struct clk_mgr *clk_mgr_base, struct dc_state *context, bool disable)
|
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static void dcn316_disable_otg_wa(struct clk_mgr *clk_mgr_base, struct dc_state *context,
|
||||
bool safe_to_lower, bool disable)
|
||||
{
|
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struct dc *dc = clk_mgr_base->ctx->dc;
|
||||
int i;
|
||||
|
||||
for (i = 0; i < dc->res_pool->pipe_count; ++i) {
|
||||
struct pipe_ctx *pipe = &dc->current_state->res_ctx.pipe_ctx[i];
|
||||
struct pipe_ctx *pipe = safe_to_lower
|
||||
? &context->res_ctx.pipe_ctx[i]
|
||||
: &dc->current_state->res_ctx.pipe_ctx[i];
|
||||
|
||||
if (pipe->top_pipe || pipe->prev_odm_pipe)
|
||||
continue;
|
||||
if (pipe->stream && (pipe->stream->dpms_off || pipe->plane_state == NULL ||
|
||||
dc_is_virtual_signal(pipe->stream->signal))) {
|
||||
if (pipe->stream && (pipe->stream->dpms_off || dc_is_virtual_signal(pipe->stream->signal) ||
|
||||
!pipe->stream->link_enc)) {
|
||||
if (disable) {
|
||||
pipe->stream_res.tg->funcs->immediate_disable_crtc(pipe->stream_res.tg);
|
||||
if (pipe->stream_res.tg && pipe->stream_res.tg->funcs->immediate_disable_crtc)
|
||||
pipe->stream_res.tg->funcs->immediate_disable_crtc(pipe->stream_res.tg);
|
||||
|
||||
reset_sync_context_for_pipe(dc, context, i);
|
||||
} else
|
||||
pipe->stream_res.tg->funcs->enable_crtc(pipe->stream_res.tg);
|
||||
@ -207,11 +212,11 @@ static void dcn316_update_clocks(struct clk_mgr *clk_mgr_base,
|
||||
}
|
||||
|
||||
if (should_set_clock(safe_to_lower, new_clocks->dispclk_khz, clk_mgr_base->clks.dispclk_khz)) {
|
||||
dcn316_disable_otg_wa(clk_mgr_base, context, true);
|
||||
dcn316_disable_otg_wa(clk_mgr_base, context, safe_to_lower, true);
|
||||
|
||||
clk_mgr_base->clks.dispclk_khz = new_clocks->dispclk_khz;
|
||||
dcn316_smu_set_dispclk(clk_mgr, clk_mgr_base->clks.dispclk_khz);
|
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dcn316_disable_otg_wa(clk_mgr_base, context, false);
|
||||
dcn316_disable_otg_wa(clk_mgr_base, context, safe_to_lower, false);
|
||||
|
||||
update_dispclk = true;
|
||||
}
|
||||
|
||||
@ -226,8 +226,18 @@ static int smu_v13_0_4_system_features_control(struct smu_context *smu, bool en)
|
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struct amdgpu_device *adev = smu->adev;
|
||||
int ret = 0;
|
||||
|
||||
if (!en && !adev->in_s0ix)
|
||||
if (!en && !adev->in_s0ix) {
|
||||
/* Adds a GFX reset as workaround just before sending the
|
||||
* MP1_UNLOAD message to prevent GC/RLC/PMFW from entering
|
||||
* an invalid state.
|
||||
*/
|
||||
ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_GfxDeviceDriverReset,
|
||||
SMU_RESET_MODE_2, NULL);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = smu_cmn_send_smc_msg(smu, SMU_MSG_PrepareMp1ForUnload, NULL);
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -777,6 +777,7 @@ int drm_client_modeset_probe(struct drm_client_dev *client, unsigned int width,
|
||||
unsigned int total_modes_count = 0;
|
||||
struct drm_client_offset *offsets;
|
||||
unsigned int connector_count = 0;
|
||||
/* points to modes protected by mode_config.mutex */
|
||||
struct drm_display_mode **modes;
|
||||
struct drm_crtc **crtcs;
|
||||
int i, ret = 0;
|
||||
@ -855,7 +856,6 @@ int drm_client_modeset_probe(struct drm_client_dev *client, unsigned int width,
|
||||
drm_client_pick_crtcs(client, connectors, connector_count,
|
||||
crtcs, modes, 0, width, height);
|
||||
}
|
||||
mutex_unlock(&dev->mode_config.mutex);
|
||||
|
||||
drm_client_modeset_release(client);
|
||||
|
||||
@ -885,6 +885,7 @@ int drm_client_modeset_probe(struct drm_client_dev *client, unsigned int width,
|
||||
modeset->y = offset->y;
|
||||
}
|
||||
}
|
||||
mutex_unlock(&dev->mode_config.mutex);
|
||||
|
||||
mutex_unlock(&client->modeset_mutex);
|
||||
out:
|
||||
|
||||
@ -2462,7 +2462,7 @@ intel_set_cdclk_pre_plane_update(struct intel_atomic_state *state)
|
||||
if (IS_DG2(i915))
|
||||
intel_cdclk_pcode_pre_notify(state);
|
||||
|
||||
if (pipe == INVALID_PIPE ||
|
||||
if (new_cdclk_state->disable_pipes ||
|
||||
old_cdclk_state->actual.cdclk <= new_cdclk_state->actual.cdclk) {
|
||||
drm_WARN_ON(&i915->drm, !new_cdclk_state->base.changed);
|
||||
|
||||
@ -2494,7 +2494,7 @@ intel_set_cdclk_post_plane_update(struct intel_atomic_state *state)
|
||||
if (IS_DG2(i915))
|
||||
intel_cdclk_pcode_post_notify(state);
|
||||
|
||||
if (pipe != INVALID_PIPE &&
|
||||
if (!new_cdclk_state->disable_pipes &&
|
||||
old_cdclk_state->actual.cdclk > new_cdclk_state->actual.cdclk) {
|
||||
drm_WARN_ON(&i915->drm, !new_cdclk_state->base.changed);
|
||||
|
||||
@ -2946,6 +2946,7 @@ static struct intel_global_state *intel_cdclk_duplicate_state(struct intel_globa
|
||||
return NULL;
|
||||
|
||||
cdclk_state->pipe = INVALID_PIPE;
|
||||
cdclk_state->disable_pipes = false;
|
||||
|
||||
return &cdclk_state->base;
|
||||
}
|
||||
@ -3124,6 +3125,8 @@ int intel_modeset_calc_cdclk(struct intel_atomic_state *state)
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
new_cdclk_state->disable_pipes = true;
|
||||
|
||||
drm_dbg_kms(&dev_priv->drm,
|
||||
"Modeset required for cdclk change\n");
|
||||
}
|
||||
|
||||
@ -51,6 +51,9 @@ struct intel_cdclk_state {
|
||||
|
||||
/* bitmask of active pipes */
|
||||
u8 active_pipes;
|
||||
|
||||
/* update cdclk with pipes disabled */
|
||||
bool disable_pipes;
|
||||
};
|
||||
|
||||
int intel_crtc_compute_min_cdclk(const struct intel_crtc_state *crtc_state);
|
||||
|
||||
@ -4111,7 +4111,12 @@ static bool m_n_equal(const struct intel_link_m_n *m_n_1,
|
||||
static bool crtcs_port_sync_compatible(const struct intel_crtc_state *crtc_state1,
|
||||
const struct intel_crtc_state *crtc_state2)
|
||||
{
|
||||
/*
|
||||
* FIXME the modeset sequence is currently wrong and
|
||||
* can't deal with bigjoiner + port sync at the same time.
|
||||
*/
|
||||
return crtc_state1->hw.active && crtc_state2->hw.active &&
|
||||
!crtc_state1->bigjoiner_pipes && !crtc_state2->bigjoiner_pipes &&
|
||||
crtc_state1->output_types == crtc_state2->output_types &&
|
||||
crtc_state1->output_format == crtc_state2->output_format &&
|
||||
crtc_state1->lane_count == crtc_state2->lane_count &&
|
||||
|
||||
@ -111,6 +111,13 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state,
|
||||
if (!intel_vrr_is_capable(connector))
|
||||
return;
|
||||
|
||||
/*
|
||||
* FIXME all joined pipes share the same transcoder.
|
||||
* Need to account for that during VRR toggle/push/etc.
|
||||
*/
|
||||
if (crtc_state->bigjoiner_pipes)
|
||||
return;
|
||||
|
||||
if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE)
|
||||
return;
|
||||
|
||||
|
||||
@ -1,4 +1,4 @@
|
||||
/* $OpenBSD: kern_sig.c,v 1.324 2024/04/10 10:05:26 claudio Exp $ */
|
||||
/* $OpenBSD: kern_sig.c,v 1.325 2024/04/18 09:06:42 claudio Exp $ */
|
||||
/* $NetBSD: kern_sig.c,v 1.54 1996/04/22 01:38:32 christos Exp $ */
|
||||
|
||||
/*
|
||||
@ -1443,6 +1443,9 @@ proc_stop(struct proc *p, int sw)
|
||||
#ifdef MULTIPROCESSOR
|
||||
SCHED_ASSERT_LOCKED();
|
||||
#endif
|
||||
/* do not stop exiting procs */
|
||||
if (ISSET(p->p_flag, P_WEXIT))
|
||||
return;
|
||||
|
||||
p->p_stat = SSTOP;
|
||||
atomic_clearbits_int(&pr->ps_flags, PS_WAITED);
|
||||
|
||||
@ -1,4 +1,4 @@
|
||||
/* $OpenBSD: kern_synch.c,v 1.201 2024/03/30 13:33:20 mpi Exp $ */
|
||||
/* $OpenBSD: kern_synch.c,v 1.202 2024/04/18 08:59:38 claudio Exp $ */
|
||||
/* $NetBSD: kern_synch.c,v 1.37 1996/04/22 01:38:37 christos Exp $ */
|
||||
|
||||
/*
|
||||
@ -342,6 +342,9 @@ sleep_setup(const volatile void *ident, int prio, const char *wmesg)
|
||||
if (p->p_stat != SONPROC)
|
||||
panic("tsleep: not SONPROC");
|
||||
#endif
|
||||
/* exiting processes are not allowed to catch signals */
|
||||
if (p->p_flag & P_WEXIT)
|
||||
CLR(prio, PCATCH);
|
||||
|
||||
SCHED_LOCK(s);
|
||||
|
||||
|
||||
@ -1,4 +1,4 @@
|
||||
/* $OpenBSD: proc.h,v 1.359 2024/04/10 10:05:26 claudio Exp $ */
|
||||
/* $OpenBSD: proc.h,v 1.360 2024/04/18 10:29:39 claudio Exp $ */
|
||||
/* $NetBSD: proc.h,v 1.44 1996/04/22 01:23:21 christos Exp $ */
|
||||
|
||||
/*-
|
||||
@ -604,9 +604,7 @@ struct cond {
|
||||
|
||||
#define COND_INITIALIZER() { .c_wait = 1 }
|
||||
|
||||
#if defined(MULTIPROCESSOR)
|
||||
void proc_trampoline_mp(void); /* XXX */
|
||||
#endif
|
||||
void proc_trampoline_mi(void);
|
||||
|
||||
/*
|
||||
* functions to handle sets of cpus.
|
||||
|
||||
Loading…
Reference in New Issue
Block a user