sync with OpenBSD -current

This commit is contained in:
purplerain 2024-04-19 01:38:35 +00:00
parent fe7a6999d9
commit f21e607a91
Signed by: purplerain
GPG Key ID: F42C07F07E2E35B7
19 changed files with 138 additions and 64 deletions

View File

@ -1,4 +1,4 @@
/* $OpenBSD: ec_ameth.c,v 1.63 2024/04/17 14:01:33 tb Exp $ */
/* $OpenBSD: ec_ameth.c,v 1.67 2024/04/18 11:56:53 tb Exp $ */
/* Written by Dr Stephen N Henson (steve@openssl.org) for the OpenSSL
* project 2006.
*/
@ -820,35 +820,49 @@ static int
ecdh_cms_set_shared_info(EVP_PKEY_CTX *pctx, CMS_RecipientInfo *ri)
{
X509_ALGOR *alg, *kekalg = NULL;
const ASN1_OBJECT *obj;
int nid;
const void *parameter;
int parameter_type;
ASN1_OCTET_STRING *ukm;
const unsigned char *p;
unsigned char *der = NULL;
int plen, keylen;
const EVP_CIPHER *kekcipher;
EVP_CIPHER_CTX *kekctx;
int rv = 0;
int ret = 0;
if (!CMS_RecipientInfo_kari_get0_alg(ri, &alg, &ukm))
return 0;
goto err;
if (!ecdh_cms_set_kdf_param(pctx, OBJ_obj2nid(alg->algorithm))) {
X509_ALGOR_get0(&obj, &parameter_type, &parameter, alg);
if ((nid = OBJ_obj2nid(obj)) == NID_undef)
goto err;
if (!ecdh_cms_set_kdf_param(pctx, nid)) {
ECerror(EC_R_KDF_PARAMETER_ERROR);
return 0;
goto err;
}
if (alg->parameter->type != V_ASN1_SEQUENCE)
return 0;
if (parameter_type != V_ASN1_SEQUENCE)
goto err;
if ((p = ASN1_STRING_get0_data(parameter)) == NULL)
goto err;
plen = ASN1_STRING_length(parameter);
if ((kekalg = d2i_X509_ALGOR(NULL, &p, plen)) == NULL)
goto err;
p = alg->parameter->value.sequence->data;
plen = alg->parameter->value.sequence->length;
kekalg = d2i_X509_ALGOR(NULL, &p, plen);
if (!kekalg)
/*
* XXX - the reaching into kekalg below is ugly, but unfortunately the
* now internal legacy EVP_CIPHER_asn1_to_param() API doesn't interact
* nicely with the X509_ALGOR API.
*/
if ((kekctx = CMS_RecipientInfo_kari_get0_ctx(ri)) == NULL)
goto err;
kekctx = CMS_RecipientInfo_kari_get0_ctx(ri);
if (!kekctx)
if ((kekcipher = EVP_get_cipherbyobj(kekalg->algorithm)) == NULL)
goto err;
kekcipher = EVP_get_cipherbyobj(kekalg->algorithm);
if (!kekcipher || EVP_CIPHER_mode(kekcipher) != EVP_CIPH_WRAP_MODE)
if (EVP_CIPHER_mode(kekcipher) != EVP_CIPH_WRAP_MODE)
goto err;
if (!EVP_EncryptInit_ex(kekctx, kekcipher, NULL, NULL, NULL))
goto err;
@ -859,19 +873,20 @@ ecdh_cms_set_shared_info(EVP_PKEY_CTX *pctx, CMS_RecipientInfo *ri)
if (EVP_PKEY_CTX_set_ecdh_kdf_outlen(pctx, keylen) <= 0)
goto err;
plen = CMS_SharedInfo_encode(&der, kekalg, ukm, keylen);
if (plen <= 0)
if ((plen = CMS_SharedInfo_encode(&der, kekalg, ukm, keylen)) <= 0)
goto err;
if (EVP_PKEY_CTX_set0_ecdh_kdf_ukm(pctx, der, plen) <= 0)
goto err;
der = NULL;
rv = 1;
ret = 1;
err:
X509_ALGOR_free(kekalg);
free(der);
return rv;
return ret;
}
static int
@ -990,7 +1005,7 @@ ecdh_cms_encrypt(CMS_RecipientInfo *ri)
* Package wrap algorithm in an AlgorithmIdentifier.
*
* Incompatibility of X509_ALGOR_set0() with EVP_CIPHER_param_to_asn1()
* makes this really gross.
* makes this really gross. See the XXX in ecdh_cms_set_shared_info().
*/
if ((wrap_alg = X509_ALGOR_new()) == NULL)

View File

@ -1,4 +1,4 @@
.\" $OpenBSD: CMS_add1_signer.3,v 1.9 2024/03/29 06:43:12 tb Exp $
.\" $OpenBSD: CMS_add1_signer.3,v 1.10 2024/04/18 16:50:22 tb Exp $
.\" full merge up to: OpenSSL e9b77246 Jan 20 19:58:49 2017 +0100
.\"
.\" This file is a derived work.
@ -65,7 +65,7 @@
.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
.\" OF THE POSSIBILITY OF SUCH DAMAGE.
.\"
.Dd $Mdocdate: March 29 2024 $
.Dd $Mdocdate: April 18 2024 $
.Dt CMS_ADD1_SIGNER 3
.Os
.Sh NAME
@ -196,8 +196,8 @@ By default, issuer name and serial number are used instead.
If present, the
.Vt SMIMECapabilities
attribute indicates support for the
following algorithms in preference order: 256-bit AES, Gost R3411-94,
Gost 28147-89, 192-bit AES, 128-bit AES, triple DES, 128-bit RC2, 64-bit
following algorithms in preference order: 256-bit AES,
192-bit AES, 128-bit AES, triple DES, 128-bit RC2, 64-bit
RC2, DES and 40-bit RC2.
If any of these algorithms is not available then it will not be
included.

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@ -1,4 +1,4 @@
.\" $OpenBSD: CMS_sign.3,v 1.10 2024/03/29 06:43:12 tb Exp $
.\" $OpenBSD: CMS_sign.3,v 1.11 2024/04/18 16:50:22 tb Exp $
.\" full merge up to: OpenSSL e9b77246 Jan 20 19:58:49 2017 +0100
.\"
.\" This file was written by Dr. Stephen Henson <steve@openssl.org>.
@ -48,7 +48,7 @@
.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
.\" OF THE POSSIBILITY OF SUCH DAMAGE.
.\"
.Dd $Mdocdate: March 29 2024 $
.Dd $Mdocdate: April 18 2024 $
.Dt CMS_SIGN 3
.Os
.Sh NAME
@ -127,8 +127,8 @@ attribute.
Omit just the
.Vt SMIMECapabilities .
If present, the SMIMECapabilities attribute indicates support for the
following algorithms in preference order: 256-bit AES, Gost R3411-94,
Gost 28147-89, 192-bit AES, 128-bit AES, triple DES, 128-bit RC2, 64-bit
following algorithms in preference order: 256-bit AES,
192-bit AES, 128-bit AES, triple DES, 128-bit RC2, 64-bit
RC2, DES and 40-bit RC2.
If any of these algorithms is not available, then it will not be
included.

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@ -1,4 +1,4 @@
.\" $OpenBSD: EVP_PKEY_get_default_digest_nid.3,v 1.8 2024/03/05 19:21:31 tb Exp $
.\" $OpenBSD: EVP_PKEY_get_default_digest_nid.3,v 1.9 2024/04/18 16:33:33 tb Exp $
.\" full merge up to: OpenSSL df75c2bf Dec 9 01:02:36 2018 +0100
.\"
.\" This file is a derived work.
@ -66,7 +66,7 @@
.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
.\" OF THE POSSIBILITY OF SUCH DAMAGE.
.\"
.Dd $Mdocdate: March 5 2024 $
.Dd $Mdocdate: April 18 2024 $
.Dt EVP_PKEY_GET_DEFAULT_DIGEST_NID 3
.Os
.Sh NAME
@ -98,7 +98,7 @@ is set to
.Pp
Support for the following public key algorithms is built into the library:
.Pp
.Bl -column -compact EVP_PKEY_base_id(3) NID_id_Gost28147_89_MAC mandatory
.Bl -column -compact EVP_PKEY_base_id(3) NID_sha256 mandatory
.It Xr EVP_PKEY_base_id 3 Ta Pf * Fa pnid Ta return value
.It Dv EVP_PKEY_DSA Ta Dv NID_sha1 Ta mandatory
.It Dv EVP_PKEY_EC Ta Dv NID_sha1 Ta mandatory

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@ -1,4 +1,4 @@
.\" $OpenBSD: EVP_PKEY_set1_RSA.3,v 1.22 2024/03/05 19:21:31 tb Exp $
.\" $OpenBSD: EVP_PKEY_set1_RSA.3,v 1.23 2024/04/18 16:32:22 tb Exp $
.\" full merge up to: OpenSSL 99d63d46 Oct 26 13:56:48 2016 -0400
.\"
.\" This file is a derived work.
@ -65,7 +65,7 @@
.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
.\" OF THE POSSIBILITY OF SUCH DAMAGE.
.\"
.Dd $Mdocdate: March 5 2024 $
.Dd $Mdocdate: April 18 2024 $
.Dt EVP_PKEY_SET1_RSA 3
.Os
.Sh NAME
@ -293,7 +293,7 @@ returns the type of
.Fa pkey
according to the following table:
.Pp
.Bl -column -compact -offset 2n EVP_PKEY_GOSTR NID_X9_62_id_ecPublicKey
.Bl -column -compact -offset 2n EVP_PKEY_RSA_PSS NID_X9_62_id_ecPublicKey
.It Sy return value Ta Ta Sy PEM type string
.It Dv EVP_PKEY_CMAC Ta = Dv NID_cmac Ta CMAC
.It Dv EVP_PKEY_DH Ta = Dv NID_dhKeyAgreement Ta DH
@ -310,7 +310,7 @@ returns the actual OID associated with
Historically keys using the same algorithm could use different OIDs.
The following deprecated aliases are still supported:
.Pp
.Bl -column -compact -offset 2n EVP_PKEY_GOSTR12_ NID_id_tc26_gost3410_2012_512
.Bl -column -compact -offset 2n EVP_PKEY_DSA4 NID_dsaWithSHA1_2
.It Sy return value Ta Ta Sy alias for
.It Dv EVP_PKEY_DSA1 Ta = Dv NID_dsa_2 Ta DSA
.It Dv EVP_PKEY_DSA2 Ta = Dv NID_dsaWithSHA Ta DSA

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@ -1616,7 +1616,7 @@ static void gfx_v11_0_setup_rb(struct amdgpu_device *adev)
active_rb_bitmap |= (0x3 << (i * rb_bitmap_width_per_sa));
}
active_rb_bitmap |= global_active_rb_bitmap;
active_rb_bitmap &= global_active_rb_bitmap;
adev->gfx.config.backend_enable_mask = active_rb_bitmap;
adev->gfx.config.num_rbs = hweight32(active_rb_bitmap);
}

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@ -449,10 +449,8 @@ static bool soc21_need_full_reset(struct amdgpu_device *adev)
{
switch (adev->ip_versions[GC_HWIP][0]) {
case IP_VERSION(11, 0, 0):
return amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__UMC);
case IP_VERSION(11, 0, 2):
case IP_VERSION(11, 0, 3):
return false;
default:
return true;
}
@ -804,10 +802,35 @@ static int soc21_common_suspend(void *handle)
return soc21_common_hw_fini(adev);
}
static bool soc21_need_reset_on_resume(struct amdgpu_device *adev)
{
u32 sol_reg1, sol_reg2;
/* Will reset for the following suspend abort cases.
* 1) Only reset dGPU side.
* 2) S3 suspend got aborted and TOS is active.
*/
if (!(adev->flags & AMD_IS_APU) && adev->in_s3 &&
!adev->suspend_complete) {
sol_reg1 = RREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_81);
drm_msleep(100);
sol_reg2 = RREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_81);
return (sol_reg1 != sol_reg2);
}
return false;
}
static int soc21_common_resume(void *handle)
{
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
if (soc21_need_reset_on_resume(adev)) {
dev_info(adev->dev, "S3 suspend aborted, resetting...");
soc21_asic_reset(adev);
}
return soc21_common_hw_init(adev);
}

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@ -1980,6 +1980,7 @@ static int unmap_queues_cpsch(struct device_queue_manager *dqm,
pr_err("HIQ MQD's queue_doorbell_id0 is not 0, Queue preemption time out\n");
while (halt_if_hws_hang)
schedule();
kfd_hws_hang(dqm);
return -ETIME;
}

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@ -6126,19 +6126,16 @@ create_stream_for_sink(struct amdgpu_dm_connector *aconnector,
if (stream->signal == SIGNAL_TYPE_HDMI_TYPE_A)
mod_build_hf_vsif_infopacket(stream, &stream->vsp_infopacket);
if (stream->link->psr_settings.psr_feature_enabled || stream->link->replay_settings.replay_feature_enabled) {
if (stream->signal == SIGNAL_TYPE_DISPLAY_PORT ||
stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST ||
stream->signal == SIGNAL_TYPE_EDP) {
//
// should decide stream support vsc sdp colorimetry capability
// before building vsc info packet
//
stream->use_vsc_sdp_for_colorimetry = false;
if (aconnector->dc_sink->sink_signal == SIGNAL_TYPE_DISPLAY_PORT_MST) {
stream->use_vsc_sdp_for_colorimetry =
aconnector->dc_sink->is_vsc_sdp_colorimetry_supported;
} else {
if (stream->link->dpcd_caps.dprx_feature.bits.VSC_SDP_COLORIMETRY_SUPPORTED)
stream->use_vsc_sdp_for_colorimetry = true;
}
stream->use_vsc_sdp_for_colorimetry = stream->link->dpcd_caps.dpcd_rev.raw >= 0x14 &&
stream->link->dpcd_caps.dprx_feature.bits.VSC_SDP_COLORIMETRY_SUPPORTED;
if (stream->out_transfer_func->tf == TRANSFER_FUNCTION_GAMMA22)
tf = TRANSFER_FUNC_GAMMA_22;
mod_build_vsc_infopacket(stream, &stream->vsc_infopacket, stream->output_color_space, tf);

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@ -99,20 +99,25 @@ static int dcn316_get_active_display_cnt_wa(
return display_count;
}
static void dcn316_disable_otg_wa(struct clk_mgr *clk_mgr_base, struct dc_state *context, bool disable)
static void dcn316_disable_otg_wa(struct clk_mgr *clk_mgr_base, struct dc_state *context,
bool safe_to_lower, bool disable)
{
struct dc *dc = clk_mgr_base->ctx->dc;
int i;
for (i = 0; i < dc->res_pool->pipe_count; ++i) {
struct pipe_ctx *pipe = &dc->current_state->res_ctx.pipe_ctx[i];
struct pipe_ctx *pipe = safe_to_lower
? &context->res_ctx.pipe_ctx[i]
: &dc->current_state->res_ctx.pipe_ctx[i];
if (pipe->top_pipe || pipe->prev_odm_pipe)
continue;
if (pipe->stream && (pipe->stream->dpms_off || pipe->plane_state == NULL ||
dc_is_virtual_signal(pipe->stream->signal))) {
if (pipe->stream && (pipe->stream->dpms_off || dc_is_virtual_signal(pipe->stream->signal) ||
!pipe->stream->link_enc)) {
if (disable) {
pipe->stream_res.tg->funcs->immediate_disable_crtc(pipe->stream_res.tg);
if (pipe->stream_res.tg && pipe->stream_res.tg->funcs->immediate_disable_crtc)
pipe->stream_res.tg->funcs->immediate_disable_crtc(pipe->stream_res.tg);
reset_sync_context_for_pipe(dc, context, i);
} else
pipe->stream_res.tg->funcs->enable_crtc(pipe->stream_res.tg);
@ -207,11 +212,11 @@ static void dcn316_update_clocks(struct clk_mgr *clk_mgr_base,
}
if (should_set_clock(safe_to_lower, new_clocks->dispclk_khz, clk_mgr_base->clks.dispclk_khz)) {
dcn316_disable_otg_wa(clk_mgr_base, context, true);
dcn316_disable_otg_wa(clk_mgr_base, context, safe_to_lower, true);
clk_mgr_base->clks.dispclk_khz = new_clocks->dispclk_khz;
dcn316_smu_set_dispclk(clk_mgr, clk_mgr_base->clks.dispclk_khz);
dcn316_disable_otg_wa(clk_mgr_base, context, false);
dcn316_disable_otg_wa(clk_mgr_base, context, safe_to_lower, false);
update_dispclk = true;
}

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@ -226,8 +226,18 @@ static int smu_v13_0_4_system_features_control(struct smu_context *smu, bool en)
struct amdgpu_device *adev = smu->adev;
int ret = 0;
if (!en && !adev->in_s0ix)
if (!en && !adev->in_s0ix) {
/* Adds a GFX reset as workaround just before sending the
* MP1_UNLOAD message to prevent GC/RLC/PMFW from entering
* an invalid state.
*/
ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_GfxDeviceDriverReset,
SMU_RESET_MODE_2, NULL);
if (ret)
return ret;
ret = smu_cmn_send_smc_msg(smu, SMU_MSG_PrepareMp1ForUnload, NULL);
}
return ret;
}

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@ -777,6 +777,7 @@ int drm_client_modeset_probe(struct drm_client_dev *client, unsigned int width,
unsigned int total_modes_count = 0;
struct drm_client_offset *offsets;
unsigned int connector_count = 0;
/* points to modes protected by mode_config.mutex */
struct drm_display_mode **modes;
struct drm_crtc **crtcs;
int i, ret = 0;
@ -855,7 +856,6 @@ int drm_client_modeset_probe(struct drm_client_dev *client, unsigned int width,
drm_client_pick_crtcs(client, connectors, connector_count,
crtcs, modes, 0, width, height);
}
mutex_unlock(&dev->mode_config.mutex);
drm_client_modeset_release(client);
@ -885,6 +885,7 @@ int drm_client_modeset_probe(struct drm_client_dev *client, unsigned int width,
modeset->y = offset->y;
}
}
mutex_unlock(&dev->mode_config.mutex);
mutex_unlock(&client->modeset_mutex);
out:

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@ -2462,7 +2462,7 @@ intel_set_cdclk_pre_plane_update(struct intel_atomic_state *state)
if (IS_DG2(i915))
intel_cdclk_pcode_pre_notify(state);
if (pipe == INVALID_PIPE ||
if (new_cdclk_state->disable_pipes ||
old_cdclk_state->actual.cdclk <= new_cdclk_state->actual.cdclk) {
drm_WARN_ON(&i915->drm, !new_cdclk_state->base.changed);
@ -2494,7 +2494,7 @@ intel_set_cdclk_post_plane_update(struct intel_atomic_state *state)
if (IS_DG2(i915))
intel_cdclk_pcode_post_notify(state);
if (pipe != INVALID_PIPE &&
if (!new_cdclk_state->disable_pipes &&
old_cdclk_state->actual.cdclk > new_cdclk_state->actual.cdclk) {
drm_WARN_ON(&i915->drm, !new_cdclk_state->base.changed);
@ -2946,6 +2946,7 @@ static struct intel_global_state *intel_cdclk_duplicate_state(struct intel_globa
return NULL;
cdclk_state->pipe = INVALID_PIPE;
cdclk_state->disable_pipes = false;
return &cdclk_state->base;
}
@ -3124,6 +3125,8 @@ int intel_modeset_calc_cdclk(struct intel_atomic_state *state)
if (ret)
return ret;
new_cdclk_state->disable_pipes = true;
drm_dbg_kms(&dev_priv->drm,
"Modeset required for cdclk change\n");
}

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@ -51,6 +51,9 @@ struct intel_cdclk_state {
/* bitmask of active pipes */
u8 active_pipes;
/* update cdclk with pipes disabled */
bool disable_pipes;
};
int intel_crtc_compute_min_cdclk(const struct intel_crtc_state *crtc_state);

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@ -4111,7 +4111,12 @@ static bool m_n_equal(const struct intel_link_m_n *m_n_1,
static bool crtcs_port_sync_compatible(const struct intel_crtc_state *crtc_state1,
const struct intel_crtc_state *crtc_state2)
{
/*
* FIXME the modeset sequence is currently wrong and
* can't deal with bigjoiner + port sync at the same time.
*/
return crtc_state1->hw.active && crtc_state2->hw.active &&
!crtc_state1->bigjoiner_pipes && !crtc_state2->bigjoiner_pipes &&
crtc_state1->output_types == crtc_state2->output_types &&
crtc_state1->output_format == crtc_state2->output_format &&
crtc_state1->lane_count == crtc_state2->lane_count &&

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@ -111,6 +111,13 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state,
if (!intel_vrr_is_capable(connector))
return;
/*
* FIXME all joined pipes share the same transcoder.
* Need to account for that during VRR toggle/push/etc.
*/
if (crtc_state->bigjoiner_pipes)
return;
if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE)
return;

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@ -1,4 +1,4 @@
/* $OpenBSD: kern_sig.c,v 1.324 2024/04/10 10:05:26 claudio Exp $ */
/* $OpenBSD: kern_sig.c,v 1.325 2024/04/18 09:06:42 claudio Exp $ */
/* $NetBSD: kern_sig.c,v 1.54 1996/04/22 01:38:32 christos Exp $ */
/*
@ -1443,6 +1443,9 @@ proc_stop(struct proc *p, int sw)
#ifdef MULTIPROCESSOR
SCHED_ASSERT_LOCKED();
#endif
/* do not stop exiting procs */
if (ISSET(p->p_flag, P_WEXIT))
return;
p->p_stat = SSTOP;
atomic_clearbits_int(&pr->ps_flags, PS_WAITED);

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@ -1,4 +1,4 @@
/* $OpenBSD: kern_synch.c,v 1.201 2024/03/30 13:33:20 mpi Exp $ */
/* $OpenBSD: kern_synch.c,v 1.202 2024/04/18 08:59:38 claudio Exp $ */
/* $NetBSD: kern_synch.c,v 1.37 1996/04/22 01:38:37 christos Exp $ */
/*
@ -342,6 +342,9 @@ sleep_setup(const volatile void *ident, int prio, const char *wmesg)
if (p->p_stat != SONPROC)
panic("tsleep: not SONPROC");
#endif
/* exiting processes are not allowed to catch signals */
if (p->p_flag & P_WEXIT)
CLR(prio, PCATCH);
SCHED_LOCK(s);

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@ -1,4 +1,4 @@
/* $OpenBSD: proc.h,v 1.359 2024/04/10 10:05:26 claudio Exp $ */
/* $OpenBSD: proc.h,v 1.360 2024/04/18 10:29:39 claudio Exp $ */
/* $NetBSD: proc.h,v 1.44 1996/04/22 01:23:21 christos Exp $ */
/*-
@ -604,9 +604,7 @@ struct cond {
#define COND_INITIALIZER() { .c_wait = 1 }
#if defined(MULTIPROCESSOR)
void proc_trampoline_mp(void); /* XXX */
#endif
void proc_trampoline_mi(void);
/*
* functions to handle sets of cpus.