151 lines
3.6 KiB
C
151 lines
3.6 KiB
C
/* $OpenBSD: qlwvar.h,v 1.11 2020/07/22 13:16:04 krw Exp $ */
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/*
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* Copyright (c) 2013, 2014 Jonathan Matthew <jmatthew@openbsd.org>
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* Copyright (c) 2014 Mark Kettenis <kettenis@openbsd.org>
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*
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* Permission to use, copy, modify, and distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#include <sys/task.h>
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#define QLW_MAX_TARGETS 16
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#define QLW_MAX_LUNS 8
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/* maximum number of segments allowed for in a single io */
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#define QLW_MAX_SEGS 16
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struct qlw_softc;
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enum qlw_isp_gen {
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QLW_GEN_ISP1000 = 1,
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QLW_GEN_ISP1040,
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QLW_GEN_ISP1080,
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QLW_GEN_ISP12160,
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};
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enum qlw_isp_type {
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QLW_ISP1000 = 1,
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QLW_ISP1020,
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QLW_ISP1020A,
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QLW_ISP1040,
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QLW_ISP1040A,
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QLW_ISP1040B,
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QLW_ISP1040C,
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QLW_ISP1240,
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QLW_ISP1080,
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QLW_ISP1280,
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QLW_ISP10160,
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QLW_ISP12160,
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};
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/* request/response queue stuff */
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#define QLW_QUEUE_ENTRY_SIZE 64
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struct qlw_ccb {
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struct qlw_softc *ccb_sc;
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int ccb_id;
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struct scsi_xfer *ccb_xs;
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bus_dmamap_t ccb_dmamap;
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SIMPLEQ_ENTRY(qlw_ccb) ccb_link;
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};
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SIMPLEQ_HEAD(qlw_ccb_list, qlw_ccb);
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struct qlw_dmamem {
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bus_dmamap_t qdm_map;
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bus_dma_segment_t qdm_seg;
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size_t qdm_size;
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caddr_t qdm_kva;
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};
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#define QLW_DMA_MAP(_qdm) ((_qdm)->qdm_map)
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#define QLW_DMA_LEN(_qdm) ((_qdm)->qdm_size)
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#define QLW_DMA_DVA(_qdm) ((u_int64_t)(_qdm)->qdm_map->dm_segs[0].ds_addr)
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#define QLW_DMA_KVA(_qdm) ((void *)(_qdm)->qdm_kva)
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struct qlw_target {
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u_int16_t qt_params;
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u_int8_t qt_exec_throttle;
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u_int8_t qt_sync_period;
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u_int8_t qt_sync_offset;
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};
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struct qlw_softc {
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struct device sc_dev;
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int sc_flags;
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#define QLW_FLAG_INITIATOR 0x0001
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bus_space_tag_t sc_iot;
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bus_space_handle_t sc_ioh;
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bus_size_t sc_ios;
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bus_dma_tag_t sc_dmat;
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struct scsibus_softc *sc_scsibus[2];
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int sc_running;
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enum qlw_isp_type sc_isp_type;
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enum qlw_isp_gen sc_isp_gen;
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const u_int16_t *sc_firmware;
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int sc_numbusses;
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int sc_clock;
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int sc_host_cmd_ctrl;
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int sc_mbox_base;
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u_int16_t sc_mbox[8];
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int sc_mbox_pending;
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int sc_maxrequests;
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struct qlw_dmamem *sc_requests;
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int sc_maxresponses;
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struct qlw_dmamem *sc_responses;
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int sc_maxccbs;
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struct qlw_ccb *sc_ccbs;
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struct qlw_ccb_list sc_ccb_free;
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struct mutex sc_ccb_mtx;
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struct mutex sc_queue_mtx;
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struct scsi_iopool sc_iopool;
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u_int16_t sc_next_req_id;
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u_int16_t sc_last_resp_id;
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int sc_marker_required[2];
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u_int sc_update_required[2];
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struct task sc_update_task;
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struct qlw_nvram sc_nvram;
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int sc_nvram_size;
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int sc_nvram_minversion;
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u_int16_t sc_isp_config;
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u_int16_t sc_fw_features;
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u_int8_t sc_initiator[2];
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u_int8_t sc_retry_count[2];
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u_int8_t sc_retry_delay[2];
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u_int8_t sc_reset_delay[2];
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u_int8_t sc_tag_age_limit[2];
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u_int16_t sc_selection_timeout[2];
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u_int16_t sc_max_queue_depth[2];
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u_int8_t sc_async_data_setup[2];
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u_int8_t sc_req_ack_active_neg[2];
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u_int8_t sc_data_line_active_neg[2];
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struct qlw_target sc_target[2][QLW_MAX_TARGETS];
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};
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#define DEVNAME(_sc) ((_sc)->sc_dev.dv_xname)
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int qlw_attach(struct qlw_softc *);
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int qlw_detach(struct qlw_softc *, int);
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int qlw_intr(void *);
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