118 lines
3.1 KiB
C
118 lines
3.1 KiB
C
/* $OpenBSD: dwqevar.h,v 1.7 2023/10/09 14:25:00 stsp Exp $ */
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/*
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* Copyright (c) 2008, 2019 Mark Kettenis <kettenis@openbsd.org>
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* Copyright (c) 2017, 2022 Patrick Wildt <patrick@blueri.se>
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*
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* Permission to use, copy, modify, and distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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enum dwqe_phy_mode {
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DWQE_PHY_MODE_UNKNOWN,
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DWQE_PHY_MODE_RGMII,
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DWQE_PHY_MODE_RGMII_ID,
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DWQE_PHY_MODE_RGMII_TXID,
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DWQE_PHY_MODE_RGMII_RXID,
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};
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struct dwqe_buf {
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bus_dmamap_t tb_map;
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struct mbuf *tb_m;
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};
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#define DWQE_NTXDESC 256
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#define DWQE_NTXSEGS 16
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#define DWQE_NRXDESC 256
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struct dwqe_dmamem {
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bus_dmamap_t tdm_map;
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bus_dma_segment_t tdm_seg;
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size_t tdm_size;
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caddr_t tdm_kva;
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};
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#define DWQE_DMA_MAP(_tdm) ((_tdm)->tdm_map)
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#define DWQE_DMA_LEN(_tdm) ((_tdm)->tdm_size)
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#define DWQE_DMA_DVA(_tdm) ((_tdm)->tdm_map->dm_segs[0].ds_addr)
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#define DWQE_DMA_KVA(_tdm) ((void *)(_tdm)->tdm_kva)
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struct dwqe_softc {
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struct device sc_dev;
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int sc_node;
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bus_space_tag_t sc_iot;
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bus_space_handle_t sc_ioh;
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bus_dma_tag_t sc_dmat;
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void *sc_ih;
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struct arpcom sc_ac;
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#define sc_lladdr sc_ac.ac_enaddr
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struct mii_data sc_mii;
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#define sc_media sc_mii.mii_media
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int sc_link;
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int sc_phyloc;
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enum dwqe_phy_mode sc_phy_mode;
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struct timeout sc_phy_tick;
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int sc_fixed_link;
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struct dwqe_dmamem *sc_txring;
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struct dwqe_buf *sc_txbuf;
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struct dwqe_desc *sc_txdesc;
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int sc_tx_prod;
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int sc_tx_cons;
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struct dwqe_dmamem *sc_rxring;
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struct dwqe_buf *sc_rxbuf;
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struct dwqe_desc *sc_rxdesc;
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int sc_rx_prod;
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struct if_rxring sc_rx_ring;
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int sc_rx_cons;
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struct timeout sc_rxto;
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struct task sc_statchg_task;
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uint32_t sc_clk;
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bus_size_t sc_clk_sel;
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uint32_t sc_clk_sel_125;
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uint32_t sc_clk_sel_25;
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uint32_t sc_clk_sel_2_5;
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int sc_hw_feature[4];
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int sc_force_thresh_dma_mode;
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int sc_fixed_burst;
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int sc_mixed_burst;
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int sc_aal;
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int sc_8xpbl;
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int sc_pbl;
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int sc_txpbl;
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int sc_rxpbl;
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int sc_axi_config;
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int sc_lpi_en;
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int sc_xit_frm;
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int sc_wr_osr_lmt;
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int sc_rd_osr_lmt;
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uint32_t sc_blen[7];
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};
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#define DEVNAME(_s) ((_s)->sc_dev.dv_xname)
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int dwqe_attach(struct dwqe_softc *);
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void dwqe_reset(struct dwqe_softc *);
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int dwqe_intr(void *);
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uint32_t dwqe_read(struct dwqe_softc *, bus_addr_t);
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void dwqe_write(struct dwqe_softc *, bus_addr_t, uint32_t);
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void dwqe_lladdr_read(struct dwqe_softc *, uint8_t *);
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void dwqe_lladdr_write(struct dwqe_softc *);
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void dwqe_mii_statchg(struct device *);
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