339 lines
8.7 KiB
C
339 lines
8.7 KiB
C
/* $OpenBSD: cpu.h,v 1.66 2024/02/25 19:15:50 cheloha Exp $ */
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/* $NetBSD: cpu.h,v 1.34 2003/06/23 11:01:08 martin Exp $ */
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/*
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* Copyright (c) 1994-1996 Mark Brinicombe.
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* Copyright (c) 1994 Brini.
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* All rights reserved.
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*
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* This code is derived from software written for Brini by Mark Brinicombe
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Brini.
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* 4. The name of the company nor the name of the author may be used to
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* endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* RiscBSD kernel project
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*
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* cpu.h
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*
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* CPU specific symbols
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*
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* Created : 18/09/94
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*
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* Based on kate/katelib/arm6.h
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*/
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#ifndef _ARM_CPU_H_
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#define _ARM_CPU_H_
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/*
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* User-visible definitions
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*/
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/* CTL_MACHDEP definitions. */
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/* 1 formerly int: CPU_DEBUG */
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/* 2 formerly string: CPU_BOOTED_DEVICE */
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/* 3 formerly string: CPU_BOOTED_KERNEL */
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#define CPU_CONSDEV 4 /* struct: dev_t of our console */
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#define CPU_POWERSAVE 5 /* int: use CPU powersave mode */
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#define CPU_ALLOWAPERTURE 6 /* int: allow mmap of /dev/xf86 */
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/* 7 formerly int: apmwarn */
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/* 8 formerly int: keyboard reset */
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/* 9 formerly int: CPU_ZTSRAWMODE */
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/* 10 formerly struct: CPU_ZTSSCALE */
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#define CPU_MAXSPEED 11 /* int: number of valid machdep ids */
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/* 12 formerly int: CPU_LIDSUSPEND */
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#define CPU_LIDACTION 13 /* action caused by lid close */
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#define CPU_COMPATIBLE 14 /* compatible property */
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#define CPU_MAXID 15 /* number of valid machdep ids */
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#define CTL_MACHDEP_NAMES { \
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{ 0, 0 }, \
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{ 0, 0 }, \
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{ 0, 0 }, \
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{ 0, 0 }, \
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{ "console_device", CTLTYPE_STRUCT }, \
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{ "powersave", CTLTYPE_INT }, \
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{ "allowaperture", CTLTYPE_INT }, \
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{ 0, 0 }, \
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{ 0, 0 }, \
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{ 0, 0 }, \
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{ 0, 0 }, \
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{ "maxspeed", CTLTYPE_INT }, \
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{ 0, 0 }, \
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{ "lidaction", CTLTYPE_INT }, \
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{ "compatible", CTLTYPE_STRING }, \
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}
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#ifdef _KERNEL
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/*
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* Kernel-only definitions
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*/
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#include <arm/cpuconf.h>
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#include <machine/intr.h>
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#include <machine/frame.h>
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#include <machine/pcb.h>
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#include <arm/armreg.h>
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/* 1 == use cpu_sleep(), 0 == don't */
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extern int cpu_do_powersave;
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/* All the CLKF_* macros take a struct clockframe * as an argument. */
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/*
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* CLKF_USERMODE: Return TRUE/FALSE (1/0) depending on whether the
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* frame came from USR mode or not.
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*/
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#define CLKF_USERMODE(frame) ((frame->if_spsr & PSR_MODE) == PSR_USR32_MODE)
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/*
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* CLKF_INTR: True if we took the interrupt from inside another
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* interrupt handler.
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*/
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#define CLKF_INTR(frame) (curcpu()->ci_idepth > 1)
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/*
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* CLKF_PC: Extract the program counter from a clockframe
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*/
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#define CLKF_PC(frame) (frame->if_pc)
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/*
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* PROC_PC: Find out the program counter for the given process.
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*/
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#define PROC_PC(p) ((p)->p_addr->u_pcb.pcb_tf->tf_pc)
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#define PROC_STACK(p) ((p)->p_addr->u_pcb.pcb_tf->tf_usr_sp)
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/* The address of the vector page. */
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extern vaddr_t vector_page;
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void arm32_vector_init(vaddr_t, int);
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#define ARM_VEC_RESET (1 << 0)
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#define ARM_VEC_UNDEFINED (1 << 1)
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#define ARM_VEC_SWI (1 << 2)
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#define ARM_VEC_PREFETCH_ABORT (1 << 3)
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#define ARM_VEC_DATA_ABORT (1 << 4)
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#define ARM_VEC_ADDRESS_EXCEPTION (1 << 5)
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#define ARM_VEC_IRQ (1 << 6)
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#define ARM_VEC_FIQ (1 << 7)
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#define ARM_NVEC 8
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#define ARM_VEC_ALL 0xffffffff
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/*
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* Per-CPU information. For now we assume one CPU.
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*/
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#include <sys/clockintr.h>
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#include <sys/device.h>
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#include <sys/sched.h>
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#include <sys/srp.h>
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struct cpu_info {
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struct device *ci_dev; /* Device corresponding to this CPU */
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struct cpu_info *ci_next;
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struct schedstate_percpu ci_schedstate; /* scheduler state */
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u_int32_t ci_cpuid;
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uint64_t ci_mpidr;
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int ci_node;
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struct cpu_info *ci_self;
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struct proc *ci_curproc;
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struct proc *ci_fpuproc;
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u_int32_t ci_randseed;
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struct pcb *ci_curpcb;
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struct pcb *ci_idle_pcb;
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uint32_t ci_cpl;
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uint32_t ci_ipending;
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uint32_t ci_idepth;
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#ifdef DIAGNOSTIC
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int ci_mutex_level;
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#endif
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int ci_want_resched;
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void (*ci_flush_bp)(void);
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struct opp_table *ci_opp_table;
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volatile int ci_opp_idx;
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volatile int ci_opp_max;
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uint32_t ci_cpu_supply;
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#ifdef MULTIPROCESSOR
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struct srp_hazard ci_srp_hazards[SRP_HAZARD_NUM];
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volatile int ci_flags;
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uint32_t ci_ttbr0;
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vaddr_t ci_pl1_stkend;
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vaddr_t ci_irq_stkend;
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vaddr_t ci_abt_stkend;
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vaddr_t ci_und_stkend;
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#endif
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#ifdef GPROF
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struct gmonparam *ci_gmon;
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struct clockintr ci_gmonclock;
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#endif
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struct clockqueue ci_queue;
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char ci_panicbuf[512];
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};
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#define CPUF_PRIMARY (1<<0)
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#define CPUF_AP (1<<1)
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#define CPUF_IDENTIFY (1<<2)
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#define CPUF_IDENTIFIED (1<<3)
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#define CPUF_PRESENT (1<<4)
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#define CPUF_GO (1<<5)
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#define CPUF_RUNNING (1<<6)
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static inline struct cpu_info *
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curcpu(void)
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{
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struct cpu_info *__ci;
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__asm volatile("mrc p15, 0, %0, c13, c0, 4" : "=r" (__ci));
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return (__ci);
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}
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extern struct cpu_info cpu_info_primary;
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extern struct cpu_info *cpu_info_list;
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#ifndef MULTIPROCESSOR
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#define cpu_number() 0
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#define CPU_IS_PRIMARY(ci) 1
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#define CPU_IS_RUNNING(ci) 1
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#define CPU_INFO_ITERATOR int
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#define CPU_INFO_FOREACH(cii, ci) \
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for (cii = 0, ci = curcpu(); ci != NULL; ci = NULL)
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#define CPU_INFO_UNIT(ci) 0
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#define MAXCPUS 1
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#define cpu_kick(ci)
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#define cpu_unidle(ci)
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#else
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#define cpu_number() (curcpu()->ci_cpuid)
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#define CPU_IS_PRIMARY(ci) ((ci) == &cpu_info_primary)
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#define CPU_IS_RUNNING(ci) ((ci)->ci_flags & CPUF_RUNNING)
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#define CPU_INFO_ITERATOR int
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#define CPU_INFO_FOREACH(cii, ci) for (cii = 0, ci = cpu_info_list; \
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ci != NULL; ci = ci->ci_next)
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#define CPU_INFO_UNIT(ci) ((ci)->ci_dev ? (ci)->ci_dev->dv_unit : 0)
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#define MAXCPUS 4
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void cpu_kick(struct cpu_info *);
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void cpu_unidle(struct cpu_info *ci);
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extern struct cpu_info *cpu_info[MAXCPUS];
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void cpu_boot_secondary_processors(void);
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#endif /* !MULTIPROCESSOR */
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#define CPU_BUSY_CYCLE() do {} while (0)
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#define curpcb curcpu()->ci_curpcb
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unsigned int cpu_rnd_messybits(void);
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/*
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* Scheduling glue
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*/
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extern int astpending;
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#define setsoftast() (astpending = 1)
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/*
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* Notify the current process (p) that it has a signal pending,
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* process as soon as possible.
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*/
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#define signotify(p) setsoftast()
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/*
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* Preempt the current process if in interrupt from user mode,
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* or after the current trap/syscall if in system mode.
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*/
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extern int want_resched; /* resched() was called */
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#define need_resched(ci) (want_resched = 1, setsoftast())
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#define clear_resched(ci) want_resched = 0
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/*
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* Give a profiling tick to the current process when the user profiling
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* buffer pages are invalid. On the i386, request an ast to send us
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* through trap(), marking the proc as needing a profiling tick.
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*/
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#define need_proftick(p) setsoftast()
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/*
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* cpu device glue (belongs in cpuvar.h)
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*/
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int cpu_alloc_idle_pcb(struct cpu_info *);
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/*
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* Random cruft
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*/
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/* cpuswitch.S */
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struct pcb;
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void savectx (struct pcb *pcb);
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/* machdep.h */
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void bootsync (int);
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/* fault.c */
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int badaddr_read (void *, size_t, void *);
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/* syscall.c */
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void swi_handler (trapframe_t *);
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/* machine_machdep.c */
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void board_startup(void);
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static inline u_long
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intr_disable(void)
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{
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uint32_t cpsr;
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__asm volatile ("mrs %0, cpsr" : "=r"(cpsr));
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__asm volatile ("msr cpsr_c, %0" :: "r"(cpsr | PSR_I));
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return cpsr;
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}
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static inline void
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intr_restore(u_long cpsr)
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{
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__asm volatile ("msr cpsr_c, %0" :: "r"(cpsr));
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}
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#endif /* _KERNEL */
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#ifdef MULTIPROCESSOR
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#include <sys/mplock.h>
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#endif /* MULTIPROCESSOR */
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#endif /* !_ARM_CPU_H_ */
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