303 lines
8.1 KiB
C
303 lines
8.1 KiB
C
/*
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* Copyright 2014 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#include <stdlib.h>
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#include <string.h>
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#include <errno.h>
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#include "amdgpu.h"
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#include "amdgpu_drm.h"
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#include "amdgpu_internal.h"
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#include "util_math.h"
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drm_public int amdgpu_va_range_query(amdgpu_device_handle dev,
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enum amdgpu_gpu_va_range type,
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uint64_t *start, uint64_t *end)
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{
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if (type != amdgpu_gpu_va_range_general)
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return -EINVAL;
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*start = dev->dev_info.virtual_address_offset;
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*end = dev->dev_info.virtual_address_max;
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return 0;
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}
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drm_private void amdgpu_vamgr_init(struct amdgpu_bo_va_mgr *mgr, uint64_t start,
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uint64_t max, uint64_t alignment)
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{
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struct amdgpu_bo_va_hole *n;
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mgr->va_max = max;
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mgr->va_alignment = alignment;
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list_inithead(&mgr->va_holes);
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pthread_mutex_init(&mgr->bo_va_mutex, NULL);
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pthread_mutex_lock(&mgr->bo_va_mutex);
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n = calloc(1, sizeof(struct amdgpu_bo_va_hole));
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n->size = mgr->va_max - start;
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n->offset = start;
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list_add(&n->list, &mgr->va_holes);
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pthread_mutex_unlock(&mgr->bo_va_mutex);
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}
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drm_private void amdgpu_vamgr_deinit(struct amdgpu_bo_va_mgr *mgr)
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{
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struct amdgpu_bo_va_hole *hole, *tmp;
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LIST_FOR_EACH_ENTRY_SAFE(hole, tmp, &mgr->va_holes, list) {
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list_del(&hole->list);
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free(hole);
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}
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pthread_mutex_destroy(&mgr->bo_va_mutex);
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}
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static drm_private int
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amdgpu_vamgr_subtract_hole(struct amdgpu_bo_va_hole *hole, uint64_t start_va,
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uint64_t end_va)
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{
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if (start_va > hole->offset && end_va - hole->offset < hole->size) {
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struct amdgpu_bo_va_hole *n = calloc(1, sizeof(struct amdgpu_bo_va_hole));
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if (!n)
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return -ENOMEM;
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n->size = start_va - hole->offset;
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n->offset = hole->offset;
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list_add(&n->list, &hole->list);
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hole->size -= (end_va - hole->offset);
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hole->offset = end_va;
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} else if (start_va > hole->offset) {
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hole->size = start_va - hole->offset;
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} else if (end_va - hole->offset < hole->size) {
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hole->size -= (end_va - hole->offset);
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hole->offset = end_va;
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} else {
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list_del(&hole->list);
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free(hole);
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}
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return 0;
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}
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static drm_private int
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amdgpu_vamgr_find_va(struct amdgpu_bo_va_mgr *mgr, uint64_t size,
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uint64_t alignment, uint64_t base_required,
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bool search_from_top, uint64_t *va_out)
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{
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struct amdgpu_bo_va_hole *hole, *n;
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uint64_t offset = 0;
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int ret;
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alignment = MAX2(alignment, mgr->va_alignment);
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size = ALIGN(size, mgr->va_alignment);
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if (base_required % alignment)
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return -EINVAL;
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pthread_mutex_lock(&mgr->bo_va_mutex);
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if (!search_from_top) {
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LIST_FOR_EACH_ENTRY_SAFE_REV(hole, n, &mgr->va_holes, list) {
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if (base_required) {
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if (hole->offset > base_required ||
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(hole->offset + hole->size) < (base_required + size))
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continue;
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offset = base_required;
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} else {
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uint64_t waste = hole->offset % alignment;
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waste = waste ? alignment - waste : 0;
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offset = hole->offset + waste;
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if (offset >= (hole->offset + hole->size) ||
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size > (hole->offset + hole->size) - offset) {
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continue;
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}
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}
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ret = amdgpu_vamgr_subtract_hole(hole, offset, offset + size);
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pthread_mutex_unlock(&mgr->bo_va_mutex);
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*va_out = offset;
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return ret;
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}
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} else {
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LIST_FOR_EACH_ENTRY_SAFE(hole, n, &mgr->va_holes, list) {
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if (base_required) {
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if (hole->offset > base_required ||
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(hole->offset + hole->size) < (base_required + size))
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continue;
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offset = base_required;
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} else {
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if (size > hole->size)
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continue;
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offset = hole->offset + hole->size - size;
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offset -= offset % alignment;
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if (offset < hole->offset) {
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continue;
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}
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}
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ret = amdgpu_vamgr_subtract_hole(hole, offset, offset + size);
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pthread_mutex_unlock(&mgr->bo_va_mutex);
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*va_out = offset;
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return ret;
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}
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}
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pthread_mutex_unlock(&mgr->bo_va_mutex);
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return -ENOMEM;
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}
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static drm_private void
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amdgpu_vamgr_free_va(struct amdgpu_bo_va_mgr *mgr, uint64_t va, uint64_t size)
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{
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struct amdgpu_bo_va_hole *hole, *next;
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if (va == AMDGPU_INVALID_VA_ADDRESS)
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return;
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size = ALIGN(size, mgr->va_alignment);
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pthread_mutex_lock(&mgr->bo_va_mutex);
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hole = container_of(&mgr->va_holes, hole, list);
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LIST_FOR_EACH_ENTRY(next, &mgr->va_holes, list) {
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if (next->offset < va)
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break;
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hole = next;
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}
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if (&hole->list != &mgr->va_holes) {
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/* Grow upper hole if it's adjacent */
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if (hole->offset == (va + size)) {
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hole->offset = va;
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hole->size += size;
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/* Merge lower hole if it's adjacent */
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if (next != hole &&
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&next->list != &mgr->va_holes &&
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(next->offset + next->size) == va) {
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next->size += hole->size;
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list_del(&hole->list);
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free(hole);
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}
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goto out;
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}
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}
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/* Grow lower hole if it's adjacent */
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if (next != hole && &next->list != &mgr->va_holes &&
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(next->offset + next->size) == va) {
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next->size += size;
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goto out;
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}
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/* FIXME on allocation failure we just lose virtual address space
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* maybe print a warning
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*/
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next = calloc(1, sizeof(struct amdgpu_bo_va_hole));
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if (next) {
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next->size = size;
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next->offset = va;
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list_add(&next->list, &hole->list);
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}
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out:
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pthread_mutex_unlock(&mgr->bo_va_mutex);
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}
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drm_public int amdgpu_va_range_alloc(amdgpu_device_handle dev,
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enum amdgpu_gpu_va_range va_range_type,
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uint64_t size,
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uint64_t va_base_alignment,
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uint64_t va_base_required,
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uint64_t *va_base_allocated,
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amdgpu_va_handle *va_range_handle,
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uint64_t flags)
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{
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struct amdgpu_bo_va_mgr *vamgr;
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bool search_from_top = !!(flags & AMDGPU_VA_RANGE_REPLAYABLE);
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int ret;
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/* Clear the flag when the high VA manager is not initialized */
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if (flags & AMDGPU_VA_RANGE_HIGH && !dev->vamgr_high_32.va_max)
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flags &= ~AMDGPU_VA_RANGE_HIGH;
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if (flags & AMDGPU_VA_RANGE_HIGH) {
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if (flags & AMDGPU_VA_RANGE_32_BIT)
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vamgr = &dev->vamgr_high_32;
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else
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vamgr = &dev->vamgr_high;
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} else {
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if (flags & AMDGPU_VA_RANGE_32_BIT)
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vamgr = &dev->vamgr_32;
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else
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vamgr = &dev->vamgr;
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}
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va_base_alignment = MAX2(va_base_alignment, vamgr->va_alignment);
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size = ALIGN(size, vamgr->va_alignment);
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ret = amdgpu_vamgr_find_va(vamgr, size,
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va_base_alignment, va_base_required,
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search_from_top, va_base_allocated);
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if (!(flags & AMDGPU_VA_RANGE_32_BIT) && ret) {
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/* fallback to 32bit address */
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if (flags & AMDGPU_VA_RANGE_HIGH)
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vamgr = &dev->vamgr_high_32;
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else
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vamgr = &dev->vamgr_32;
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ret = amdgpu_vamgr_find_va(vamgr, size,
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va_base_alignment, va_base_required,
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search_from_top, va_base_allocated);
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}
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if (!ret) {
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struct amdgpu_va* va;
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va = calloc(1, sizeof(struct amdgpu_va));
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if(!va){
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amdgpu_vamgr_free_va(vamgr, *va_base_allocated, size);
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return -ENOMEM;
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}
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va->address = *va_base_allocated;
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va->size = size;
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va->range = va_range_type;
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va->vamgr = vamgr;
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*va_range_handle = va;
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}
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return ret;
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}
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drm_public int amdgpu_va_range_free(amdgpu_va_handle va_range_handle)
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{
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if(!va_range_handle || !va_range_handle->address)
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return 0;
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amdgpu_vamgr_free_va(va_range_handle->vamgr,
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va_range_handle->address,
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va_range_handle->size);
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free(va_range_handle);
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return 0;
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}
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drm_public uint64_t amdgpu_va_get_start_addr(amdgpu_va_handle va_handle)
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{
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return va_handle->address;
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}
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