2016-11-02 17:15:49 +01:00
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/*-
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* Copyright (c) 2012 Andriy Gapon <avg@FreeBSD.org>.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/types.h>
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#include <sys/stat.h>
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#include <sys/mman.h>
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#include <sys/ioctl.h>
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#include <sys/ioccom.h>
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#include <sys/cpuctl.h>
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#include <machine/cpufunc.h>
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#include <machine/specialreg.h>
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#include <assert.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <unistd.h>
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#include <fcntl.h>
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#include <err.h>
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#include "cpucontrol.h"
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#include "amd.h"
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int
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amd10h_probe(int fd)
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{
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char vendor[13];
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cpuctl_cpuid_args_t idargs;
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uint32_t family;
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uint32_t signature;
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int error;
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idargs.level = 0;
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error = ioctl(fd, CPUCTL_CPUID, &idargs);
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if (error < 0) {
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WARN(0, "ioctl()");
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return (1);
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}
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((uint32_t *)vendor)[0] = idargs.data[1];
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((uint32_t *)vendor)[1] = idargs.data[3];
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((uint32_t *)vendor)[2] = idargs.data[2];
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vendor[12] = '\0';
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if (strncmp(vendor, AMD_VENDOR_ID, sizeof(AMD_VENDOR_ID)) != 0)
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return (1);
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idargs.level = 1;
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error = ioctl(fd, CPUCTL_CPUID, &idargs);
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if (error < 0) {
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WARN(0, "ioctl()");
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return (1);
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}
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signature = idargs.data[0];
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family = ((signature >> 8) & 0x0f) + ((signature >> 20) & 0xff);
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if (family < 0x10)
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return (1);
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return (0);
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}
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/*
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* NB: the format of microcode update files is not documented by AMD.
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* It has been reverse engineered from studying Coreboot, illumos and Linux
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* source code.
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*/
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void
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2018-11-14 01:21:49 +01:00
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amd10h_update(const struct ucode_update_params *params)
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2016-11-02 17:15:49 +01:00
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{
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cpuctl_cpuid_args_t idargs;
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cpuctl_msr_args_t msrargs;
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cpuctl_update_args_t args;
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const amd_10h_fw_header_t *fw_header;
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const amd_10h_fw_header_t *selected_fw;
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const equiv_cpu_entry_t *equiv_cpu_table;
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const section_header_t *section_header;
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const container_header_t *container_header;
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const uint8_t *fw_data;
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2018-11-14 01:21:49 +01:00
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const uint8_t *fw_image;
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const char *dev, *path;
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2016-11-02 17:15:49 +01:00
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size_t fw_size;
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size_t selected_size;
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uint32_t revision;
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uint32_t new_rev;
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uint32_t signature;
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uint16_t equiv_id;
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2018-11-14 01:21:49 +01:00
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int devfd;
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2016-11-02 17:15:49 +01:00
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unsigned int i;
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int error;
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2018-11-14 01:21:49 +01:00
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dev = params->dev_path;
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path = params->fw_path;
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devfd = params->devfd;
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fw_image = params->fwimage;
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fw_size = params->fwsize;
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2016-11-02 17:15:49 +01:00
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assert(path);
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assert(dev);
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idargs.level = 1;
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error = ioctl(devfd, CPUCTL_CPUID, &idargs);
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if (error < 0) {
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WARN(0, "ioctl()");
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goto done;
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}
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signature = idargs.data[0];
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2018-07-13 22:56:20 +02:00
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msrargs.msr = MSR_BIOS_SIGN;
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2016-11-02 17:15:49 +01:00
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error = ioctl(devfd, CPUCTL_RDMSR, &msrargs);
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if (error < 0) {
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WARN(0, "ioctl(%s)", dev);
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goto done;
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}
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revision = (uint32_t)msrargs.data;
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WARNX(1, "found cpu family %#x model %#x "
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"stepping %#x extfamily %#x extmodel %#x.",
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2018-06-12 20:58:56 +02:00
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((signature >> 8) & 0x0f) + ((signature >> 20) & 0xff),
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(signature >> 4) & 0x0f,
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2016-11-02 17:15:49 +01:00
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(signature >> 0) & 0x0f, (signature >> 20) & 0xff,
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(signature >> 16) & 0x0f);
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WARNX(1, "microcode revision %#x", revision);
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/*
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* Open the firmware file.
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*/
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2018-06-12 20:58:56 +02:00
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WARNX(1, "checking %s for update.", path);
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2018-11-14 01:21:49 +01:00
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if (fw_size <
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2016-11-02 17:15:49 +01:00
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(sizeof(*container_header) + sizeof(*section_header))) {
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WARNX(2, "file too short: %s", path);
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goto done;
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}
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/*
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* mmap the whole image.
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*/
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fw_data = fw_image;
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container_header = (const container_header_t *)fw_data;
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if (container_header->magic != AMD_10H_MAGIC) {
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WARNX(2, "%s is not a valid amd firmware: bad magic", path);
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goto done;
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}
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fw_data += sizeof(*container_header);
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fw_size -= sizeof(*container_header);
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section_header = (const section_header_t *)fw_data;
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if (section_header->type != AMD_10H_EQUIV_TABLE_TYPE) {
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WARNX(2, "%s is not a valid amd firmware: "
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"first section is not CPU equivalence table", path);
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goto done;
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}
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if (section_header->size == 0) {
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WARNX(2, "%s is not a valid amd firmware: "
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"first section is empty", path);
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goto done;
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}
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fw_data += sizeof(*section_header);
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fw_size -= sizeof(*section_header);
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if (section_header->size > fw_size) {
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WARNX(2, "%s is not a valid amd firmware: "
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"file is truncated", path);
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goto done;
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}
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if (section_header->size < sizeof(*equiv_cpu_table)) {
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WARNX(2, "%s is not a valid amd firmware: "
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"first section is too short", path);
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goto done;
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}
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equiv_cpu_table = (const equiv_cpu_entry_t *)fw_data;
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fw_data += section_header->size;
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fw_size -= section_header->size;
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equiv_id = 0;
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for (i = 0; equiv_cpu_table[i].installed_cpu != 0; i++) {
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if (signature == equiv_cpu_table[i].installed_cpu) {
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equiv_id = equiv_cpu_table[i].equiv_cpu;
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2018-06-12 20:58:56 +02:00
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WARNX(3, "equiv_id: %x, signature %8x,"
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" equiv_cpu_table[%d] %8x", equiv_id, signature,
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i, equiv_cpu_table[i].installed_cpu);
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2016-11-02 17:15:49 +01:00
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break;
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}
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}
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if (equiv_id == 0) {
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WARNX(2, "CPU is not found in the equivalence table");
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goto done;
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}
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selected_fw = NULL;
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selected_size = 0;
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while (fw_size >= sizeof(*section_header)) {
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section_header = (const section_header_t *)fw_data;
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fw_data += sizeof(*section_header);
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fw_size -= sizeof(*section_header);
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if (section_header->type != AMD_10H_uCODE_TYPE) {
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WARNX(2, "%s is not a valid amd firmware: "
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"section has incorret type", path);
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goto done;
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}
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if (section_header->size > fw_size) {
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WARNX(2, "%s is not a valid amd firmware: "
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"file is truncated", path);
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goto done;
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}
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if (section_header->size < sizeof(*fw_header)) {
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WARNX(2, "%s is not a valid amd firmware: "
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"section is too short", path);
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goto done;
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}
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fw_header = (const amd_10h_fw_header_t *)fw_data;
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fw_data += section_header->size;
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fw_size -= section_header->size;
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2018-06-12 20:58:56 +02:00
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if (fw_header->processor_rev_id != equiv_id) {
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2018-09-11 19:09:16 +02:00
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WARNX(1, "firmware processor_rev_id %x, equiv_id %x",
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2018-06-12 20:58:56 +02:00
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fw_header->processor_rev_id, equiv_id);
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2016-11-02 17:15:49 +01:00
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continue; /* different cpu */
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2018-06-12 20:58:56 +02:00
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}
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if (fw_header->patch_id <= revision) {
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WARNX(1, "patch_id %x, revision %x",
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fw_header->patch_id, revision);
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2016-11-02 17:15:49 +01:00
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continue; /* not newer revision */
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2018-06-12 20:58:56 +02:00
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}
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2016-11-02 17:15:49 +01:00
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if (fw_header->nb_dev_id != 0 || fw_header->sb_dev_id != 0) {
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WARNX(2, "Chipset-specific microcode is not supported");
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}
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WARNX(3, "selecting revision: %x", fw_header->patch_id);
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revision = fw_header->patch_id;
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selected_fw = fw_header;
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selected_size = section_header->size;
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}
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if (fw_size != 0) {
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WARNX(2, "%s is not a valid amd firmware: "
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"file is truncated", path);
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goto done;
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}
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if (selected_fw != NULL) {
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WARNX(1, "selected ucode size is %zu", selected_size);
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fprintf(stderr, "%s: updating cpu %s to revision %#x... ",
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path, dev, revision);
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args.data = __DECONST(void *, selected_fw);
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args.size = selected_size;
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error = ioctl(devfd, CPUCTL_UPDATE, &args);
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if (error < 0) {
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fprintf(stderr, "failed.\n");
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warn("ioctl()");
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goto done;
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}
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fprintf(stderr, "done.\n");
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}
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2018-07-13 22:56:20 +02:00
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msrargs.msr = MSR_BIOS_SIGN;
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2016-11-02 17:15:49 +01:00
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error = ioctl(devfd, CPUCTL_RDMSR, &msrargs);
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if (error < 0) {
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WARN(0, "ioctl(%s)", dev);
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goto done;
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}
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new_rev = (uint32_t)msrargs.data;
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if (new_rev != revision)
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WARNX(0, "revision after update %#x", new_rev);
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done:
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return;
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}
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