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Allow timer0 to run at full 24MHz not at 24MHz/16 by setting prescale to 1.

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Approved by:    stas (mentor)
This commit is contained in:
Ganbold Tsagaankhuu 2014-10-02 06:00:55 +00:00
parent 478e052062
commit 0434c163cc
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=272397
1 changed files with 1 additions and 1 deletions
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2
sys/arm/allwinner/timer.c
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@ -72,7 +72,7 @@ __FBSDID("$FreeBSD$");
#define TIMER_ENABLE (1<<0)
#define TIMER_AUTORELOAD (1<<1)
#define TIMER_OSC24M (1<<2) /* oscillator = 24mhz */
#define TIMER_PRESCALAR (4<<4) /* prescalar = 16 */
#define TIMER_PRESCALAR (0<<4) /* prescalar = 1 */
#define SYS_TIMER_CLKSRC 24000000 /* clock source */