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- Add few VIA bridges to agp_via.c and connect it to amd64 build
as they support Intel Core/Core 2 and VIA Nano processors. - Align "optional agp" in conf/files.* for consistency while I am here.
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Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=187633
@ -135,6 +135,7 @@ dev/acpica/acpi_if.m standard
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dev/agp/agp_amd64.c optional agp
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dev/agp/agp_i810.c optional agp
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dev/agp/agp_intel.c optional agp
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dev/agp/agp_via.c optional agp
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dev/arcmsr/arcmsr.c optional arcmsr pci
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dev/asmc/asmc.c optional asmc isa
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dev/atkbdc/atkbd.c optional atkbd atkbdc
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@ -85,8 +85,14 @@ agp_via_match(device_t dev)
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return ("VIA 3296 (P4M800) host to PCI bridge");
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case 0x03051106:
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return ("VIA 82C8363 (Apollo KT133x/KM133) host to PCI bridge");
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case 0x03141106:
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return ("VIA 3314 (P4M800CE) host to PCI bridge");
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case 0x03241106:
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return ("VIA VT3324 (CX700) host to PCI bridge");
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case 0x03271106:
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return ("VIA 3327 (P4M890) host to PCI bridge");
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case 0x03641106:
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return ("VIA 3364 (P4M900) host to PCI bridge");
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case 0x03911106:
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return ("VIA 8371 (Apollo KX133) host to PCI bridge");
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case 0x05011106:
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@ -168,7 +174,10 @@ agp_via_attach(device_t dev)
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case 0x02591106:
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case 0x02691106:
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case 0x02961106:
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case 0x03141106:
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case 0x03241106:
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case 0x03271106:
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case 0x03641106:
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case 0x31231106:
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case 0x31681106:
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case 0x31891106:
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@ -12,7 +12,7 @@ SRCS+= agp_i810.c agp_intel.c agp_via.c agp_sis.c agp_ali.c agp_amd.c \
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SRCS+= agp_amd64.c
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.endif
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.if ${MACHINE_ARCH} == "amd64"
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SRCS+= agp_amd64.c agp_i810.c
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SRCS+= agp_amd64.c agp_i810.c agp_via.c
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.endif
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SRCS+= device_if.h bus_if.h agp_if.h pci_if.h
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SRCS+= opt_bus.h
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