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Only or in CLRCHN in SXFRCTL0. All other bits in this register are

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initialized by the kernel driver now.
This commit is contained in:
Justin T. Gibbs 1995-10-29 05:56:31 +00:00
parent ac7154f578
commit 1fa2b6b3da
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=11901
1 changed files with 3 additions and 5 deletions
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8
sys/dev/aic7xxx/aic7xxx.seq
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@ -41,7 +41,7 @@
#
##-M#########################################################################
VERSION AIC7XXX_SEQ_VER "$Id: aic7xxx.seq,v 1.21 1995/08/06 05:15:45 gibbs Exp $"
VERSION AIC7XXX_SEQ_VER "$Id: aic7xxx.seq,v 1.22 1995/10/26 23:54:13 gibbs Exp $"
SCBMASK = 0xff
@ -1049,15 +1049,13 @@ initialize_scsiid:
mov SCSIID,SINDEX ret
initialize_for_target:
# Turn on Automatic PIO mode now, before we expect to see a REQ
# from the target. It shouldn't hurt anything to leave it on. Set
# CLRCHN here before the target has entered a data transfer mode -
# Set CLRCHN here before the target has entered a data transfer mode -
# with synchronous SCSI, if you do it later, you blow away some
# data in the SCSI FIFO that the target has already sent to you.
#
clr SIGSTATE
or SXFRCTL0,0x8a # DFON|SPIOEN|CLRCHN
or SXFRCTL0,0x02 # CLRCHN
# Make sure that the system knows we have not been through a DATA
# phase.