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Remove save/restore of PageMask in tlb.c functions introduced in r209243.

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If we save/restore the PageMask, the value set by the bootloader will
persist, and will cause problems later in TLB exception handler.
This caused a crash in AR71xx boards.

Also fixes the EntryHi mask in pte.h

Reported by: Luiz Otavio O Souza <lists.br@gmail.com>
Tested by:   Luiz Otavio O Souza <lists.br@gmail.com>

Approved by:	rrs (mentor)
This commit is contained in:
Jayachandran C. 2010-07-02 12:01:46 +00:00
parent 606c58db25
commit 2972a649c6
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=209645
2 changed files with 7 additions and 16 deletions
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3
sys/mips/include/pte.h
View File

@ -73,7 +73,8 @@
* Note that in FreeBSD, we map 2 TLB pages is equal to 1 VM page.
*/
#define TLBHI_ASID_MASK (0xff)
#define TLBHI_ENTRY(va, asid) (((va) & ~PAGE_MASK) | ((asid) & TLBHI_ASID_MASK))
#define TLBHI_PAGE_MASK (2 * PAGE_SIZE - 1)
#define TLBHI_ENTRY(va, asid) (((va) & ~TLBHI_PAGE_MASK) | ((asid) & TLBHI_ASID_MASK))
#ifndef _LOCORE
typedef uint32_t pt_entry_t;

20
sys/mips/mips/tlb.c
View File

@ -91,13 +91,12 @@ static void tlb_invalidate_one(unsigned);
void
tlb_insert_wired(unsigned i, vm_offset_t va, pt_entry_t pte0, pt_entry_t pte1)
{
register_t mask, asid;
register_t asid;
register_t s;
va &= ~PAGE_MASK;
s = intr_disable();
mask = mips_rd_pagemask();
asid = mips_rd_entryhi() & TLBHI_ASID_MASK;
mips_wr_index(i);
@ -108,21 +107,19 @@ tlb_insert_wired(unsigned i, vm_offset_t va, pt_entry_t pte0, pt_entry_t pte1)
tlb_write_indexed();
mips_wr_entryhi(asid);
mips_wr_pagemask(mask);
intr_restore(s);
}
void
tlb_invalidate_address(struct pmap *pmap, vm_offset_t va)
{
register_t mask, asid;
register_t asid;
register_t s;
int i;
va &= ~PAGE_MASK;
s = intr_disable();
mask = mips_rd_pagemask();
asid = mips_rd_entryhi() & TLBHI_ASID_MASK;
mips_wr_pagemask(0);
@ -133,38 +130,34 @@ tlb_invalidate_address(struct pmap *pmap, vm_offset_t va)
tlb_invalidate_one(i);
mips_wr_entryhi(asid);
mips_wr_pagemask(mask);
intr_restore(s);
}
void
tlb_invalidate_all(void)
{
register_t mask, asid;
register_t asid;
register_t s;
unsigned i;
s = intr_disable();
mask = mips_rd_pagemask();
asid = mips_rd_entryhi() & TLBHI_ASID_MASK;
for (i = mips_rd_wired(); i < num_tlbentries; i++)
tlb_invalidate_one(i);
mips_wr_entryhi(asid);
mips_wr_pagemask(mask);
intr_restore(s);
}
void
tlb_invalidate_all_user(struct pmap *pmap)
{
register_t mask, asid;
register_t asid;
register_t s;
unsigned i;
s = intr_disable();
mask = mips_rd_pagemask();
asid = mips_rd_entryhi() & TLBHI_ASID_MASK;
for (i = mips_rd_wired(); i < num_tlbentries; i++) {
@ -191,7 +184,6 @@ tlb_invalidate_all_user(struct pmap *pmap)
}
mips_wr_entryhi(asid);
mips_wr_pagemask(mask);
intr_restore(s);
}
@ -217,7 +209,7 @@ tlb_save(void)
void
tlb_update(struct pmap *pmap, vm_offset_t va, pt_entry_t pte)
{
register_t mask, asid;
register_t asid;
register_t s;
int i;
@ -225,7 +217,6 @@ tlb_update(struct pmap *pmap, vm_offset_t va, pt_entry_t pte)
pte &= ~TLBLO_SWBITS_MASK;
s = intr_disable();
mask = mips_rd_pagemask();
asid = mips_rd_entryhi() & TLBHI_ASID_MASK;
mips_wr_pagemask(0);
@ -244,7 +235,6 @@ tlb_update(struct pmap *pmap, vm_offset_t va, pt_entry_t pte)
}
mips_wr_entryhi(asid);
mips_wr_pagemask(mask);
intr_restore(s);
}