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asmc: Add support for MacbookPro11,4

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Signed-off-by: Joshua Rogers <Joshua@Joshua.Hu>

MFC after:	2 weeks
Pull Request:	https://github.com/freebsd/freebsd-src/pull/1366
This commit is contained in:
Joshua Rogers 2024-06-11 21:51:51 +02:00 committed by Mark Johnston
parent 04262ed78d
commit 49a5fe1a01
2 changed files with 40 additions and 0 deletions
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6
sys/dev/asmc/asmc.c
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@ -278,6 +278,12 @@ static const struct asmc_model asmc_models[] = {
ASMC_MBP113_TEMPS, ASMC_MBP113_TEMPNAMES, ASMC_MBP113_TEMPDESCS ASMC_MBP113_TEMPS, ASMC_MBP113_TEMPNAMES, ASMC_MBP113_TEMPDESCS
}, },
{
"MacBookPro11,4", "Apple SMC MacBook Pro Retina Core i7 (mid 2015, 15-inch)",
ASMC_SMS_FUNCS_DISABLED, ASMC_FAN_FUNCS, ASMC_LIGHT_FUNCS,
ASMC_MBP114_TEMPS, ASMC_MBP114_TEMPNAMES, ASMC_MBP114_TEMPDESCS
},
/* The Mac Mini has no SMS */ /* The Mac Mini has no SMS */
{ {
"Macmini1,1", "Apple SMC Mac Mini", "Macmini1,1", "Apple SMC Mac Mini",

34
sys/dev/asmc/asmcvar.h
View File

@ -432,6 +432,40 @@ struct asmc_softc {
"TM0S", "TP0P", "TPCD", "TW0P", "Ta0P", \ "TM0S", "TP0P", "TPCD", "TW0P", "Ta0P", \
"TaSP", "Th1H", "Th2H", "Ts0P", "Ts0S", \ "TaSP", "Th1H", "Th2H", "Ts0P", "Ts0S", \
"Ts1S" } "Ts1S" }
#define ASMC_MBP114_TEMPS { "IC0C", "ID0R", "IHDC", "IPBR", "IC0R", \
"IO3R", "IO5R", "IM0C", "IC1C", "IC2C", \
"IC3C", "ILDC", "IBLC", "IAPC", "IHSC", \
"ICMC", "TC0P", "TP0P", "TM0P", \
"Ta0P", "Th2H", "Th1H", "TW0P", "Ts0P", \
"Ts1P", "TB0T", "TB1T", "TB2T", "TH0A", "TH0B", \
"TC1C", "TC2C", "TC3C", "TC4C", "TCXC", \
"TCGC", "TPCD", "TCSA", "VC0C", "VD0R", \
"VP0R", "ALSL", "F0Ac", "F1Ac", "PCPC", \
"PCPG", "PCPT", "PSTR", "PDTR", NULL }
#define ASMC_MBP114_TEMPNAMES { "IC0C", "ID0R", "IHDC", "IPBR", "IC0R", \
"IO3R", "IO5R", "IM0C", "IC1C", "IC2C", \
"IC3C", "ILDC", "IBLC", "IAPC", "IHSC", \
"ICMC", "TC0P", "TP0P", "TM0P", \
"Ta0P", "Th2H", "Th1H", "TW0P", "Ts0P", \
"Ts1P", "TB0T", "TB1T", "TB2T", "TH0A", "TH0B", \
"TC1C", "TC2C", "TC3C", "TC4C", "TCXC", \
"TCGC", "TPCD", "TCSA", "VC0C", "VD0R", \
"VP0R", "ALSL", "F0Ac", "F1Ac", "PCPC", \
"PCPG", "PCPT", "PSTR", "PDTR" }
#define ASMC_MBP114_TEMPDESCS { "CPU High (CPU, I/O)", "DC In", "SSD", "Charger (BMON)", "CPU", \
"Other 3.3V", "Other 5V", "Memory", "Platform Controller Hub Core", "CPU Load Current Monitor", \
"CPU DDR", "LCD Panel", "LCD Backlight", "Airport", "Thunderbolt", \
"S2", "CPU Proximity", "Platform Controller Hub", "Memory Proximity", "Air Flow Proximity", \
"Left Fin Stack", "Right Fin Stack", "Airport Proximity", "Palm Rest", "Palm Rest Actuator", \
"Battery Max", "Battery Sensor 1", "Battery Sensor 2", "SSD A", "SSD B", \
"CPU Core 1", "CPU Core 2", "CPU Core 3", "CPU Core 4", "CPU PECI Die", \
"Intel GPU", "Platform Controller Hub PECI", "CPU System Agent Core", "CPU VCore", "DC In", \
"Pbus", "Ambient Light", "Leftside", "Rightside", "CPU Package Core", \
"CPU Package GPU", "CPU Package Total", "System Total", "DC In" }
#define ASMC_MM_TEMPS { "TN0P", "TN1P", NULL } #define ASMC_MM_TEMPS { "TN0P", "TN1P", NULL }
#define ASMC_MM_TEMPNAMES { "northbridge1", "northbridge2" } #define ASMC_MM_TEMPNAMES { "northbridge1", "northbridge2" }
#define ASMC_MM_TEMPDESCS { "Northbridge Point 1", \ #define ASMC_MM_TEMPDESCS { "Northbridge Point 1", \