Eliminate irq_dispatch.S. Move the data items it contained into arm/intr.c

and the functionality it provided into arm/exception.S.  Rename the main
irq handling routine from arm_handler_execute() to arm_irq_handler() to
make it more congruent with how other exception handlers are named, and
also update its signature to reflect what has long been reality: it is
passed just a trapframe pointer, no interrupt number argument.
This commit is contained in:
Ian Lepore 2014-03-10 18:10:09 +00:00
parent 2efbc4a68d
commit 5e4e1d4995
Notes: svn2git 2020-12-20 02:59:44 +00:00
svn path=/head/; revision=262979
26 changed files with 18 additions and 145 deletions

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@ -7,7 +7,6 @@ arm/arm/cpufunc_asm_armv5.S standard
arm/arm/cpufunc_asm_arm10.S standard
arm/arm/cpufunc_asm_arm11.S standard
arm/arm/cpufunc_asm_armv7.S standard
arm/arm/irq_dispatch.S standard
arm/arm/gic.c standard
arm/allwinner/a20/a20_cpu_cfg.c standard

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@ -7,7 +7,6 @@ arm/arm/cpufunc_asm_armv5.S standard
arm/arm/cpufunc_asm_arm10.S standard
arm/arm/cpufunc_asm_arm11.S standard
arm/arm/cpufunc_asm_armv7.S standard
arm/arm/irq_dispatch.S standard
arm/allwinner/a10_clk.c standard
arm/allwinner/a10_common.c standard

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@ -192,6 +192,16 @@ ASENTRY_NP(exception_exit)
PULLFRAMEFROMSVCANDEXIT
END(exception_exit)
ASENTRY_NP(irq_entry)
sub lr, lr, #0x00000004 /* Adjust the lr */
PUSHFRAMEINSVC /* Push an interrupt frame */
mov r0, sp /* arg for dispatcher */
adr lr, exception_exit
mov r1, #0
b _C_LABEL(arm_irq_handler)
END(irq_entry)
/*
* undefined_entry:
*

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@ -56,12 +56,18 @@ typedef void (*mask_fn)(void *);
static struct intr_event *intr_events[NIRQ];
void arm_handler_execute(struct trapframe *, int);
void arm_irq_handler(struct trapframe *);
void (*arm_post_filter)(void *) = NULL;
int (*arm_config_irq)(int irq, enum intr_trigger trig,
enum intr_polarity pol) = NULL;
/* Data for statistics reporting. */
u_long intrcnt[NIRQ];
char intrnames[NIRQ * INTRNAME_LEN];
size_t sintrcnt = sizeof(intrcnt);
size_t sintrnames = sizeof(intrnames);
/*
* Pre-format intrnames into an array of fixed-size strings containing spaces.
* This allows us to avoid the need for an intermediate table of indices into
@ -127,7 +133,7 @@ dosoftints(void)
}
void
arm_handler_execute(struct trapframe *frame, int irqnb)
arm_irq_handler(struct trapframe *frame)
{
struct intr_event *event;
int i;

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@ -1,120 +0,0 @@
/* $NetBSD: irq_dispatch.S,v 1.5 2003/10/30 08:57:24 scw Exp $ */
/*-
* Copyright (c) 2002 Fujitsu Component Limited
* Copyright (c) 2002 Genetec Corporation
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of The Fujitsu Component Limited nor the name of
* Genetec corporation may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY FUJITSU COMPONENT LIMITED AND GENETEC
* CORPORATION ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL FUJITSU COMPONENT LIMITED OR GENETEC
* CORPORATION BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
*/
/*-
* Copyright (c) 2002, 2003 Wasabi Systems, Inc.
* All rights reserved.
*
* Written by Jason R. Thorpe for Wasabi Systems, Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed for the NetBSD Project by
* Wasabi Systems, Inc.
* 4. The name of Wasabi Systems, Inc. may not be used to endorse
* or promote products derived from this software without specific prior
* written permission.
*
* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include "assym.s"
#include <machine/asm.h>
#include <machine/asmacros.h>
#include <machine/armreg.h>
__FBSDID("$FreeBSD$");
/*
* irq_entry:
* Main entry point for the IRQ vector. This is a generic version
* which can be used by different platforms.
*/
.text
.align 0
.Lcurrent_intr_depth:
.word _C_LABEL(current_intr_depth)
AST_LOCALS
ASENTRY_NP(irq_entry)
sub lr, lr, #0x00000004 /* Adjust the lr */
PUSHFRAMEINSVC /* Push an interrupt frame */
UNWINDSVCFRAME
mov r0, sp /* arg for dispatcher */
mov r1, #0
bl _C_LABEL(arm_handler_execute)
DO_AST
PULLFRAMEFROMSVCANDEXIT
movs pc, lr /* Exit */
END(irq_entry)
.data
.align 0
.global _C_LABEL(intrnames), _C_LABEL(sintrnames)
.global _C_LABEL(intrcnt), _C_LABEL(sintrcnt)
_C_LABEL(intrnames):
.space NIRQ * (MAXCOMLEN + 1)
_C_LABEL(intrcnt):
.space NIRQ * 4
_C_LABEL(sintrnames):
.int NIRQ * (MAXCOMLEN + 1)
_C_LABEL(sintrcnt):
.int NIRQ * 4
.global _C_LABEL(current_intr_depth)
_C_LABEL(current_intr_depth):
.word 0

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@ -1,6 +1,5 @@
# $FreeBSD$
arm/arm/cpufunc_asm_arm9.S standard
arm/arm/irq_dispatch.S standard
arm/at91/at91_machdep.c standard
arm/at91/at91_aic.c standard
arm/at91/at91.c standard

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@ -22,7 +22,6 @@ arm/arm/cpufunc_asm_arm11.S standard
arm/arm/cpufunc_asm_arm11x6.S standard
arm/arm/cpufunc_asm_armv5.S standard
arm/arm/cpufunc_asm_armv6.S standard
arm/arm/irq_dispatch.S standard
kern/kern_clocksource.c standard

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@ -6,7 +6,6 @@ arm/econa/timer.c standard
arm/econa/uart_bus_ec.c optional uart
arm/econa/uart_cpu_ec.c optional uart
dev/uart/uart_dev_ns8250.c optional uart
arm/arm/irq_dispatch.S standard
arm/arm/bus_space_generic.c standard
arm/econa/ehci_ebus.c optional ehci
arm/econa/ohci_ec.c optional ohci

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@ -4,7 +4,6 @@ arm/arm/bus_space_generic.c standard
arm/arm/cpufunc_asm_armv5.S standard
arm/arm/cpufunc_asm_arm11.S standard
arm/arm/cpufunc_asm_armv7.S standard
arm/arm/irq_dispatch.S standard
kern/kern_clocksource.c standard
# Init

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@ -4,7 +4,6 @@ arm/arm/bus_space_generic.c standard
arm/arm/cpufunc_asm_armv5.S standard
arm/arm/cpufunc_asm_arm11.S standard
arm/arm/cpufunc_asm_armv7.S standard
arm/arm/irq_dispatch.S standard
kern/kern_clocksource.c standard
# Init

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@ -8,7 +8,6 @@ arm/arm/bus_space_generic.c standard
arm/arm/cpufunc_asm_arm11.S standard
arm/arm/cpufunc_asm_armv5.S standard
arm/arm/cpufunc_asm_armv7.S standard
arm/arm/irq_dispatch.S standard
kern/kern_clocksource.c standard
#

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@ -8,7 +8,6 @@ arm/arm/cpufunc_asm_armv5.S standard
arm/arm/cpufunc_asm_arm10.S standard
arm/arm/cpufunc_asm_arm11.S standard
arm/arm/cpufunc_asm_armv7.S standard
arm/arm/irq_dispatch.S standard
arm/arm/bus_space-v6.c standard
arm/arm/gic.c standard

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@ -1,6 +1,5 @@
# $FreeBSD$
arm/arm/bus_space_generic.c standard
arm/arm/irq_dispatch.S standard
arm/arm/cpufunc_asm_arm9.S standard
arm/arm/cpufunc_asm_armv5.S standard
arm/lpc/lpc_machdep.c standard

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@ -20,7 +20,6 @@ arm/arm/cpufunc_asm_armv5_ec.S standard
arm/arm/cpufunc_asm_armv7.S standard
arm/arm/cpufunc_asm_sheeva.S standard
arm/arm/cpufunc_asm_pj4b.S standard
arm/arm/irq_dispatch.S standard
arm/mv/bus_space.c standard
arm/mv/gpio.c standard

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@ -7,7 +7,6 @@ arm/arm/cpufunc_asm_armv5.S standard
arm/arm/cpufunc_asm_arm10.S standard
arm/arm/cpufunc_asm_arm11.S standard
arm/arm/cpufunc_asm_armv7.S standard
arm/arm/irq_dispatch.S standard
arm/arm/gic.c standard
arm/arm/mpcore_timer.c standard

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@ -2,7 +2,6 @@
arm/arm/bus_space_asm_generic.S standard
arm/arm/bus_space_generic.c standard
arm/arm/cpufunc_asm_arm9.S standard
arm/arm/irq_dispatch.S standard
arm/s3c2xx0/board_ln2410sbc.c optional board_ln2410sbc
arm/s3c2xx0/s3c24x0_rtc.c standard
arm/s3c2xx0/s3c24x0_machdep.c standard

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@ -8,7 +8,6 @@ arm/arm/cpufunc_asm_armv5.S standard
arm/arm/cpufunc_asm_arm10.S standard
arm/arm/cpufunc_asm_arm11.S standard
arm/arm/cpufunc_asm_armv7.S standard
arm/arm/irq_dispatch.S standard
arm/arm/bus_space-v6.c standard
arm/arm/gic.c standard

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@ -6,7 +6,6 @@ arm/arm/bus_space-v6.c standard
arm/arm/cpufunc_asm_armv5.S standard
arm/arm/cpufunc_asm_arm11.S standard
arm/arm/cpufunc_asm_armv7.S standard
arm/arm/irq_dispatch.S standard
arm/arm/gic.c standard
arm/arm/mpcore_timer.c standard

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@ -9,7 +9,6 @@ arm/arm/cpufunc_asm_armv5.S standard
arm/arm/cpufunc_asm_arm10.S standard
arm/arm/cpufunc_asm_arm11.S standard
arm/arm/cpufunc_asm_armv7.S standard
arm/arm/irq_dispatch.S standard
arm/ti/ti_common.c standard
arm/ti/ti_cpuid.c standard

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@ -6,7 +6,6 @@ arm/arm/cpufunc_asm_arm11.S standard
arm/arm/cpufunc_asm_arm11x6.S standard
arm/arm/cpufunc_asm_armv5.S standard
arm/arm/cpufunc_asm_armv6.S standard
arm/arm/irq_dispatch.S standard
arm/versatile/bus_space.c standard
arm/versatile/pl050.c optional sc

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@ -11,7 +11,6 @@ arm/arm/cpufunc_asm_armv5.S standard
arm/arm/cpufunc_asm_arm10.S standard
arm/arm/cpufunc_asm_arm11.S standard
arm/arm/cpufunc_asm_armv7.S standard
arm/arm/irq_dispatch.S standard
arm/arm/gic.c standard
arm/arm/mpcore_timer.c standard

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@ -4,7 +4,6 @@
#
arm/arm/bus_space_generic.c standard
arm/arm/cpufunc_asm_xscale.S standard
arm/arm/irq_dispatch.S standard
arm/xscale/i80321/i80321.c standard
arm/xscale/i80321/i80321_dma.c optional dma
arm/xscale/i80321/i80321_mcu.c standard

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@ -1,7 +1,6 @@
#$FreeBSD$
arm/arm/bus_space_generic.c standard
arm/arm/cpufunc_asm_xscale.S standard
arm/arm/irq_dispatch.S standard
arm/xscale/i80321/i80321.c standard
arm/xscale/i80321/i80321_aau.c optional aau
arm/xscale/i80321/i80321_dma.c optional dma

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@ -2,7 +2,6 @@
arm/arm/bus_space_generic.c standard
arm/arm/cpufunc_asm_xscale.S standard
arm/arm/cpufunc_asm_xscale_c3.S standard
arm/arm/irq_dispatch.S standard
arm/xscale/i80321/i80321_timer.c standard
arm/xscale/i80321/i80321_wdog.c optional iopwdog
arm/xscale/i8134x/i81342.c standard

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@ -1,7 +1,6 @@
#$FreeBSD$
arm/arm/bus_space_generic.c standard
arm/arm/cpufunc_asm_xscale.S standard
arm/arm/irq_dispatch.S standard
arm/xscale/ixp425/ixp425.c standard
arm/xscale/ixp425/ixp425_mem.c standard
arm/xscale/ixp425/ixp425_space.c standard

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@ -2,7 +2,6 @@
arm/arm/bus_space_generic.c standard
arm/arm/cpufunc_asm_xscale.S standard
arm/arm/irq_dispatch.S standard
arm/xscale/pxa/pxa_gpio.c standard
arm/xscale/pxa/pxa_icu.c standard