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Fixed typo and message format change to avoid line wrapping.

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This commit is contained in:
Stefan Eßer 1994-10-15 23:27:39 +00:00
parent b16d240853
commit 65005ce25c
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=3633
2 changed files with 28 additions and 28 deletions
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28
sys/i386/pci/pcisupport.c
View File

@ -1,6 +1,6 @@
/**************************************************************************
**
** $Id: pcisupport.c,v 1.1 1994/10/12 02:27:08 se Exp $
** $Id: pcisupport.c,v 1.2 1994/10/13 01:12:31 se Exp $
**
** Device driver for INTEL PCI chipsets.
**
@ -149,14 +149,14 @@ struct condmsg conf82424zx[] =
{ 0x55, 0x20, 0x00, M_EQ, "X-2-2-2" },
{ 0x55, 0x20, 0x20, M_EQ, "X-1-2-1" },
{ 0x00, 0x00, 0x00, TRUE, "\n\tPCI: CPU->PCI posting " },
{ 0x53, 0x02, 0x02, M_EQ, "ON" },
{ 0x00, 0x00, 0x00, TRUE, "\n\tCPU->PCI: posting " },
{ 0x53, 0x02, 0x00, M_NE, "ON" },
{ 0x53, 0x02, 0x00, M_EQ, "OFF" },
{ 0x00, 0x00, 0x00, TRUE, ", CPU->PCI burst mode " },
{ 0x54, 0x02, 0x02, M_EQ, "ON" },
{ 0x00, 0x00, 0x00, TRUE, ", burst mode " },
{ 0x54, 0x02, 0x00, M_NE, "ON" },
{ 0x54, 0x02, 0x00, M_EQ, "OFF" },
{ 0x00, 0x00, 0x00, TRUE, ", PCI->Memory posting " },
{ 0x54, 0x01, 0x01, M_EQ, "ON" },
{ 0x00, 0x00, 0x00, TRUE, "\n\tPCI->Memory: posting " },
{ 0x54, 0x01, 0x00, M_NE, "ON" },
{ 0x54, 0x01, 0x00, M_EQ, "OFF" },
{ 0x00, 0x00, 0x00, TRUE, "\n" },
@ -176,8 +176,8 @@ struct condmsg conf82434lx[] =
{ 0x50, 0x04, 0x00, M_EQ, " (primary cache OFF)" },
{ 0x53, 0x01, 0x01, TRUE, ", CPU->Memory posting "},
{ 0x53, 0x01, 0x00, M_EQ, "OFF" },
{ 0x53, 0x01, 0x01, M_NE, "ON" },
{ 0x53, 0x01, 0x01, M_NE, "OFF" },
{ 0x53, 0x01, 0x01, M_EQ, "ON" },
{ 0x53, 0x04, 0x00, M_NE, ", read around write"},
@ -206,18 +206,18 @@ struct condmsg conf82434lx[] =
{ 0x57, 0xc0, 0x80, M_EQ, "???" },
{ 0x57, 0xc0, 0xc0, M_EQ, "X-3-3-3 (50ns)" },
{ 0x00, 0x00, 0x00, TRUE, "\n\tPCI: CPU->PCI posting " },
{ 0x00, 0x00, 0x00, TRUE, "\n\tCPU->PCI: posting " },
{ 0x53, 0x02, 0x02, M_EQ, "ON" },
{ 0x53, 0x02, 0x00, M_EQ, "OFF" },
{ 0x00, 0x00, 0x00, TRUE, ", CPU->PCI burst mode " },
{ 0x00, 0x00, 0x00, TRUE, ", burst mode " },
{ 0x54, 0x02, 0x00, M_NE, "ON" },
{ 0x54, 0x02, 0x00, M_EQ, "OFF" },
{ 0x00, 0x00, 0x00, TRUE, ", PCI->Memory posting " },
{ 0x54, 0x01, 0x00, M_NE, "ON" },
{ 0x54, 0x01, 0x00, M_EQ, "OFF" },
{ 0x54, 0x04, 0x00, TRUE, ", PCI clocks=" },
{ 0x54, 0x04, 0x00, M_EQ, "2-2-2-2" },
{ 0x54, 0x04, 0x00, M_NE, "2-1-1-1" },
{ 0x00, 0x00, 0x00, TRUE, "\n\tPCI->Memory: posting " },
{ 0x54, 0x01, 0x00, M_NE, "ON" },
{ 0x54, 0x01, 0x00, M_EQ, "OFF" },
{ 0x00, 0x00, 0x00, TRUE, "\n" },

28
sys/pci/pcisupport.c
View File

@ -1,6 +1,6 @@
/**************************************************************************
**
** $Id: pcisupport.c,v 1.1 1994/10/12 02:27:08 se Exp $
** $Id: pcisupport.c,v 1.2 1994/10/13 01:12:31 se Exp $
**
** Device driver for INTEL PCI chipsets.
**
@ -149,14 +149,14 @@ struct condmsg conf82424zx[] =
{ 0x55, 0x20, 0x00, M_EQ, "X-2-2-2" },
{ 0x55, 0x20, 0x20, M_EQ, "X-1-2-1" },
{ 0x00, 0x00, 0x00, TRUE, "\n\tPCI: CPU->PCI posting " },
{ 0x53, 0x02, 0x02, M_EQ, "ON" },
{ 0x00, 0x00, 0x00, TRUE, "\n\tCPU->PCI: posting " },
{ 0x53, 0x02, 0x00, M_NE, "ON" },
{ 0x53, 0x02, 0x00, M_EQ, "OFF" },
{ 0x00, 0x00, 0x00, TRUE, ", CPU->PCI burst mode " },
{ 0x54, 0x02, 0x02, M_EQ, "ON" },
{ 0x00, 0x00, 0x00, TRUE, ", burst mode " },
{ 0x54, 0x02, 0x00, M_NE, "ON" },
{ 0x54, 0x02, 0x00, M_EQ, "OFF" },
{ 0x00, 0x00, 0x00, TRUE, ", PCI->Memory posting " },
{ 0x54, 0x01, 0x01, M_EQ, "ON" },
{ 0x00, 0x00, 0x00, TRUE, "\n\tPCI->Memory: posting " },
{ 0x54, 0x01, 0x00, M_NE, "ON" },
{ 0x54, 0x01, 0x00, M_EQ, "OFF" },
{ 0x00, 0x00, 0x00, TRUE, "\n" },
@ -176,8 +176,8 @@ struct condmsg conf82434lx[] =
{ 0x50, 0x04, 0x00, M_EQ, " (primary cache OFF)" },
{ 0x53, 0x01, 0x01, TRUE, ", CPU->Memory posting "},
{ 0x53, 0x01, 0x00, M_EQ, "OFF" },
{ 0x53, 0x01, 0x01, M_NE, "ON" },
{ 0x53, 0x01, 0x01, M_NE, "OFF" },
{ 0x53, 0x01, 0x01, M_EQ, "ON" },
{ 0x53, 0x04, 0x00, M_NE, ", read around write"},
@ -206,18 +206,18 @@ struct condmsg conf82434lx[] =
{ 0x57, 0xc0, 0x80, M_EQ, "???" },
{ 0x57, 0xc0, 0xc0, M_EQ, "X-3-3-3 (50ns)" },
{ 0x00, 0x00, 0x00, TRUE, "\n\tPCI: CPU->PCI posting " },
{ 0x00, 0x00, 0x00, TRUE, "\n\tCPU->PCI: posting " },
{ 0x53, 0x02, 0x02, M_EQ, "ON" },
{ 0x53, 0x02, 0x00, M_EQ, "OFF" },
{ 0x00, 0x00, 0x00, TRUE, ", CPU->PCI burst mode " },
{ 0x00, 0x00, 0x00, TRUE, ", burst mode " },
{ 0x54, 0x02, 0x00, M_NE, "ON" },
{ 0x54, 0x02, 0x00, M_EQ, "OFF" },
{ 0x00, 0x00, 0x00, TRUE, ", PCI->Memory posting " },
{ 0x54, 0x01, 0x00, M_NE, "ON" },
{ 0x54, 0x01, 0x00, M_EQ, "OFF" },
{ 0x54, 0x04, 0x00, TRUE, ", PCI clocks=" },
{ 0x54, 0x04, 0x00, M_EQ, "2-2-2-2" },
{ 0x54, 0x04, 0x00, M_NE, "2-1-1-1" },
{ 0x00, 0x00, 0x00, TRUE, "\n\tPCI->Memory: posting " },
{ 0x54, 0x01, 0x00, M_NE, "ON" },
{ 0x54, 0x01, 0x00, M_EQ, "OFF" },
{ 0x00, 0x00, 0x00, TRUE, "\n" },