mirror of
https://git.hardenedbsd.org/hardenedbsd/HardenedBSD.git
synced 2025-01-10 08:22:27 +01:00
Cleaned up previous commit, mainly by moving repetitive calculations
of invariants to cyattach(). Fixed minor bugs: - cyparam() returned without restoring the ipl in the error cases. This was harmless because cyparam() is always called at spltty(). - one check for "rev. J or higher" actually checked for precisely rev. J.
This commit is contained in:
Bruce Evans
parent
fc64b69498
commit
87543489d0
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=38303
175
sys/dev/cy/cy.c
175
sys/dev/cy/cy.c
@ -27,7 +27,7 @@
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* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $Id: cy.c,v 1.66 1998/08/11 17:01:32 bde Exp $
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* $Id: cy.c,v 1.67 1998/08/13 13:54:10 bde Exp $
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*/
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#include "opt_compat.h"
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@ -233,10 +233,15 @@ struct com_s {
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#if 0
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u_char cfcr_image; /* copy of value written to CFCR */
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u_char fifo_image; /* copy of value written to FIFO */
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#endif
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u_char gfrcr_image; /* copy of value read from GFRCR */
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#if 0
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bool_t hasfifo; /* nonzero for 16550 UARTs */
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bool_t loses_outints; /* nonzero if device loses output interrupts */
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#endif
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u_char mcr_dtr; /* MCR bit that is wired to DTR */
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u_char mcr_image; /* copy of value written to MCR */
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u_char mcr_rts; /* MCR bit that is wired to RTS */
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#if 0
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#ifdef COM_MULTIPORT
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bool_t multiport; /* is this unit part of a multiport device? */
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@ -272,8 +277,8 @@ struct com_s {
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int cy_align; /* index for register alignment */
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cy_addr cy_iobase; /* base address of this port's cyclom */
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int cy_rflow; /* rflow flag */
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cy_addr iobase; /* base address of this port's cd1400 */
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int mcr_rts_reg; /* cd1400 reg number of reg holding mcr_rts */
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struct tty *tp; /* cross reference */
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@ -345,7 +350,8 @@ static int comparam __P((struct tty *tp, struct termios *t));
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static swihand_t siopoll;
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static int sioprobe __P((struct isa_device *dev));
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static void siosettimeout __P((void));
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static int comspeed __P((speed_t speed, long clock, int *prescaler_io));
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static int comspeed __P((speed_t speed, u_long cy_clock,
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int *prescaler_io));
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static void comstart __P((struct tty *tp));
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static timeout_t comwakeup;
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static void disc_optim __P((struct tty *tp, struct termios *t,
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@ -512,6 +518,7 @@ cyattach_common(cy_iobase, cy_align)
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int adapter;
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int cyu;
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dev_t dev;
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u_char firmware_version;
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cy_addr iobase;
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int ncyu;
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int unit;
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@ -535,15 +542,13 @@ cyattach_common(cy_iobase, cy_align)
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iobase = (cy_addr) (cy_iobase
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+ (cy_chip_offset[cyu] << cy_align));
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firmware_version = cd_inb(iobase, CD1400_GFRCR, cy_align);
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/* Set up a receive timeout period of than 1+ ms. */
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if (cd_inb(iobase,CD1400_GFRCR, cy_align) >= CD1400_REV_J) {
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/* CD1400 rev. J or higher */
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cd_outb(iobase, CD1400_PPR, cy_align, CY_CLOCK_60_1MS);
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} else {
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cd_outb(iobase, CD1400_PPR, cy_align, CY_CLOCK_25_1MS);
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}
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cd_outb(iobase, CD1400_PPR, cy_align,
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howmany(CY_CLOCK(firmware_version)
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/ CD1400_PPR_PRESCALER, 1000));
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for (cdu = 0; cdu < CD1400_NO_OF_CHANNELS; ++cdu, ++unit) {
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struct com_s *com;
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int s;
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@ -553,6 +558,16 @@ cyattach_common(cy_iobase, cy_align)
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break;
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bzero(com, sizeof *com);
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com->unit = unit;
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com->gfrcr_image = firmware_version;
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if (CY_RTS_DTR_SWAPPED(firmware_version)) {
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com->mcr_dtr = MCR_RTS;
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com->mcr_rts = MCR_DTR;
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com->mcr_rts_reg = CD1400_MSVR2;
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} else {
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com->mcr_dtr = MCR_DTR;
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com->mcr_rts = MCR_RTS;
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com->mcr_rts_reg = CD1400_MSVR1;
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}
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com->dtr_wait = 3 * hz;
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com->iptr = com->ibuf = com->ibuf1;
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com->ibufend = com->ibuf1 + RS_IBUFSIZE;
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@ -562,13 +577,6 @@ cyattach_common(cy_iobase, cy_align)
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com->cy_align = cy_align;
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com->cy_iobase = cy_iobase;
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if (cd_inb(iobase,CD1400_GFRCR, cy_align) >=
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CD1400_REV_J) {
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/* CD1400 rev. J or higher */
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com->cy_rflow = 1;
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} else {
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com->cy_rflow = 0;
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}
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com->iobase = iobase;
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/*
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@ -1114,24 +1122,16 @@ siointr(unit)
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ioptr[CE_INPUT_OFFSET] = line_status;
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com->iptr = ++ioptr;
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if (ioptr == com->ihighwater
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&& com->state & CS_RTS_IFLOW) {
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&& com->state & CS_RTS_IFLOW)
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#if 0
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outb(com->modem_ctl_port,
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com->mcr_image &= ~MCR_RTS);
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#else
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if (com->cy_rflow) {
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cd_outb(iobase, CD1400_MSVR2,
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cy_align,
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com->mcr_image &=
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~MCR_DTR);
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} else {
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cd_outb(iobase, CD1400_MSVR1,
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cy_align,
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com->mcr_image &=
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~MCR_RTS);
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}
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cd_outb(iobase, com->mcr_rts_reg,
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cy_align,
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com->mcr_image &=
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~com->mcr_rts);
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#endif
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}
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if (line_status & LSR_OE)
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CE_RECORD(com, CE_OVERRUN);
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}
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@ -1187,17 +1187,10 @@ siointr(unit)
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outb(com->modem_ctl_port,
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com->mcr_image &= ~MCR_RTS);
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#else
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if (com->cy_rflow) {
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cd_outb(iobase, CD1400_MSVR2,
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cy_align,
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com->mcr_image &=
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~MCR_DTR);
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} else {
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cd_outb(iobase, CD1400_MSVR1,
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cy_align,
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com->mcr_image &=
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~MCR_RTS);
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}
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cd_outb(iobase, com->mcr_rts_reg,
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cy_align,
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com->mcr_image
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&= ~com->mcr_rts);
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#endif
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com_events += count;
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do {
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@ -1633,9 +1626,8 @@ repeat:
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* there is room in the high-level buffer.
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*/
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if ((com->state & CS_RTS_IFLOW)
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&& (com->cy_rflow ? (!(com->mcr_image & MCR_DTR)) :
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(!(com->mcr_image & MCR_RTS)))
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&& !(tp->t_state & TS_TBLOCK)) {
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&& !(com->mcr_image & com->mcr_rts)
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&& !(tp->t_state & TS_TBLOCK))
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#if 0
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outb(com->modem_ctl_port,
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com->mcr_image |= MCR_RTS);
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@ -1643,15 +1635,9 @@ repeat:
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iobase = com->iobase,
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cd_outb(iobase, CD1400_CAR, com->cy_align,
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unit & CD1400_CAR_CHAN),
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(com->cy_rflow ?
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cd_outb(iobase, CD1400_MSVR2,
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com->cy_align,
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com->mcr_image |= MCR_DTR) :
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cd_outb(iobase, CD1400_MSVR1,
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com->cy_align,
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com->mcr_image |= MCR_RTS));
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cd_outb(iobase, com->mcr_rts_reg, com->cy_align,
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com->mcr_image |= com->mcr_rts);
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#endif
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}
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enable_intr();
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com->ibuf = ibuf;
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}
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@ -1744,6 +1730,7 @@ comparam(tp, t)
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int cflag;
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struct com_s *com;
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u_char cor_change;
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u_long cy_clock;
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int idivisor;
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int iflag;
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cy_addr iobase;
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@ -1754,7 +1741,6 @@ comparam(tp, t)
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u_char opt;
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int s;
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int unit;
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long cy_clock;
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/* do historical conversions */
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if (t->c_ispeed == 0)
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@ -1762,19 +1748,9 @@ comparam(tp, t)
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unit = DEV_TO_UNIT(tp->t_dev);
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com = com_addr(unit);
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iobase = com->iobase;
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s = spltty();
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cd_outb(iobase, CD1400_CAR, com->cy_align, unit & CD1400_CAR_CHAN);
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/* Set Clock Reference */
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if (cd_inb(iobase, CD1400_GFRCR, com->cy_align) == CD1400_REV_J) {
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/* CD1400 rev. J or higher */
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cy_clock = CY_CLOCK_60;
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} else {
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cy_clock = CY_CLOCK_25;
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}
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/* check requested parameters */
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cy_clock = CY_CLOCK(com->gfrcr_image);
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idivisor = comspeed(t->c_ispeed, cy_clock, &iprescaler);
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if (idivisor < 0)
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return (EINVAL);
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@ -1783,6 +1759,9 @@ comparam(tp, t)
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return (EINVAL);
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/* parameters are OK, convert them to the com struct and the device */
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iobase = com->iobase;
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s = spltty();
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cd_outb(iobase, CD1400_CAR, com->cy_align, unit & CD1400_CAR_CHAN);
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if (odivisor == 0)
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(void)commctl(com, TIOCM_DTR, DMBIC); /* hang up line */
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else
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@ -2050,13 +2029,8 @@ comparam(tp, t)
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#if 0
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outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS);
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#else
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if (com->cy_rflow) {
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cd_outb(iobase, CD1400_MSVR2, com->cy_align,
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com->mcr_image |= MCR_DTR);
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} else {
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cd_outb(iobase, CD1400_MSVR1, com->cy_align,
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com->mcr_image |= MCR_RTS);
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}
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cd_outb(iobase, com->mcr_rts_reg, com->cy_align,
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com->mcr_image |= com->mcr_rts);
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#endif
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}
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@ -2138,35 +2112,22 @@ comstart(tp)
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com->intr_enable |= CD1400_SRER_TXRDY);
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}
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if (tp->t_state & TS_TBLOCK) {
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if ((com->cy_rflow ? (com->mcr_image & MCR_DTR) :
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(com->mcr_image & MCR_RTS))
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&& com->state & CS_RTS_IFLOW)
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if (com->mcr_image & com->mcr_rts && com->state & CS_RTS_IFLOW)
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#if 0
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outb(com->modem_ctl_port, com->mcr_image &= ~MCR_RTS);
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#else
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if (com->cy_rflow) {
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cd_outb(iobase, CD1400_MSVR2, com->cy_align,
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com->mcr_image &= ~MCR_DTR);
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} else {
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cd_outb(iobase, CD1400_MSVR1, com->cy_align,
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com->mcr_image &= ~MCR_RTS);
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}
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cd_outb(iobase, com->mcr_rts_reg, com->cy_align,
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com->mcr_image &= ~com->mcr_rts);
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#endif
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} else {
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if ((com->cy_rflow ? (!(com->mcr_image & MCR_DTR)) :
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(!(com->mcr_image & MCR_RTS)))
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if (!(com->mcr_image & com->mcr_rts)
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&& com->iptr < com->ihighwater
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&& com->state & CS_RTS_IFLOW)
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#if 0
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outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS);
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#else
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if (com->cy_rflow) {
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cd_outb(iobase, CD1400_MSVR2, com->cy_align,
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com->mcr_image |= MCR_DTR);
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} else {
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cd_outb(iobase, CD1400_MSVR1, com->cy_align,
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com->mcr_image |= MCR_RTS);
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}
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cd_outb(iobase, com->mcr_rts_reg, com->cy_align,
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com->mcr_image |= com->mcr_rts);
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#endif
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}
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enable_intr();
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@ -2311,13 +2272,11 @@ commctl(com, bits, how)
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if (com->channel_control & CD1400_CCR_RCVEN)
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bits |= TIOCM_LE;
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mcr = com->mcr_image;
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if ((com->cy_rflow ? mcr & MCR_RTS : mcr & MCR_DTR)) {
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if (mcr & com->mcr_dtr)
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bits |= TIOCM_DTR;
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}
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if ((com->cy_rflow ? mcr & MCR_DTR : mcr & MCR_RTS)) {
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if (mcr & com->mcr_rts)
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/* XXX wired on for Cyclom-8Ys */
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bits |= TIOCM_RTS;
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}
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/*
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* We must read the modem status from the hardware because
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@ -2341,20 +2300,10 @@ commctl(com, bits, how)
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return (bits);
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}
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mcr = 0;
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if (bits & TIOCM_DTR) {
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if (com->cy_rflow) {
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mcr |= MCR_RTS;
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} else {
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mcr |= MCR_DTR;
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}
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}
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if (bits & TIOCM_RTS) {
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if (com->cy_rflow) {
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mcr |= MCR_DTR;
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} else {
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mcr |= MCR_RTS;
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}
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}
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if (bits & TIOCM_DTR)
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mcr |= com->mcr_dtr;
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if (bits & TIOCM_RTS)
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mcr |= com->mcr_rts;
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disable_intr();
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switch (how) {
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case DMSET:
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@ -2531,9 +2480,9 @@ cyinput(c, tp)
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#endif /* Smarts */
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static int
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comspeed(speed, clock, prescaler_io)
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comspeed(speed, cy_clock, prescaler_io)
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speed_t speed;
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long clock;
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u_long cy_clock;
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int *prescaler_io;
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{
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int actual;
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@ -2550,14 +2499,14 @@ comspeed(speed, clock, prescaler_io)
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/* determine which prescaler to use */
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for (prescaler_unit = 4, prescaler = 2048; prescaler_unit;
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prescaler_unit--, prescaler >>= 2) {
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if (clock / prescaler / speed > 63)
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if (cy_clock / prescaler / speed > 63)
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break;
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}
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divider = (clock / prescaler * 2 / speed + 1) / 2; /* round off */
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divider = (cy_clock / prescaler * 2 / speed + 1) / 2; /* round off */
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if (divider > 255)
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divider = 255;
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actual = clock/prescaler/divider;
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actual = cy_clock/prescaler/divider;
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/* 10 times error in percent: */
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error = ((actual - (long)speed) * 2000 / (long)speed + 1) / 2;
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@ -27,7 +27,7 @@
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* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* $Id: cy.c,v 1.66 1998/08/11 17:01:32 bde Exp $
|
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* $Id: cy.c,v 1.67 1998/08/13 13:54:10 bde Exp $
|
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*/
|
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|
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#include "opt_compat.h"
|
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@ -233,10 +233,15 @@ struct com_s {
|
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#if 0
|
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u_char cfcr_image; /* copy of value written to CFCR */
|
||||
u_char fifo_image; /* copy of value written to FIFO */
|
||||
#endif
|
||||
u_char gfrcr_image; /* copy of value read from GFRCR */
|
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#if 0
|
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bool_t hasfifo; /* nonzero for 16550 UARTs */
|
||||
bool_t loses_outints; /* nonzero if device loses output interrupts */
|
||||
#endif
|
||||
u_char mcr_dtr; /* MCR bit that is wired to DTR */
|
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u_char mcr_image; /* copy of value written to MCR */
|
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u_char mcr_rts; /* MCR bit that is wired to RTS */
|
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#if 0
|
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#ifdef COM_MULTIPORT
|
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bool_t multiport; /* is this unit part of a multiport device? */
|
||||
@ -272,8 +277,8 @@ struct com_s {
|
||||
|
||||
int cy_align; /* index for register alignment */
|
||||
cy_addr cy_iobase; /* base address of this port's cyclom */
|
||||
int cy_rflow; /* rflow flag */
|
||||
cy_addr iobase; /* base address of this port's cd1400 */
|
||||
int mcr_rts_reg; /* cd1400 reg number of reg holding mcr_rts */
|
||||
|
||||
struct tty *tp; /* cross reference */
|
||||
|
||||
@ -345,7 +350,8 @@ static int comparam __P((struct tty *tp, struct termios *t));
|
||||
static swihand_t siopoll;
|
||||
static int sioprobe __P((struct isa_device *dev));
|
||||
static void siosettimeout __P((void));
|
||||
static int comspeed __P((speed_t speed, long clock, int *prescaler_io));
|
||||
static int comspeed __P((speed_t speed, u_long cy_clock,
|
||||
int *prescaler_io));
|
||||
static void comstart __P((struct tty *tp));
|
||||
static timeout_t comwakeup;
|
||||
static void disc_optim __P((struct tty *tp, struct termios *t,
|
||||
@ -512,6 +518,7 @@ cyattach_common(cy_iobase, cy_align)
|
||||
int adapter;
|
||||
int cyu;
|
||||
dev_t dev;
|
||||
u_char firmware_version;
|
||||
cy_addr iobase;
|
||||
int ncyu;
|
||||
int unit;
|
||||
@ -535,15 +542,13 @@ cyattach_common(cy_iobase, cy_align)
|
||||
|
||||
iobase = (cy_addr) (cy_iobase
|
||||
+ (cy_chip_offset[cyu] << cy_align));
|
||||
firmware_version = cd_inb(iobase, CD1400_GFRCR, cy_align);
|
||||
|
||||
/* Set up a receive timeout period of than 1+ ms. */
|
||||
if (cd_inb(iobase,CD1400_GFRCR, cy_align) >= CD1400_REV_J) {
|
||||
/* CD1400 rev. J or higher */
|
||||
cd_outb(iobase, CD1400_PPR, cy_align, CY_CLOCK_60_1MS);
|
||||
} else {
|
||||
cd_outb(iobase, CD1400_PPR, cy_align, CY_CLOCK_25_1MS);
|
||||
}
|
||||
|
||||
cd_outb(iobase, CD1400_PPR, cy_align,
|
||||
howmany(CY_CLOCK(firmware_version)
|
||||
/ CD1400_PPR_PRESCALER, 1000));
|
||||
|
||||
for (cdu = 0; cdu < CD1400_NO_OF_CHANNELS; ++cdu, ++unit) {
|
||||
struct com_s *com;
|
||||
int s;
|
||||
@ -553,6 +558,16 @@ cyattach_common(cy_iobase, cy_align)
|
||||
break;
|
||||
bzero(com, sizeof *com);
|
||||
com->unit = unit;
|
||||
com->gfrcr_image = firmware_version;
|
||||
if (CY_RTS_DTR_SWAPPED(firmware_version)) {
|
||||
com->mcr_dtr = MCR_RTS;
|
||||
com->mcr_rts = MCR_DTR;
|
||||
com->mcr_rts_reg = CD1400_MSVR2;
|
||||
} else {
|
||||
com->mcr_dtr = MCR_DTR;
|
||||
com->mcr_rts = MCR_RTS;
|
||||
com->mcr_rts_reg = CD1400_MSVR1;
|
||||
}
|
||||
com->dtr_wait = 3 * hz;
|
||||
com->iptr = com->ibuf = com->ibuf1;
|
||||
com->ibufend = com->ibuf1 + RS_IBUFSIZE;
|
||||
@ -562,13 +577,6 @@ cyattach_common(cy_iobase, cy_align)
|
||||
|
||||
com->cy_align = cy_align;
|
||||
com->cy_iobase = cy_iobase;
|
||||
if (cd_inb(iobase,CD1400_GFRCR, cy_align) >=
|
||||
CD1400_REV_J) {
|
||||
/* CD1400 rev. J or higher */
|
||||
com->cy_rflow = 1;
|
||||
} else {
|
||||
com->cy_rflow = 0;
|
||||
}
|
||||
com->iobase = iobase;
|
||||
|
||||
/*
|
||||
@ -1114,24 +1122,16 @@ siointr(unit)
|
||||
ioptr[CE_INPUT_OFFSET] = line_status;
|
||||
com->iptr = ++ioptr;
|
||||
if (ioptr == com->ihighwater
|
||||
&& com->state & CS_RTS_IFLOW) {
|
||||
&& com->state & CS_RTS_IFLOW)
|
||||
#if 0
|
||||
outb(com->modem_ctl_port,
|
||||
com->mcr_image &= ~MCR_RTS);
|
||||
#else
|
||||
if (com->cy_rflow) {
|
||||
cd_outb(iobase, CD1400_MSVR2,
|
||||
cy_align,
|
||||
com->mcr_image &=
|
||||
~MCR_DTR);
|
||||
} else {
|
||||
cd_outb(iobase, CD1400_MSVR1,
|
||||
cy_align,
|
||||
com->mcr_image &=
|
||||
~MCR_RTS);
|
||||
}
|
||||
cd_outb(iobase, com->mcr_rts_reg,
|
||||
cy_align,
|
||||
com->mcr_image &=
|
||||
~com->mcr_rts);
|
||||
#endif
|
||||
}
|
||||
if (line_status & LSR_OE)
|
||||
CE_RECORD(com, CE_OVERRUN);
|
||||
}
|
||||
@ -1187,17 +1187,10 @@ siointr(unit)
|
||||
outb(com->modem_ctl_port,
|
||||
com->mcr_image &= ~MCR_RTS);
|
||||
#else
|
||||
if (com->cy_rflow) {
|
||||
cd_outb(iobase, CD1400_MSVR2,
|
||||
cy_align,
|
||||
com->mcr_image &=
|
||||
~MCR_DTR);
|
||||
} else {
|
||||
cd_outb(iobase, CD1400_MSVR1,
|
||||
cy_align,
|
||||
com->mcr_image &=
|
||||
~MCR_RTS);
|
||||
}
|
||||
cd_outb(iobase, com->mcr_rts_reg,
|
||||
cy_align,
|
||||
com->mcr_image
|
||||
&= ~com->mcr_rts);
|
||||
#endif
|
||||
com_events += count;
|
||||
do {
|
||||
@ -1633,9 +1626,8 @@ repeat:
|
||||
* there is room in the high-level buffer.
|
||||
*/
|
||||
if ((com->state & CS_RTS_IFLOW)
|
||||
&& (com->cy_rflow ? (!(com->mcr_image & MCR_DTR)) :
|
||||
(!(com->mcr_image & MCR_RTS)))
|
||||
&& !(tp->t_state & TS_TBLOCK)) {
|
||||
&& !(com->mcr_image & com->mcr_rts)
|
||||
&& !(tp->t_state & TS_TBLOCK))
|
||||
#if 0
|
||||
outb(com->modem_ctl_port,
|
||||
com->mcr_image |= MCR_RTS);
|
||||
@ -1643,15 +1635,9 @@ repeat:
|
||||
iobase = com->iobase,
|
||||
cd_outb(iobase, CD1400_CAR, com->cy_align,
|
||||
unit & CD1400_CAR_CHAN),
|
||||
(com->cy_rflow ?
|
||||
cd_outb(iobase, CD1400_MSVR2,
|
||||
com->cy_align,
|
||||
com->mcr_image |= MCR_DTR) :
|
||||
cd_outb(iobase, CD1400_MSVR1,
|
||||
com->cy_align,
|
||||
com->mcr_image |= MCR_RTS));
|
||||
cd_outb(iobase, com->mcr_rts_reg, com->cy_align,
|
||||
com->mcr_image |= com->mcr_rts);
|
||||
#endif
|
||||
}
|
||||
enable_intr();
|
||||
com->ibuf = ibuf;
|
||||
}
|
||||
@ -1744,6 +1730,7 @@ comparam(tp, t)
|
||||
int cflag;
|
||||
struct com_s *com;
|
||||
u_char cor_change;
|
||||
u_long cy_clock;
|
||||
int idivisor;
|
||||
int iflag;
|
||||
cy_addr iobase;
|
||||
@ -1754,7 +1741,6 @@ comparam(tp, t)
|
||||
u_char opt;
|
||||
int s;
|
||||
int unit;
|
||||
long cy_clock;
|
||||
|
||||
/* do historical conversions */
|
||||
if (t->c_ispeed == 0)
|
||||
@ -1762,19 +1748,9 @@ comparam(tp, t)
|
||||
|
||||
unit = DEV_TO_UNIT(tp->t_dev);
|
||||
com = com_addr(unit);
|
||||
iobase = com->iobase;
|
||||
s = spltty();
|
||||
cd_outb(iobase, CD1400_CAR, com->cy_align, unit & CD1400_CAR_CHAN);
|
||||
|
||||
/* Set Clock Reference */
|
||||
if (cd_inb(iobase, CD1400_GFRCR, com->cy_align) == CD1400_REV_J) {
|
||||
/* CD1400 rev. J or higher */
|
||||
cy_clock = CY_CLOCK_60;
|
||||
} else {
|
||||
cy_clock = CY_CLOCK_25;
|
||||
}
|
||||
|
||||
/* check requested parameters */
|
||||
cy_clock = CY_CLOCK(com->gfrcr_image);
|
||||
idivisor = comspeed(t->c_ispeed, cy_clock, &iprescaler);
|
||||
if (idivisor < 0)
|
||||
return (EINVAL);
|
||||
@ -1783,6 +1759,9 @@ comparam(tp, t)
|
||||
return (EINVAL);
|
||||
|
||||
/* parameters are OK, convert them to the com struct and the device */
|
||||
iobase = com->iobase;
|
||||
s = spltty();
|
||||
cd_outb(iobase, CD1400_CAR, com->cy_align, unit & CD1400_CAR_CHAN);
|
||||
if (odivisor == 0)
|
||||
(void)commctl(com, TIOCM_DTR, DMBIC); /* hang up line */
|
||||
else
|
||||
@ -2050,13 +2029,8 @@ comparam(tp, t)
|
||||
#if 0
|
||||
outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS);
|
||||
#else
|
||||
if (com->cy_rflow) {
|
||||
cd_outb(iobase, CD1400_MSVR2, com->cy_align,
|
||||
com->mcr_image |= MCR_DTR);
|
||||
} else {
|
||||
cd_outb(iobase, CD1400_MSVR1, com->cy_align,
|
||||
com->mcr_image |= MCR_RTS);
|
||||
}
|
||||
cd_outb(iobase, com->mcr_rts_reg, com->cy_align,
|
||||
com->mcr_image |= com->mcr_rts);
|
||||
#endif
|
||||
}
|
||||
|
||||
@ -2138,35 +2112,22 @@ comstart(tp)
|
||||
com->intr_enable |= CD1400_SRER_TXRDY);
|
||||
}
|
||||
if (tp->t_state & TS_TBLOCK) {
|
||||
if ((com->cy_rflow ? (com->mcr_image & MCR_DTR) :
|
||||
(com->mcr_image & MCR_RTS))
|
||||
&& com->state & CS_RTS_IFLOW)
|
||||
if (com->mcr_image & com->mcr_rts && com->state & CS_RTS_IFLOW)
|
||||
#if 0
|
||||
outb(com->modem_ctl_port, com->mcr_image &= ~MCR_RTS);
|
||||
#else
|
||||
if (com->cy_rflow) {
|
||||
cd_outb(iobase, CD1400_MSVR2, com->cy_align,
|
||||
com->mcr_image &= ~MCR_DTR);
|
||||
} else {
|
||||
cd_outb(iobase, CD1400_MSVR1, com->cy_align,
|
||||
com->mcr_image &= ~MCR_RTS);
|
||||
}
|
||||
cd_outb(iobase, com->mcr_rts_reg, com->cy_align,
|
||||
com->mcr_image &= ~com->mcr_rts);
|
||||
#endif
|
||||
} else {
|
||||
if ((com->cy_rflow ? (!(com->mcr_image & MCR_DTR)) :
|
||||
(!(com->mcr_image & MCR_RTS)))
|
||||
if (!(com->mcr_image & com->mcr_rts)
|
||||
&& com->iptr < com->ihighwater
|
||||
&& com->state & CS_RTS_IFLOW)
|
||||
#if 0
|
||||
outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS);
|
||||
#else
|
||||
if (com->cy_rflow) {
|
||||
cd_outb(iobase, CD1400_MSVR2, com->cy_align,
|
||||
com->mcr_image |= MCR_DTR);
|
||||
} else {
|
||||
cd_outb(iobase, CD1400_MSVR1, com->cy_align,
|
||||
com->mcr_image |= MCR_RTS);
|
||||
}
|
||||
cd_outb(iobase, com->mcr_rts_reg, com->cy_align,
|
||||
com->mcr_image |= com->mcr_rts);
|
||||
#endif
|
||||
}
|
||||
enable_intr();
|
||||
@ -2311,13 +2272,11 @@ commctl(com, bits, how)
|
||||
if (com->channel_control & CD1400_CCR_RCVEN)
|
||||
bits |= TIOCM_LE;
|
||||
mcr = com->mcr_image;
|
||||
if ((com->cy_rflow ? mcr & MCR_RTS : mcr & MCR_DTR)) {
|
||||
if (mcr & com->mcr_dtr)
|
||||
bits |= TIOCM_DTR;
|
||||
}
|
||||
if ((com->cy_rflow ? mcr & MCR_DTR : mcr & MCR_RTS)) {
|
||||
if (mcr & com->mcr_rts)
|
||||
/* XXX wired on for Cyclom-8Ys */
|
||||
bits |= TIOCM_RTS;
|
||||
}
|
||||
|
||||
/*
|
||||
* We must read the modem status from the hardware because
|
||||
@ -2341,20 +2300,10 @@ commctl(com, bits, how)
|
||||
return (bits);
|
||||
}
|
||||
mcr = 0;
|
||||
if (bits & TIOCM_DTR) {
|
||||
if (com->cy_rflow) {
|
||||
mcr |= MCR_RTS;
|
||||
} else {
|
||||
mcr |= MCR_DTR;
|
||||
}
|
||||
}
|
||||
if (bits & TIOCM_RTS) {
|
||||
if (com->cy_rflow) {
|
||||
mcr |= MCR_DTR;
|
||||
} else {
|
||||
mcr |= MCR_RTS;
|
||||
}
|
||||
}
|
||||
if (bits & TIOCM_DTR)
|
||||
mcr |= com->mcr_dtr;
|
||||
if (bits & TIOCM_RTS)
|
||||
mcr |= com->mcr_rts;
|
||||
disable_intr();
|
||||
switch (how) {
|
||||
case DMSET:
|
||||
@ -2531,9 +2480,9 @@ cyinput(c, tp)
|
||||
#endif /* Smarts */
|
||||
|
||||
static int
|
||||
comspeed(speed, clock, prescaler_io)
|
||||
comspeed(speed, cy_clock, prescaler_io)
|
||||
speed_t speed;
|
||||
long clock;
|
||||
u_long cy_clock;
|
||||
int *prescaler_io;
|
||||
{
|
||||
int actual;
|
||||
@ -2550,14 +2499,14 @@ comspeed(speed, clock, prescaler_io)
|
||||
/* determine which prescaler to use */
|
||||
for (prescaler_unit = 4, prescaler = 2048; prescaler_unit;
|
||||
prescaler_unit--, prescaler >>= 2) {
|
||||
if (clock / prescaler / speed > 63)
|
||||
if (cy_clock / prescaler / speed > 63)
|
||||
break;
|
||||
}
|
||||
|
||||
divider = (clock / prescaler * 2 / speed + 1) / 2; /* round off */
|
||||
divider = (cy_clock / prescaler * 2 / speed + 1) / 2; /* round off */
|
||||
if (divider > 255)
|
||||
divider = 255;
|
||||
actual = clock/prescaler/divider;
|
||||
actual = cy_clock/prescaler/divider;
|
||||
|
||||
/* 10 times error in percent: */
|
||||
error = ((actual - (long)speed) * 2000 / (long)speed + 1) / 2;
|
||||
|
||||
@ -26,7 +26,7 @@
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* $Id: cyreg.h,v 1.3 1996/10/13 01:09:17 davidg Exp $
|
||||
* $Id: cyreg.h,v 1.6 1998/08/13 13:54:10 bde Exp $
|
||||
*/
|
||||
|
||||
/*
|
||||
@ -41,13 +41,8 @@
|
||||
|
||||
#define CY_MAX_CD1400s 8 /* for Cyclom-32Y */
|
||||
|
||||
#define CD1400_REV_G 0x46
|
||||
#define CD1400_REV_J 0x48
|
||||
|
||||
#define CY_CLOCK_25 25000000 /* baud rate clock */
|
||||
#define CY_CLOCK_60 60000000 /* baud rate clock */
|
||||
#define CY_CLOCK_25_1MS 0x31
|
||||
#define CY_CLOCK_60_1MS 0x75
|
||||
#define CY_CLOCK(version) ((version) >= 0x48 ? 60000000 : 25000000)
|
||||
#define CY_RTS_DTR_SWAPPED(version) ((version) >= 0x48)
|
||||
|
||||
#ifdef CyDebug
|
||||
#define cd_inb(iobase, reg, cy_align) (++cd_inbs, *((iobase) + ((reg)*2 << (cy_align))))
|
||||
|
||||
@ -27,7 +27,7 @@
|
||||
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* $Id: cy.c,v 1.66 1998/08/11 17:01:32 bde Exp $
|
||||
* $Id: cy.c,v 1.67 1998/08/13 13:54:10 bde Exp $
|
||||
*/
|
||||
|
||||
#include "opt_compat.h"
|
||||
@ -233,10 +233,15 @@ struct com_s {
|
||||
#if 0
|
||||
u_char cfcr_image; /* copy of value written to CFCR */
|
||||
u_char fifo_image; /* copy of value written to FIFO */
|
||||
#endif
|
||||
u_char gfrcr_image; /* copy of value read from GFRCR */
|
||||
#if 0
|
||||
bool_t hasfifo; /* nonzero for 16550 UARTs */
|
||||
bool_t loses_outints; /* nonzero if device loses output interrupts */
|
||||
#endif
|
||||
u_char mcr_dtr; /* MCR bit that is wired to DTR */
|
||||
u_char mcr_image; /* copy of value written to MCR */
|
||||
u_char mcr_rts; /* MCR bit that is wired to RTS */
|
||||
#if 0
|
||||
#ifdef COM_MULTIPORT
|
||||
bool_t multiport; /* is this unit part of a multiport device? */
|
||||
@ -272,8 +277,8 @@ struct com_s {
|
||||
|
||||
int cy_align; /* index for register alignment */
|
||||
cy_addr cy_iobase; /* base address of this port's cyclom */
|
||||
int cy_rflow; /* rflow flag */
|
||||
cy_addr iobase; /* base address of this port's cd1400 */
|
||||
int mcr_rts_reg; /* cd1400 reg number of reg holding mcr_rts */
|
||||
|
||||
struct tty *tp; /* cross reference */
|
||||
|
||||
@ -345,7 +350,8 @@ static int comparam __P((struct tty *tp, struct termios *t));
|
||||
static swihand_t siopoll;
|
||||
static int sioprobe __P((struct isa_device *dev));
|
||||
static void siosettimeout __P((void));
|
||||
static int comspeed __P((speed_t speed, long clock, int *prescaler_io));
|
||||
static int comspeed __P((speed_t speed, u_long cy_clock,
|
||||
int *prescaler_io));
|
||||
static void comstart __P((struct tty *tp));
|
||||
static timeout_t comwakeup;
|
||||
static void disc_optim __P((struct tty *tp, struct termios *t,
|
||||
@ -512,6 +518,7 @@ cyattach_common(cy_iobase, cy_align)
|
||||
int adapter;
|
||||
int cyu;
|
||||
dev_t dev;
|
||||
u_char firmware_version;
|
||||
cy_addr iobase;
|
||||
int ncyu;
|
||||
int unit;
|
||||
@ -535,15 +542,13 @@ cyattach_common(cy_iobase, cy_align)
|
||||
|
||||
iobase = (cy_addr) (cy_iobase
|
||||
+ (cy_chip_offset[cyu] << cy_align));
|
||||
firmware_version = cd_inb(iobase, CD1400_GFRCR, cy_align);
|
||||
|
||||
/* Set up a receive timeout period of than 1+ ms. */
|
||||
if (cd_inb(iobase,CD1400_GFRCR, cy_align) >= CD1400_REV_J) {
|
||||
/* CD1400 rev. J or higher */
|
||||
cd_outb(iobase, CD1400_PPR, cy_align, CY_CLOCK_60_1MS);
|
||||
} else {
|
||||
cd_outb(iobase, CD1400_PPR, cy_align, CY_CLOCK_25_1MS);
|
||||
}
|
||||
|
||||
cd_outb(iobase, CD1400_PPR, cy_align,
|
||||
howmany(CY_CLOCK(firmware_version)
|
||||
/ CD1400_PPR_PRESCALER, 1000));
|
||||
|
||||
for (cdu = 0; cdu < CD1400_NO_OF_CHANNELS; ++cdu, ++unit) {
|
||||
struct com_s *com;
|
||||
int s;
|
||||
@ -553,6 +558,16 @@ cyattach_common(cy_iobase, cy_align)
|
||||
break;
|
||||
bzero(com, sizeof *com);
|
||||
com->unit = unit;
|
||||
com->gfrcr_image = firmware_version;
|
||||
if (CY_RTS_DTR_SWAPPED(firmware_version)) {
|
||||
com->mcr_dtr = MCR_RTS;
|
||||
com->mcr_rts = MCR_DTR;
|
||||
com->mcr_rts_reg = CD1400_MSVR2;
|
||||
} else {
|
||||
com->mcr_dtr = MCR_DTR;
|
||||
com->mcr_rts = MCR_RTS;
|
||||
com->mcr_rts_reg = CD1400_MSVR1;
|
||||
}
|
||||
com->dtr_wait = 3 * hz;
|
||||
com->iptr = com->ibuf = com->ibuf1;
|
||||
com->ibufend = com->ibuf1 + RS_IBUFSIZE;
|
||||
@ -562,13 +577,6 @@ cyattach_common(cy_iobase, cy_align)
|
||||
|
||||
com->cy_align = cy_align;
|
||||
com->cy_iobase = cy_iobase;
|
||||
if (cd_inb(iobase,CD1400_GFRCR, cy_align) >=
|
||||
CD1400_REV_J) {
|
||||
/* CD1400 rev. J or higher */
|
||||
com->cy_rflow = 1;
|
||||
} else {
|
||||
com->cy_rflow = 0;
|
||||
}
|
||||
com->iobase = iobase;
|
||||
|
||||
/*
|
||||
@ -1114,24 +1122,16 @@ siointr(unit)
|
||||
ioptr[CE_INPUT_OFFSET] = line_status;
|
||||
com->iptr = ++ioptr;
|
||||
if (ioptr == com->ihighwater
|
||||
&& com->state & CS_RTS_IFLOW) {
|
||||
&& com->state & CS_RTS_IFLOW)
|
||||
#if 0
|
||||
outb(com->modem_ctl_port,
|
||||
com->mcr_image &= ~MCR_RTS);
|
||||
#else
|
||||
if (com->cy_rflow) {
|
||||
cd_outb(iobase, CD1400_MSVR2,
|
||||
cy_align,
|
||||
com->mcr_image &=
|
||||
~MCR_DTR);
|
||||
} else {
|
||||
cd_outb(iobase, CD1400_MSVR1,
|
||||
cy_align,
|
||||
com->mcr_image &=
|
||||
~MCR_RTS);
|
||||
}
|
||||
cd_outb(iobase, com->mcr_rts_reg,
|
||||
cy_align,
|
||||
com->mcr_image &=
|
||||
~com->mcr_rts);
|
||||
#endif
|
||||
}
|
||||
if (line_status & LSR_OE)
|
||||
CE_RECORD(com, CE_OVERRUN);
|
||||
}
|
||||
@ -1187,17 +1187,10 @@ siointr(unit)
|
||||
outb(com->modem_ctl_port,
|
||||
com->mcr_image &= ~MCR_RTS);
|
||||
#else
|
||||
if (com->cy_rflow) {
|
||||
cd_outb(iobase, CD1400_MSVR2,
|
||||
cy_align,
|
||||
com->mcr_image &=
|
||||
~MCR_DTR);
|
||||
} else {
|
||||
cd_outb(iobase, CD1400_MSVR1,
|
||||
cy_align,
|
||||
com->mcr_image &=
|
||||
~MCR_RTS);
|
||||
}
|
||||
cd_outb(iobase, com->mcr_rts_reg,
|
||||
cy_align,
|
||||
com->mcr_image
|
||||
&= ~com->mcr_rts);
|
||||
#endif
|
||||
com_events += count;
|
||||
do {
|
||||
@ -1633,9 +1626,8 @@ repeat:
|
||||
* there is room in the high-level buffer.
|
||||
*/
|
||||
if ((com->state & CS_RTS_IFLOW)
|
||||
&& (com->cy_rflow ? (!(com->mcr_image & MCR_DTR)) :
|
||||
(!(com->mcr_image & MCR_RTS)))
|
||||
&& !(tp->t_state & TS_TBLOCK)) {
|
||||
&& !(com->mcr_image & com->mcr_rts)
|
||||
&& !(tp->t_state & TS_TBLOCK))
|
||||
#if 0
|
||||
outb(com->modem_ctl_port,
|
||||
com->mcr_image |= MCR_RTS);
|
||||
@ -1643,15 +1635,9 @@ repeat:
|
||||
iobase = com->iobase,
|
||||
cd_outb(iobase, CD1400_CAR, com->cy_align,
|
||||
unit & CD1400_CAR_CHAN),
|
||||
(com->cy_rflow ?
|
||||
cd_outb(iobase, CD1400_MSVR2,
|
||||
com->cy_align,
|
||||
com->mcr_image |= MCR_DTR) :
|
||||
cd_outb(iobase, CD1400_MSVR1,
|
||||
com->cy_align,
|
||||
com->mcr_image |= MCR_RTS));
|
||||
cd_outb(iobase, com->mcr_rts_reg, com->cy_align,
|
||||
com->mcr_image |= com->mcr_rts);
|
||||
#endif
|
||||
}
|
||||
enable_intr();
|
||||
com->ibuf = ibuf;
|
||||
}
|
||||
@ -1744,6 +1730,7 @@ comparam(tp, t)
|
||||
int cflag;
|
||||
struct com_s *com;
|
||||
u_char cor_change;
|
||||
u_long cy_clock;
|
||||
int idivisor;
|
||||
int iflag;
|
||||
cy_addr iobase;
|
||||
@ -1754,7 +1741,6 @@ comparam(tp, t)
|
||||
u_char opt;
|
||||
int s;
|
||||
int unit;
|
||||
long cy_clock;
|
||||
|
||||
/* do historical conversions */
|
||||
if (t->c_ispeed == 0)
|
||||
@ -1762,19 +1748,9 @@ comparam(tp, t)
|
||||
|
||||
unit = DEV_TO_UNIT(tp->t_dev);
|
||||
com = com_addr(unit);
|
||||
iobase = com->iobase;
|
||||
s = spltty();
|
||||
cd_outb(iobase, CD1400_CAR, com->cy_align, unit & CD1400_CAR_CHAN);
|
||||
|
||||
/* Set Clock Reference */
|
||||
if (cd_inb(iobase, CD1400_GFRCR, com->cy_align) == CD1400_REV_J) {
|
||||
/* CD1400 rev. J or higher */
|
||||
cy_clock = CY_CLOCK_60;
|
||||
} else {
|
||||
cy_clock = CY_CLOCK_25;
|
||||
}
|
||||
|
||||
/* check requested parameters */
|
||||
cy_clock = CY_CLOCK(com->gfrcr_image);
|
||||
idivisor = comspeed(t->c_ispeed, cy_clock, &iprescaler);
|
||||
if (idivisor < 0)
|
||||
return (EINVAL);
|
||||
@ -1783,6 +1759,9 @@ comparam(tp, t)
|
||||
return (EINVAL);
|
||||
|
||||
/* parameters are OK, convert them to the com struct and the device */
|
||||
iobase = com->iobase;
|
||||
s = spltty();
|
||||
cd_outb(iobase, CD1400_CAR, com->cy_align, unit & CD1400_CAR_CHAN);
|
||||
if (odivisor == 0)
|
||||
(void)commctl(com, TIOCM_DTR, DMBIC); /* hang up line */
|
||||
else
|
||||
@ -2050,13 +2029,8 @@ comparam(tp, t)
|
||||
#if 0
|
||||
outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS);
|
||||
#else
|
||||
if (com->cy_rflow) {
|
||||
cd_outb(iobase, CD1400_MSVR2, com->cy_align,
|
||||
com->mcr_image |= MCR_DTR);
|
||||
} else {
|
||||
cd_outb(iobase, CD1400_MSVR1, com->cy_align,
|
||||
com->mcr_image |= MCR_RTS);
|
||||
}
|
||||
cd_outb(iobase, com->mcr_rts_reg, com->cy_align,
|
||||
com->mcr_image |= com->mcr_rts);
|
||||
#endif
|
||||
}
|
||||
|
||||
@ -2138,35 +2112,22 @@ comstart(tp)
|
||||
com->intr_enable |= CD1400_SRER_TXRDY);
|
||||
}
|
||||
if (tp->t_state & TS_TBLOCK) {
|
||||
if ((com->cy_rflow ? (com->mcr_image & MCR_DTR) :
|
||||
(com->mcr_image & MCR_RTS))
|
||||
&& com->state & CS_RTS_IFLOW)
|
||||
if (com->mcr_image & com->mcr_rts && com->state & CS_RTS_IFLOW)
|
||||
#if 0
|
||||
outb(com->modem_ctl_port, com->mcr_image &= ~MCR_RTS);
|
||||
#else
|
||||
if (com->cy_rflow) {
|
||||
cd_outb(iobase, CD1400_MSVR2, com->cy_align,
|
||||
com->mcr_image &= ~MCR_DTR);
|
||||
} else {
|
||||
cd_outb(iobase, CD1400_MSVR1, com->cy_align,
|
||||
com->mcr_image &= ~MCR_RTS);
|
||||
}
|
||||
cd_outb(iobase, com->mcr_rts_reg, com->cy_align,
|
||||
com->mcr_image &= ~com->mcr_rts);
|
||||
#endif
|
||||
} else {
|
||||
if ((com->cy_rflow ? (!(com->mcr_image & MCR_DTR)) :
|
||||
(!(com->mcr_image & MCR_RTS)))
|
||||
if (!(com->mcr_image & com->mcr_rts)
|
||||
&& com->iptr < com->ihighwater
|
||||
&& com->state & CS_RTS_IFLOW)
|
||||
#if 0
|
||||
outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS);
|
||||
#else
|
||||
if (com->cy_rflow) {
|
||||
cd_outb(iobase, CD1400_MSVR2, com->cy_align,
|
||||
com->mcr_image |= MCR_DTR);
|
||||
} else {
|
||||
cd_outb(iobase, CD1400_MSVR1, com->cy_align,
|
||||
com->mcr_image |= MCR_RTS);
|
||||
}
|
||||
cd_outb(iobase, com->mcr_rts_reg, com->cy_align,
|
||||
com->mcr_image |= com->mcr_rts);
|
||||
#endif
|
||||
}
|
||||
enable_intr();
|
||||
@ -2311,13 +2272,11 @@ commctl(com, bits, how)
|
||||
if (com->channel_control & CD1400_CCR_RCVEN)
|
||||
bits |= TIOCM_LE;
|
||||
mcr = com->mcr_image;
|
||||
if ((com->cy_rflow ? mcr & MCR_RTS : mcr & MCR_DTR)) {
|
||||
if (mcr & com->mcr_dtr)
|
||||
bits |= TIOCM_DTR;
|
||||
}
|
||||
if ((com->cy_rflow ? mcr & MCR_DTR : mcr & MCR_RTS)) {
|
||||
if (mcr & com->mcr_rts)
|
||||
/* XXX wired on for Cyclom-8Ys */
|
||||
bits |= TIOCM_RTS;
|
||||
}
|
||||
|
||||
/*
|
||||
* We must read the modem status from the hardware because
|
||||
@ -2341,20 +2300,10 @@ commctl(com, bits, how)
|
||||
return (bits);
|
||||
}
|
||||
mcr = 0;
|
||||
if (bits & TIOCM_DTR) {
|
||||
if (com->cy_rflow) {
|
||||
mcr |= MCR_RTS;
|
||||
} else {
|
||||
mcr |= MCR_DTR;
|
||||
}
|
||||
}
|
||||
if (bits & TIOCM_RTS) {
|
||||
if (com->cy_rflow) {
|
||||
mcr |= MCR_DTR;
|
||||
} else {
|
||||
mcr |= MCR_RTS;
|
||||
}
|
||||
}
|
||||
if (bits & TIOCM_DTR)
|
||||
mcr |= com->mcr_dtr;
|
||||
if (bits & TIOCM_RTS)
|
||||
mcr |= com->mcr_rts;
|
||||
disable_intr();
|
||||
switch (how) {
|
||||
case DMSET:
|
||||
@ -2531,9 +2480,9 @@ cyinput(c, tp)
|
||||
#endif /* Smarts */
|
||||
|
||||
static int
|
||||
comspeed(speed, clock, prescaler_io)
|
||||
comspeed(speed, cy_clock, prescaler_io)
|
||||
speed_t speed;
|
||||
long clock;
|
||||
u_long cy_clock;
|
||||
int *prescaler_io;
|
||||
{
|
||||
int actual;
|
||||
@ -2550,14 +2499,14 @@ comspeed(speed, clock, prescaler_io)
|
||||
/* determine which prescaler to use */
|
||||
for (prescaler_unit = 4, prescaler = 2048; prescaler_unit;
|
||||
prescaler_unit--, prescaler >>= 2) {
|
||||
if (clock / prescaler / speed > 63)
|
||||
if (cy_clock / prescaler / speed > 63)
|
||||
break;
|
||||
}
|
||||
|
||||
divider = (clock / prescaler * 2 / speed + 1) / 2; /* round off */
|
||||
divider = (cy_clock / prescaler * 2 / speed + 1) / 2; /* round off */
|
||||
if (divider > 255)
|
||||
divider = 255;
|
||||
actual = clock/prescaler/divider;
|
||||
actual = cy_clock/prescaler/divider;
|
||||
|
||||
/* 10 times error in percent: */
|
||||
error = ((actual - (long)speed) * 2000 / (long)speed + 1) / 2;
|
||||
|
||||
@ -26,7 +26,7 @@
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* $Id: cyreg.h,v 1.3 1996/10/13 01:09:17 davidg Exp $
|
||||
* $Id: cyreg.h,v 1.6 1998/08/13 13:54:10 bde Exp $
|
||||
*/
|
||||
|
||||
/*
|
||||
@ -41,13 +41,8 @@
|
||||
|
||||
#define CY_MAX_CD1400s 8 /* for Cyclom-32Y */
|
||||
|
||||
#define CD1400_REV_G 0x46
|
||||
#define CD1400_REV_J 0x48
|
||||
|
||||
#define CY_CLOCK_25 25000000 /* baud rate clock */
|
||||
#define CY_CLOCK_60 60000000 /* baud rate clock */
|
||||
#define CY_CLOCK_25_1MS 0x31
|
||||
#define CY_CLOCK_60_1MS 0x75
|
||||
#define CY_CLOCK(version) ((version) >= 0x48 ? 60000000 : 25000000)
|
||||
#define CY_RTS_DTR_SWAPPED(version) ((version) >= 0x48)
|
||||
|
||||
#ifdef CyDebug
|
||||
#define cd_inb(iobase, reg, cy_align) (++cd_inbs, *((iobase) + ((reg)*2 << (cy_align))))
|
||||
|
||||
Loading…
Reference in New Issue
Block a user