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[mips] [bhnd] Support of old PMU for BMIPS and siba SoC

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- Fix typo of PLL Type 4
 - Don't panic of frequency getters

Submitted by:	Hiroki Mori <yamori813@yahoo.co.jp>
Differential Revision:	https://reviews.freebsd.org/D10967
This commit is contained in:
Michael Zhilin 2017-05-28 12:05:16 +00:00
parent 3449821376
commit 97721228b8
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=319069
3 changed files with 12 additions and 6 deletions
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2
sys/dev/bhnd/cores/chipc/chipcreg.h
View File

@ -280,7 +280,7 @@ enum {
#define CHIPC_PLL_TYPE1 0x2 /* 48MHz base, 3 dividers */
#define CHIPC_PLL_TYPE2 0x4 /* 48MHz, 4 dividers */
#define CHIPC_PLL_TYPE3 0x6 /* 25MHz, 2 dividers */
#define CHIPC_PLL_TYPE4 0x8 /* 48MHz, 4 dividers */
#define CHIPC_PLL_TYPE4 0x1 /* 48MHz, 4 dividers */
#define CHIPC_PLL_TYPE5 0x3 /* 25MHz, 4 dividers */
#define CHIPC_PLL_TYPE6 0x5 /* 100/200 or 120/240 only */
#define CHIPC_PLL_TYPE7 0x7 /* 25MHz, 4 dividers */

12
sys/dev/bhnd/cores/chipc/pwrctl/bhnd_pwrctl_subr.c
View File

@ -374,7 +374,7 @@ bhnd_pwrctl_slowclk_freq(struct bhnd_pwrctl_softc *sc, bool max_freq)
} else if (PWRCTL_QUIRK(sc, SLOWCLK_CTL)) {
div = bhnd_bus_read_4(sc->res, CHIPC_PLL_SLOWCLK_CTL);
div = CHIPC_GET_BITS(div, CHIPC_SCC_CD);
div *= 4;
div = 4 * (div + 1);
} else if (PWRCTL_QUIRK(sc, INSTACLK_CTL)) {
if (max_freq) {
div = 1;
@ -503,7 +503,10 @@ bhnd_pwrctl_setclk(struct bhnd_pwrctl_softc *sc, bhnd_clock clock)
if (bhnd_get_hwrev(sc->chipc_dev) == 10)
return (ENODEV);
scc = bhnd_bus_read_4(sc->res, CHIPC_PLL_SLOWCLK_CTL);
if (PWRCTL_QUIRK(sc, SLOWCLK_CTL))
scc = bhnd_bus_read_4(sc->res, CHIPC_PLL_SLOWCLK_CTL);
else
scc = bhnd_bus_read_4(sc->res, CHIPC_SYS_CLK_CTL);
switch (clock) {
case BHND_CLOCK_HT:
@ -520,7 +523,10 @@ bhnd_pwrctl_setclk(struct bhnd_pwrctl_softc *sc, bhnd_clock clock)
return (ENODEV);
}
bhnd_bus_write_4(sc->res, CHIPC_PLL_SLOWCLK_CTL, scc);
if (PWRCTL_QUIRK(sc, SLOWCLK_CTL))
bhnd_bus_write_4(sc->res, CHIPC_PLL_SLOWCLK_CTL, scc);
else
bhnd_bus_write_4(sc->res, CHIPC_SYS_CLK_CTL, scc);
DELAY(CHIPC_PLL_DELAY);
break;

4
sys/mips/broadcom/bcm_pmu.c
View File

@ -208,7 +208,7 @@ bcm_get_uart_rclk(struct bcm_platform *bp)
uint64_t
bcm_get_alpfreq(struct bcm_platform *bp) {
if (!bcm_has_pmu(bp))
panic("%s requires PMU\n", __FUNCTION__);
return (BHND_PMU_ALP_CLOCK);
return (bhnd_pmu_alp_clock(bcm_get_pmu(bp)));
}
@ -217,7 +217,7 @@ bcm_get_alpfreq(struct bcm_platform *bp) {
uint64_t
bcm_get_ilpfreq(struct bcm_platform *bp) {
if (!bcm_has_pmu(bp))
panic("%s requires PMU\n", __FUNCTION__);
return (BHND_PMU_ILP_CLOCK);
return (bhnd_pmu_ilp_clock(bcm_get_pmu(bp)));
}