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Correct the SRR1 mask, it's 10-15 not 10-11.

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X-MFC-with:	r263464,r263752
This commit is contained in:
Justin Hibbits 2014-04-06 06:18:43 +00:00
parent 4ceda9d362
commit a1e7448e2c
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=264189
1 changed files with 1 additions and 1 deletions
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sys/powerpc/include/psl.h
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@ -96,7 +96,7 @@
#else
#define PSL_KERNSET (PSL_EE | PSL_ME | PSL_IR | PSL_DR | PSL_RI)
#endif
#define PSL_SRR1_MASK 0x78300000UL /* Bits 1-4, 10-15 (ppc32), 33-36, 42-47 (ppc64) */
#define PSL_SRR1_MASK 0x783f0000UL /* Bits 1-4, 10-15 (ppc32), 33-36, 42-47 (ppc64) */
#endif
#define PSL_USERSET (PSL_KERNSET | PSL_PR)