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powerpc: clean up empty lines in .c and .h files

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This commit is contained in:
Mateusz Guzik 2020-09-01 21:20:08 +00:00
parent ed83a56181
commit b64b31338f
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=365073
148 changed files with 163 additions and 417 deletions
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3
sys/powerpc/aim/aim_machdep.c
View File

@ -391,7 +391,6 @@ aim_cpu_init(vm_offset_t toc)
bcopy(&restorebridge, (void *)EXC_TRC, trap_offset);
bcopy(&restorebridge, (void *)EXC_BPT, trap_offset);
} else {
/*
* Use an IBAT and a DBAT to map the bottom 256M segment.
*
@ -572,7 +571,6 @@ cpu_machine_check(struct thread *td, struct trapframe *frame, int *ucode)
return (SIGBUS);
}
#ifndef __powerpc64__
uint64_t
va_to_vsid(pmap_t pm, vm_offset_t va)
@ -779,4 +777,3 @@ cpu_sleep()
enable_vec(curthread);
powerpc_sync();
}

10
sys/powerpc/aim/mmu_oea.c
View File

@ -326,7 +326,6 @@ static int moea_map_user_ptr(pmap_t pm,
static int moea_decode_kernel_ptr(vm_offset_t addr,
int *is_user, vm_offset_t *decoded_addr);
static struct pmap_funcs moea_methods = {
.clear_modify = moea_clear_modify,
.copy_page = moea_copy_page,
@ -1573,14 +1572,14 @@ moea_map_user_ptr(pmap_t pm, volatile const void *uaddr,
return (EFAULT);
vsid = va_to_vsid(pm, (vm_offset_t)uaddr);
/* Mark segment no-execute */
vsid |= SR_N;
/* If we have already set this VSID, we can just return */
if (curthread->td_pcb->pcb_cpu.aim.usr_vsid == vsid)
return (0);
__asm __volatile("isync");
curthread->td_pcb->pcb_cpu.aim.usr_segm =
(uintptr_t)uaddr >> ADDR_SR_SHFT;
@ -1717,7 +1716,6 @@ moea_pinit(pmap_t pmap)
pmap->pmap_phys = pmap;
}
mtx_lock(&moea_vsid_mutex);
/*
* Allocate some segment registers for this pmap.
@ -2481,7 +2479,6 @@ moea_query_bit(vm_page_t m, int ptebit)
return (TRUE);
LIST_FOREACH(pvo, vm_page_to_pvoh(m), pvo_vlink) {
/*
* See if we saved the bit off. If so, cache it and return
* success.
@ -2499,7 +2496,6 @@ moea_query_bit(vm_page_t m, int ptebit)
*/
powerpc_sync();
LIST_FOREACH(pvo, vm_page_to_pvoh(m), pvo_vlink) {
/*
* See if this pvo has a valid PTE. if so, fetch the
* REF/CHG bits from the valid PTE. If the appropriate

7
sys/powerpc/aim/mmu_oea64.c
View File

@ -316,7 +316,6 @@ static void *moea64_dump_pmap_init(unsigned blkpgs);
static void moea64_page_array_startup(long);
#endif
static struct pmap_funcs moea64_methods = {
.clear_modify = moea64_clear_modify,
.copy_page = moea64_copy_page,
@ -408,7 +407,6 @@ alloc_pvo_entry(int bootstrap)
return (pvo);
}
static void
init_pvo_entry(struct pvo_entry *pvo, pmap_t pmap, vm_offset_t va)
{
@ -445,7 +443,7 @@ moea64_pte_from_pvo(const struct pvo_entry *pvo, struct lpte *lpte)
lpte->pte_hi = moea64_pte_vpn_from_pvo_vpn(pvo);
lpte->pte_hi |= LPTE_VALID;
if (pvo->pvo_vaddr & PVO_LARGE)
lpte->pte_hi |= LPTE_BIG;
if (pvo->pvo_vaddr & PVO_WIRED)
@ -1688,7 +1686,7 @@ moea64_uma_page_alloc(uma_zone_t zone, vm_size_t bytes, int domain,
if (needed_lock)
PMAP_UNLOCK(kernel_pmap);
if ((wait & M_ZERO) && (m->flags & PG_ZERO) == 0)
bzero((void *)va, PAGE_SIZE);
@ -2373,7 +2371,6 @@ moea64_release_vsid(uint64_t vsid)
moea64_vsid_bitmap[idx] &= ~mask;
mtx_unlock(&moea64_slb_mutex);
}
void
moea64_release(pmap_t pmap)

2
sys/powerpc/aim/mmu_oea64.h
View File

@ -83,7 +83,6 @@ int64_t moea64_pte_unset(struct pvo_entry *);
int64_t moea64_pte_clear(struct pvo_entry *, uint64_t);
int64_t moea64_pte_synch(struct pvo_entry *);
typedef int64_t (*moea64_pte_replace_t)(struct pvo_entry *, int);
typedef int64_t (*moea64_pte_insert_t)(struct pvo_entry *);
typedef int64_t (*moea64_pte_unset_t)(struct pvo_entry *);
@ -131,4 +130,3 @@ extern u_long moea64_pteg_mask;
extern int n_slbs;
#endif /* _POWERPC_AIM_MMU_OEA64_H */

17
sys/powerpc/aim/mmu_radix.c
View File

@ -25,11 +25,9 @@
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
#include <sys/param.h>
#include <sys/kernel.h>
#include <sys/systm.h>
@ -597,8 +595,6 @@ static int pmap_change_attr_locked(vm_offset_t va, vm_size_t size, int mode, boo
#define UNIMPLEMENTED() panic("%s not implemented", __func__)
#define UNTESTED() panic("%s not yet tested", __func__)
/* Number of supported PID bits */
static unsigned int isa3_pid_bits;
@ -608,7 +604,6 @@ static unsigned int isa3_base_pid;
#define PROCTAB_SIZE_SHIFT (isa3_pid_bits + 4)
#define PROCTAB_ENTRIES (1ul << isa3_pid_bits)
/*
* Map of physical memory regions.
*/
@ -712,7 +707,6 @@ static struct md_page pv_dummy;
*/
#define RTS_SIZE ((0x2UL << 61) | (0x5UL << 5))
static int powernv_enabled = 1;
static __always_inline void
@ -846,7 +840,6 @@ pa_cmp(const void *a, const void *b)
#define PG_PTE_PROMOTE (PG_X | PG_MANAGED | PG_W | PG_PTE_CACHE | \
PG_M | PG_A | RPTE_EAA_MASK | PG_V)
static __inline void
pmap_resident_count_inc(pmap_t pmap, int count)
{
@ -3069,7 +3062,6 @@ out:
return (rv);
}
/*
* Tries to create a read- and/or execute-only 2MB page mapping. Returns true
* if successful. Returns false if (1) a page table page cannot be allocated
@ -4914,7 +4906,6 @@ pmap_demote_l3e_locked(pmap_t pmap, pml3_entry_t *l3e, vm_offset_t va,
if ((oldpde & PG_MANAGED) != 0)
pmap_pv_demote_l3e(pmap, va, oldpde & PG_PS_FRAME, lockp);
atomic_add_long(&pmap_l3e_demotions, 1);
CTR2(KTR_PMAP, "pmap_demote_l3e: success for va %#lx"
" in pmap %p", va, pmap);
@ -5000,7 +4991,6 @@ pmap_remove_l3e(pmap_t pmap, pml3_entry_t *pdq, vm_offset_t sva,
return (pmap_unuse_pt(pmap, sva, *pmap_pml2e(pmap, sva), free));
}
/*
* pmap_remove_pte: do the things to unmap a page in a process
*/
@ -5103,7 +5093,6 @@ pmap_remove_ptes(pmap_t pmap, vm_offset_t sva, vm_offset_t eva,
return (anyvalid);
}
void
mmu_radix_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
{
@ -5147,7 +5136,6 @@ mmu_radix_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
lock = NULL;
for (; sva < eva; sva = va_next) {
if (pmap->pm_stats.resident_count == 0)
break;
l1e = pmap_pml1e(pmap, sva);
@ -5683,9 +5671,6 @@ mmu_radix_zero_page_area(vm_page_t m, int off, int size)
memset(addr + off, 0, size);
}
static int
mmu_radix_mincore(pmap_t pmap, vm_offset_t addr, vm_paddr_t *locked_pa)
{
@ -6272,7 +6257,6 @@ pmap_change_attr_locked(vm_offset_t va, vm_size_t size, int mode, bool flush)
if (flush)
pmap_invalidate_cache_range(base, tmpva);
}
return (error);
}
@ -6404,4 +6388,3 @@ DB_SHOW_COMMAND(pte, pmap_print_pte)
}
#endif

2
sys/powerpc/aim/moea64_native.c
View File

@ -282,7 +282,7 @@ moea64_pte_synch_native(struct pvo_entry *pvo)
ptelo = be64toh(pt->pte_lo);
rw_runlock(&moea64_eviction_lock);
return (ptelo & (LPTE_REF | LPTE_CHG));
}

1
sys/powerpc/aim/mp_cpudep.c
View File

@ -425,4 +425,3 @@ cpudep_ap_setup()
break;
}
}

3
sys/powerpc/aim/slb.c
View File

@ -100,7 +100,6 @@ esid2idx(uint64_t esid, int level)
#define uad_baseok(ua) \
(esid2base(ua->ua_base, ua->ua_level) == ua->ua_base)
static inline uint64_t
esid2base(uint64_t esid, int level)
{
@ -561,7 +560,7 @@ handle_kernel_slb_spill(int type, register_t dar, register_t srr0)
slbcache = PCPU_GET(aim.slb);
esid = (uintptr_t)addr >> ADDR_SR_SHFT;
slbe = (esid << SLBE_ESID_SHIFT) | SLBE_VALID;
/* See if the hardware flushed this somehow (can happen in LPARs) */
for (i = 0; i < n_slbs; i++)
if (slbcache[i].slbe == (slbe | (uint64_t)i))

6
sys/powerpc/amigaone/cpld_a1222.c
View File

@ -165,10 +165,10 @@ cpld_read_pair(struct cpld_softc *sc, int addr)
KASSERT(addr <= 0xff, ("Invalid register-pair base address %x.", addr));
bus_write_1(sc->sc_mem, CPLD_MEM_ADDR_H, addr);
tmp = bus_read_1(sc->sc_mem, CPLD_MEM_DATA) << 8;
bus_write_1(sc->sc_mem, CPLD_MEM_ADDR_H, addr + 1);
tmp |= bus_read_1(sc->sc_mem, CPLD_MEM_DATA);
return (tmp);
}
@ -317,7 +317,7 @@ cpld_send(device_t dev, struct cpld_cmd_data *d)
if (d->cmd > USHRT_MAX)
return (EINVAL);
sc = device_get_softc(dev);
mtx_lock(&sc->sc_mutex);

2
sys/powerpc/amigaone/cpld_x5000.c
View File

@ -255,7 +255,7 @@ cpld_send(device_t dev, struct cpld_cmd_data *d)
if (d->cmd > USHRT_MAX)
return (EINVAL);
sc = device_get_softc(dev);
mtx_lock(&sc->sc_mutex);

3
sys/powerpc/booke/booke_machdep.c
View File

@ -360,7 +360,7 @@ booke_init(u_long arg1, u_long arg2)
* string 0x45504150 ('EPAP') in r6 (which has been lost by now).
* r4 (arg2) is supposed to be set to zero, but is not always.
*/
if (arg1 == 0) /* Juniper loader */
mdp = (void *)arg2;
else if (booke_check_for_fdt(arg1, &dtbp) == 0) { /* ePAPR */
@ -471,4 +471,3 @@ kdb_cpu_set_singlestep(void)
mtspr(SPR_DBCR0, r | DBCR0_IC | DBCR0_IDM);
kdb_frame->srr1 |= PSL_DE;
}

1
sys/powerpc/booke/platform_bare.c
View File

@ -159,4 +159,3 @@ bare_reset(platform_t plat)
while (1)
;
}

26
sys/powerpc/booke/pmap.c
View File

@ -354,7 +354,6 @@ static int mmu_booke_decode_kernel_ptr(vm_offset_t addr,
static void mmu_booke_page_array_startup(long);
static boolean_t mmu_booke_page_is_mapped(vm_page_t m);
static struct pmap_funcs mmu_booke_methods = {
/* pmap dispatcher interface */
.clear_modify = mmu_booke_clear_modify,
@ -475,7 +474,6 @@ tlb_miss_lock(void)
STAILQ_FOREACH(pc, &cpuhead, pc_allcpu) {
if (pc != pcpup) {
CTR3(KTR_PMAP, "%s: tlb miss LOCK of CPU=%d, "
"tlb_lock=%p", __func__, pc->pc_cpuid, pc->pc_booke.tlb_lock);
@ -561,7 +559,6 @@ pv_free(pv_entry_t pve)
uma_zfree(pvzone, pve);
}
/* Allocate and initialize pv_entry structure. */
static void
pv_insert(pmap_t pmap, vm_offset_t va, vm_page_t m)
@ -842,7 +839,6 @@ mmu_booke_bootstrap(vm_offset_t start, vm_offset_t kernelend)
debugf("fill in phys_avail:\n");
for (i = 0, j = 0; i < availmem_regions_sz; i++, j += 2) {
debugf(" region: 0x%jx - 0x%jx (0x%jx)\n",
(uintmax_t)availmem_regions[i].mr_start,
(uintmax_t)availmem_regions[i].mr_start +
@ -930,7 +926,7 @@ mmu_booke_bootstrap(vm_offset_t start, vm_offset_t kernelend)
(uintmax_t)kstack0_phys, (uintmax_t)kstack0_phys + kstack0_sz);
debugf("kstack0 at 0x%"PRI0ptrX" - 0x%"PRI0ptrX"\n",
kstack0, kstack0 + kstack0_sz);
virtual_avail += KSTACK_GUARD_PAGES * PAGE_SIZE + kstack0_sz;
for (i = 0; i < kstack_pages; i++) {
mmu_booke_kenter(kstack0, kstack0_phys);
@ -939,7 +935,7 @@ mmu_booke_bootstrap(vm_offset_t start, vm_offset_t kernelend)
}
pmap_bootstrapped = 1;
debugf("virtual_avail = %"PRI0ptrX"\n", virtual_avail);
debugf("virtual_end = %"PRI0ptrX"\n", virtual_end);
@ -1034,7 +1030,7 @@ mmu_booke_kextract(vm_offset_t va)
if (va >= VM_MIN_KERNEL_ADDRESS && va <= VM_MAX_KERNEL_ADDRESS)
p = pte_vatopa(kernel_pmap, va);
if (p == 0) {
/* Check TLB1 mappings */
for (i = 0; i < TLB1_ENTRIES; i++) {
@ -1148,9 +1144,8 @@ mmu_booke_kenter_attr(vm_offset_t va, vm_paddr_t pa, vm_memattr_t ma)
mtx_lock_spin(&tlbivax_mutex);
tlb_miss_lock();
if (PTE_ISVALID(pte)) {
CTR1(KTR_PMAP, "%s: replacing entry!", __func__);
/* Flush entry from TLB0 */
@ -1188,7 +1183,6 @@ mmu_booke_kremove(vm_offset_t va)
pte = pte_find(kernel_pmap, va);
if (!PTE_ISVALID(pte)) {
CTR1(KTR_PMAP, "%s: invalid pte", __func__);
return;
@ -1599,7 +1593,7 @@ mmu_booke_activate(struct thread *td)
cpuid = PCPU_GET(cpuid);
CPU_SET_ATOMIC(cpuid, &pmap->pm_active);
PCPU_SET(curpmap, pmap);
if (pmap->pm_tid[cpuid] == TID_NONE)
tid_alloc(pmap);
@ -1624,7 +1618,7 @@ mmu_booke_deactivate(struct thread *td)
pmap_t pmap;
pmap = &td->td_proc->p_vmspace->vm_pmap;
CTR5(KTR_PMAP, "%s: td=%p, proc = '%s', id = %d, pmap = 0x%"PRI0ptrX,
__func__, td, td->td_proc->p_comm, td->td_proc->p_pid, pmap);
@ -2464,7 +2458,6 @@ tid_alloc(pmap_t pmap)
/* If we are stealing TID then clear the relevant pmap's field */
if (tidbusy[thiscpu][tid] != NULL) {
CTR2(KTR_PMAP, "%s: warning: stealing tid %d", __func__, tid);
tidbusy[thiscpu][tid]->pm_tid[thiscpu] = TID_NONE;
@ -2516,7 +2509,6 @@ tlb0_flush_entry(vm_offset_t va)
CTR1(KTR_PMAP, "%s: e", __func__);
}
/**************************************************************************/
/* TLB1 handling */
/**************************************************************************/
@ -2890,7 +2882,7 @@ pmap_early_io_map(vm_paddr_t pa, vm_size_t size)
tlb_entry_t e;
KASSERT(!pmap_bootstrapped, ("Do not use after PMAP is up!"));
for (i = 0; i < TLB1_ENTRIES; i++) {
tlb1_read_entry(&e, i);
if (!(e.mas1 & MAS1_VALID))
@ -2943,7 +2935,6 @@ out:
rw_wunlock(&pvh_global_lock);
}
/*
* Setup MAS4 defaults.
* These values are loaded to MAS0-2 on a TLB miss.
@ -2963,7 +2954,6 @@ set_mas4_defaults(void)
__asm __volatile("isync");
}
/*
* Return 0 if the physical IO range is encompassed by one of the
* the TLB1 entries, otherwise return related error code.
@ -3068,7 +3058,6 @@ DB_SHOW_COMMAND(tlb0, tlb0_print_tlbentries)
printf("TLB0 entries:\n");
for (way = 0; way < TLB0_WAYS; way ++)
for (entryidx = 0; entryidx < TLB0_ENTRIES_PER_WAY; entryidx++) {
mas0 = MAS0_TLBSEL(0) | MAS0_ESEL(way);
mtspr(SPR_MAS0, mas0);
@ -3102,7 +3091,6 @@ DB_SHOW_COMMAND(tlb1, tlb1_print_tlbentries)
printf("TLB1 entries:\n");
for (i = 0; i < TLB1_ENTRIES; i++) {
mas0 = MAS0_TLBSEL(1) | MAS0_ESEL(i);
mtspr(SPR_MAS0, mas0);

10
sys/powerpc/booke/pmap_32.c
View File

@ -162,7 +162,6 @@ static struct ptbl_buf *ptbl_bufs;
/* Page table related */
/**************************************************************************/
/* Initialize pool of kva ptbl buffers. */
static void
ptbl_init(void)
@ -323,7 +322,7 @@ ptbl_free(pmap_t pmap, unsigned int pdir_idx)
*/
mtx_lock_spin(&tlbivax_mutex);
tlb_miss_lock();
pmap->pm_pdir[pdir_idx] = NULL;
tlb_miss_unlock();
@ -458,7 +457,6 @@ pte_remove(pmap_t pmap, vm_offset_t va, uint8_t flags)
/* Handle managed entry. */
if (PTE_ISMANAGED(pte)) {
if (PTE_ISMODIFIED(pte))
vm_page_dirty(m);
@ -553,7 +551,7 @@ pte_enter(pmap_t pmap, vm_page_t m, vm_offset_t va, uint32_t flags,
}
pmap->pm_stats.resident_count++;
pte_tmp = PTE_RPN_FROM_PA(VM_PAGE_TO_PHYS(m));
pte_tmp |= (PTE_VALID | flags | PTE_PS_4KB); /* 4KB pages only */
@ -735,7 +733,7 @@ mmu_booke_sync_icache(pmap_t pm, vm_offset_t va, vm_size_t sz)
vm_page_t m;
vm_offset_t addr;
int active;
rw_wlock(&pvh_global_lock);
pmap = PCPU_GET(curpmap);
active = (pm == kernel_pmap || pm == pmap) ? 1 : 0;
@ -950,7 +948,6 @@ tid_flush(tlbtid_t tid)
uint32_t mas0, mas1, mas2;
int entry, way;
/* Don't evict kernel translations */
if (tid == TID_KERNEL)
return;
@ -975,7 +972,6 @@ tid_flush(tlbtid_t tid)
for (way = 0; way < TLB0_WAYS; way++)
for (entry = 0; entry < TLB0_ENTRIES_PER_WAY; entry++) {
mas0 = MAS0_TLBSEL(0) | MAS0_ESEL(way);
mtspr(SPR_MAS0, mas0);

5
sys/powerpc/booke/pmap_64.c
View File

@ -408,7 +408,6 @@ pte_remove(pmap_t pmap, vm_offset_t va, u_int8_t flags)
/* Handle managed entry. */
if (PTE_ISMANAGED(pte)) {
/* Handle modified pages. */
if (PTE_ISMODIFIED(pte))
vm_page_dirty(m);
@ -519,7 +518,6 @@ pte_vatopa(pmap_t pmap, vm_offset_t va)
return (pa);
}
/* allocate pte entries to manage (addr & mask) to (addr & mask) + size */
static void
kernel_pte_alloc(vm_offset_t data_end, vm_offset_t addr)
@ -590,7 +588,6 @@ mmu_booke_alloc_kernel_pgtables(vm_offset_t data_end)
return (data_end);
}
/*
* Initialize a preallocated and zeroed pmap structure,
* such as one in a vmspace structure.
@ -645,7 +642,7 @@ mmu_booke_sync_icache(pmap_t pm, vm_offset_t va, vm_size_t sz)
pte_t *pte;
vm_paddr_t pa = 0;
int sync_sz, valid;
while (sz > 0) {
PMAP_LOCK(pm);
pte = pte_find(pm, va);

3
sys/powerpc/booke/spe.c
View File

@ -197,7 +197,6 @@ save_vec_nodrop(struct thread *td)
}
}
#define SPE_INST_MASK 0x31f
#define EADD 0x200
#define ESUB 0x201
@ -485,7 +484,7 @@ spe_handle_fpdata(struct trapframe *frame)
uint32_t msr;
err = fueword32((void *)frame->srr0, &instr);
if (err != 0)
return;
/* Fault. */;

6
sys/powerpc/cpufreq/dfs.c
View File

@ -62,7 +62,6 @@ static device_method_t dfs_methods[] = {
DEVMETHOD(cpufreq_drv_get, dfs_get),
DEVMETHOD(cpufreq_drv_type, dfs_type),
DEVMETHOD(cpufreq_drv_settings, dfs_settings),
{0, 0}
};
@ -170,7 +169,7 @@ static int
dfs_set(device_t dev, const struct cf_setting *set)
{
register_t hid1;
if (set == NULL)
return (EINVAL);
@ -181,7 +180,7 @@ dfs_set(device_t dev, const struct cf_setting *set)
hid1 |= HID1_DFS2;
else if (set->freq == 2500)
hid1 |= HID1_DFS4;
/*
* Now set the HID1 register with new values. Calling sequence
* taken from page 2-26 of the MPC7450 family CPU manual.
@ -229,4 +228,3 @@ dfs_type(device_t dev, int *type)
*type = CPUFREQ_TYPE_RELATIVE;
return (0);
}

10
sys/powerpc/cpufreq/mpc85xx_jog.c
View File

@ -88,7 +88,6 @@ static device_method_t mpc85xx_jog_methods[] = {
DEVMETHOD(cpufreq_drv_get, mpc85xx_jog_get),
DEVMETHOD(cpufreq_drv_type, mpc85xx_jog_type),
DEVMETHOD(cpufreq_drv_settings, mpc85xx_jog_settings),
{0, 0}
};
@ -154,7 +153,7 @@ mpc85xx_jog_identify(driver_t *driver, device_t parent)
compat = mpc85xx_jog_devcompat();
if (compat == NULL)
return;
/*
* We attach a child for every CPU since settings need to
* be performed on every CPU in the SMP case.
@ -200,7 +199,7 @@ mpc85xx_jog_attach(device_t dev)
OF_getencprop(cpu, "reg", &sc->cpu, sizeof(sc->cpu));
reg = ccsr_read4(GUTS_PORPLLSR);
/*
* Assume power-on PLL is the highest PLL config supported on the
* board.
@ -290,7 +289,7 @@ mpc85xx_jog_set(device_t dev, const struct cf_setting *set)
{
struct mpc85xx_jog_softc *sc;
struct jog_rv_args args;
if (set == NULL)
return (EINVAL);
@ -323,7 +322,7 @@ mpc85xx_jog_get(device_t dev, struct cf_setting *set)
freq = PMJCR_GET_CORE_MULT(pmjcr, sc->cpu);
freq *= mpc85xx_get_system_clock();
freq /= MHZ;
set->freq = freq;
set->dev = dev;
@ -340,4 +339,3 @@ mpc85xx_jog_type(device_t dev, int *type)
*type = CPUFREQ_TYPE_ABSOLUTE;
return (0);
}

4
sys/powerpc/cpufreq/pcr.c
View File

@ -65,7 +65,6 @@ static device_method_t pcr_methods[] = {
DEVMETHOD(cpufreq_drv_get, pcr_get),
DEVMETHOD(cpufreq_drv_type, pcr_type),
DEVMETHOD(cpufreq_drv_settings, pcr_settings),
{0, 0}
};
@ -266,7 +265,7 @@ pcr_set(device_t dev, const struct cf_setting *set)
struct pcr_softc *sc;
register_t pcr, msr;
uint64_t psr;
if (set == NULL)
return (EINVAL);
sc = device_get_softc(dev);
@ -342,4 +341,3 @@ pcr_type(device_t dev, int *type)
*type = CPUFREQ_TYPE_RELATIVE;
return (0);
}

4
sys/powerpc/cpufreq/pmcr.c
View File

@ -102,7 +102,6 @@ static device_method_t pmcr_methods[] = {
DEVMETHOD(cpufreq_drv_get, pmcr_get),
DEVMETHOD(cpufreq_drv_type, pmcr_type),
DEVMETHOD(cpufreq_drv_settings, pmcr_settings),
{0, 0}
};
@ -186,7 +185,7 @@ static int
pmcr_set(device_t dev, const struct cf_setting *set)
{
register_t pmcr;
if (set == NULL)
return (EINVAL);
@ -245,4 +244,3 @@ pmcr_type(device_t dev, int *type)
*type = CPUFREQ_TYPE_ABSOLUTE;
return (0);
}

2
sys/powerpc/cpufreq/pmufreq.c
View File

@ -70,7 +70,6 @@ static device_method_t pmufreq_methods[] = {
DEVMETHOD(cpufreq_drv_get, pmufreq_get),
DEVMETHOD(cpufreq_drv_type, pmufreq_type),
DEVMETHOD(cpufreq_drv_settings, pmufreq_settings),
{0, 0}
};
@ -220,4 +219,3 @@ pmufreq_type(device_t dev, int *type)
*type = CPUFREQ_TYPE_ABSOLUTE;
return (0);
}

1
sys/powerpc/fpu/fpu_arith.h
View File

@ -57,7 +57,6 @@
* for example.
*/
#ifndef FPE_USE_ASM
/* set up for extended-precision arithemtic */

6
sys/powerpc/fpu/fpu_emu.c
View File

@ -179,7 +179,6 @@ fpu_dumpfpn(struct fpn *fp)
#define NOTFPU 2 /* not an FPU instruction */
#define FAULT 3
/*
* Emulate a floating-point instruction.
* Return zero for success, else signal number.
@ -208,7 +207,6 @@ fpu_emulate(struct trapframe *frame, struct fpu *fpf)
DPRINTF(FPE_EX, ("fpu_emulate: emulating insn %x at %p\n",
insn.i_int, (void *)frame->srr0));
if ((insn.i_any.i_opcd == OPC_TWI) ||
((insn.i_any.i_opcd == OPC_integer_31) &&
(insn.i_x.i_xo == OPC31_TW))) {
@ -314,7 +312,6 @@ fpu_execute(struct trapframe *tf, struct fpemu *fe, union instr *insn)
cond = 0; /* ld/st never set condition codes */
if (instr.i_any.i_opcd == OPC_integer_31) {
if (instr.i_x.i_xo == OPC31_STFIWX) {
FPU_EMU_EVCNT_INCR(stfiwx);
@ -427,8 +424,6 @@ fpu_execute(struct trapframe *tf, struct fpemu *fe, union instr *insn)
#endif
} else if (instr.i_any.i_opcd == OPC_sp_fp_59 ||
instr.i_any.i_opcd == OPC_dp_fp_63) {
if (instr.i_any.i_opcd == OPC_dp_fp_63 &&
!(instr.i_a.i_xo & OPC63M_MASK)) {
/* Format X */
@ -436,7 +431,6 @@ fpu_execute(struct trapframe *tf, struct fpemu *fe, union instr *insn)
ra = instr.i_x.i_ra;
rb = instr.i_x.i_rb;
/* One of the special opcodes.... */
switch (instr.i_x.i_xo) {
case OPC63_FCMPU:

1
sys/powerpc/fpu/fpu_explode.c
View File

@ -220,7 +220,6 @@ fpu_explode(struct fpemu *fe, struct fpn *fp, int type, int reg)
fp->fp_sign = s >> 31;
fp->fp_sticky = 0;
switch (type) {
case FTYPE_LNG:
s = fpu_xtof(fp, l);
break;

1
sys/powerpc/fpu/fpu_extern.h
View File

@ -54,4 +54,3 @@ u_int fpu_ftoi(struct fpemu *, struct fpn *);
u_int fpu_ftox(struct fpemu *, struct fpn *, u_int *);
u_int fpu_ftos(struct fpemu *, struct fpn *);
u_int fpu_ftod(struct fpemu *, struct fpn *, u_int *);

5
sys/powerpc/fpu/fpu_implode.c
View File

@ -105,7 +105,6 @@ round(struct fpemu *fe, struct fpn *fp)
/* Go to rounddown to round down; break to round up. */
switch ((fe->fe_fpscr) & FPSCR_RN) {
case FP_RN:
default:
/*
@ -169,7 +168,6 @@ toinf(struct fpemu *fe, int sign)
/* look at rounding direction */
switch ((fe->fe_fpscr) & FPSCR_RN) {
default:
case FP_RN: /* the nearest value is always Inf */
inf = 1;
@ -206,7 +204,6 @@ fpu_ftoi(struct fpemu *fe, struct fpn *fp)
sign = fp->fp_sign;
switch (fp->fp_class) {
case FPC_ZERO:
return (0);
@ -253,7 +250,6 @@ fpu_ftox(struct fpemu *fe, struct fpn *fp, u_int *res)
sign = fp->fp_sign;
switch (fp->fp_class) {
case FPC_ZERO:
res[1] = 0;
return (0);
@ -432,7 +428,6 @@ fpu_implode(struct fpemu *fe, struct fpn *fp, int type, u_int *space)
{
switch (type) {
case FTYPE_LNG:
space[0] = fpu_ftox(fe, fp, space);
DPRINTF(FPE_REG, ("fpu_implode: long %x %x\n",

4
sys/powerpc/fpu/fpu_instr.h
View File

@ -48,7 +48,7 @@
*/
union instr {
int i_int; /* as a whole */
/*
* Any instruction type.
*/
@ -156,7 +156,6 @@ union instr {
u_int i_rc:1;
} i_mds;
/*
* Format S
*/
@ -385,4 +384,3 @@ union instr {
#define FTYPE_INT 0 /* data = 32-bit signed integer */
#define FTYPE_SNG 1 /* data = 32-bit float */
#define FTYPE_DBL 2 /* data = 64-bit double */

1
sys/powerpc/include/altivec.h
View File

@ -39,4 +39,3 @@ void save_vec(struct thread *);
void save_vec_nodrop(struct thread *);
#endif /* _MACHINE_ALTIVEC_H_ */

2
sys/powerpc/include/atomic.h
View File

@ -228,7 +228,6 @@ _ATOMIC_ADD(long)
} \
/* _ATOMIC_CLEAR */
_ATOMIC_CLEAR(int)
_ATOMIC_CLEAR(long)
@ -726,7 +725,6 @@ atomic_cmpset_long(volatile u_long* p, u_long cmpval, u_long newval)
ATOMIC_CMPSET_ACQ_REL(int);
ATOMIC_CMPSET_ACQ_REL(long);
#ifdef ISA_206_ATOMICS
#define atomic_cmpset_8 atomic_cmpset_char
#endif

1
sys/powerpc/include/bat.h
View File

@ -113,7 +113,6 @@ struct bat {
#define BATL(pa, wimg, pp) \
(((pa) & BAT_PBS) | (wimg) | (pp))
/* Lower BAT bits (PowerPC 601): */
#define BAT601_PBN 0xfffe0000 /* physical block number */
#define BAT601_V 0x00000040 /* valid */

1
sys/powerpc/include/cpufunc.h
View File

@ -108,7 +108,6 @@ mfctrl(void)
return (value);
}
static __inline void
mtdec(register_t value)
{

1
sys/powerpc/include/mmuvar.h
View File

@ -200,7 +200,6 @@ extern mmu_t mmu_obj;
} while (mmu != NULL); \
f;})
#define MMU_DEF(name, ident, methods) \
\
const struct mmu_kobj name = { \

1
sys/powerpc/include/openpicreg.h
View File

@ -140,4 +140,3 @@
#define OPENPIC_PCPU_EOI(cpu) \
(OPENPIC_PCPU_BASE(cpu) + OPENPIC_EOI)

2
sys/powerpc/include/openpicvar.h
View File

@ -66,7 +66,7 @@ struct openpic_softc {
uint32_t sc_saved_prios[4];
struct openpic_timer sc_saved_timers[OPENPIC_TIMERS];
uint32_t sc_saved_vectors[OPENPIC_SRC_VECTOR_COUNT];
};
extern devclass_t openpic_devclass;

2
sys/powerpc/include/pcb.h
View File

@ -82,7 +82,7 @@ struct pcb {
uint64_t texasr;
uint64_t tfiar;
} pcb_htm;
struct ebb {
uint64_t ebbhr;
uint64_t ebbrr;

1
sys/powerpc/include/pio.h
View File

@ -178,7 +178,6 @@ __inlrb(volatile u_int32_t *a)
#define inlrb(a) (__inlrb((volatile u_int32_t *)(a)))
#define in32rb(a) inlrb(a)
static __inline void
__outsb(volatile u_int8_t *a, const u_int8_t *s, size_t c)
{

1
sys/powerpc/include/pmap.h
View File

@ -80,7 +80,6 @@
#include <vm/vm_radix.h>
#endif
/*
* The radix page table structure is described by levels 1-4.
* See Fig 33. on p. 1002 of Power ISA v3.0B

1
sys/powerpc/include/rtas.h
View File

@ -60,4 +60,3 @@ cell_t rtas_token_lookup(const char *method);
#define RTAS_VENDOR_ERROR_BEGIN -9004
#endif /* _MACHINE_RTAS_H_ */

3
sys/powerpc/include/spr.h
View File

@ -39,7 +39,6 @@
__asm __volatile("mfspr %0,%1" : "=r"(val) : "K"(reg)); \
val; } )
#ifndef __powerpc64__
/* The following routines allow manipulation of the full 64-bit width
@ -246,7 +245,7 @@
#define FSL_E300C4 0x8086
#define LPCR_PECE_WAKESET (LPCR_PECE_EXT | LPCR_PECE_DECR | LPCR_PECE_ME)
#define SPR_DBSR 0x130 /* ..8 Debug Status Register */
#define DBSR_IDE 0x80000000 /* Imprecise debug event. */
#define DBSR_UDE 0x40000000 /* Unconditional debug event. */

1
sys/powerpc/include/trap.h
View File

@ -113,7 +113,6 @@
/* Trap was in user mode */
#define EXC_USER 0x10000
/*
* EXC_ALI sets bits in the DSISR and DAR to provide enough
* information to recover from the unaligned access without needing to

1
sys/powerpc/mambo/mambo.c
View File

@ -98,4 +98,3 @@ mambobus_attach(device_t dev)
bus_generic_probe(dev);
return (bus_generic_attach(dev));
}

2
sys/powerpc/mikrotik/rb_led.c
View File

@ -113,7 +113,7 @@ rbled_attach(device_t dev)
if (OF_getprop(node, "user_led", gp, sizeof(gp)) <= 0)
return (ENXIO);
sc->sc_gpio = OF_device_from_xref(gp[0]);
if (sc->sc_gpio == NULL) {
device_printf(dev, "No GPIO resource found!\n");

1
sys/powerpc/mpc85xx/atpic.c
View File

@ -242,7 +242,6 @@ atpic_isa_attach(device_t dev)
return (error);
}
/*
* PIC interface.
*/

1
sys/powerpc/mpc85xx/ds1553_bus_fdt.c
View File

@ -64,7 +64,6 @@ static device_method_t rtc_methods[] = {
/* clock interface */
DEVMETHOD(clock_gettime, ds1553_gettime),
DEVMETHOD(clock_settime, ds1553_settime),
{ 0, 0 }
};

1
sys/powerpc/mpc85xx/ds1553_reg.h
View File

@ -85,7 +85,6 @@
#define DS1553_MASK_SECONDS 0x7f
struct ds1553_softc {
bus_space_tag_t sc_bst; /* bus space tag */
bus_space_handle_t sc_bsh; /* bus space handle */

2
sys/powerpc/mpc85xx/fsl_diu.c
View File

@ -413,7 +413,7 @@ diu_attach(device_t dev)
sc->sc_info.fb_pbase = (intptr_t)vtophys(sc->sc_info.fb_vbase);
sc->sc_info.fb_flags = FB_FLAG_MEMATTR;
sc->sc_info.fb_memattr = VM_MEMATTR_DEFAULT;
/* Gamma table is 3 consecutive segments of 256 bytes. */
sc->sc_gamma = contigmalloc(3 * 256, M_DEVBUF, 0, 0,
BUS_SPACE_MAXADDR_32BIT, PAGE_SIZE, 0);

1
sys/powerpc/mpc85xx/fsl_sata.c
View File

@ -58,7 +58,6 @@ struct fsl_sata_slot;
enum fsl_sata_err_type;
struct fsl_sata_cmd_tab;
/* local prototypes */
static int fsl_sata_init(device_t dev);
static int fsl_sata_deinit(device_t dev);

1
sys/powerpc/mpc85xx/fsl_sata.h
View File

@ -138,4 +138,3 @@
#define ATA_SC_IPM_DIS_PARTIAL 0x00000100
#define ATA_SC_IPM_DIS_SLUMBER 0x00000200
#define ATA_SC_IPM_DIS_DEVSLEEP 0x00000400

3
sys/powerpc/mpc85xx/i2c.c
View File

@ -114,7 +114,6 @@ static device_method_t i2c_methods[] = {
DEVMETHOD(iicbus_write, i2c_write),
DEVMETHOD(iicbus_transfer, iicbus_transfer_gen),
DEVMETHOD(ofw_bus_get_node, i2c_get_node),
{ 0, 0 }
};
@ -252,7 +251,7 @@ i2c_repeated_start(device_t dev, u_char slave, int timeout)
{
struct i2c_softc *sc;
int error;
sc = device_get_softc(dev);
mtx_lock(&sc->mutex);

4
sys/powerpc/mpc85xx/lbc.c
View File

@ -110,7 +110,6 @@ static device_method_t lbc_methods[] = {
DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name),
DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node),
DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type),
{ 0, 0 }
};
@ -384,7 +383,6 @@ fdt_lbc_reg_decode(phandle_t node, struct lbc_softc *sc,
regptr = reg;
for (i = 0; i < tuples; i++) {
bank = fdt_data_get((void *)reg, 1);
di->di_bank = bank;
reg += 1;
@ -562,7 +560,6 @@ lbc_attach(device_t dev)
start = 0;
size = 0;
for (i = 0; i < tuples; i++) {
/* The first cell is the bank (chip select) number. */
bank = fdt_data_get(ranges, 1);
if (bank < 0 || bank > LBC_DEV_MAX) {
@ -623,7 +620,6 @@ lbc_attach(device_t dev)
* Walk the localbus and add direct subordinates as our children.
*/
for (child = OF_child(node); child != 0; child = OF_peer(child)) {
di = malloc(sizeof(*di), M_LBC, M_WAITOK | M_ZERO);
if (ofw_bus_gen_setup_devinfo(&di->di_ofw, child) != 0) {

1
sys/powerpc/mpc85xx/mpc85xx.c
View File

@ -56,7 +56,6 @@ __FBSDID("$FreeBSD$");
#include <powerpc/mpc85xx/mpc85xx.h>
/*
* MPC85xx system specific routines
*/

2
sys/powerpc/mpc85xx/mpc85xx_gpio.c
View File

@ -170,7 +170,7 @@ mpc85xx_gpio_pin_toggle(device_t dev, uint32_t pin)
val = bus_read_4(sc->out_res, 0);
val ^= (1 << (31 - pin));
bus_write_4(sc->out_res, 0, val);
GPIO_UNLOCK(sc);
return (0);

2
sys/powerpc/mpc85xx/pci_mpc85xx.c
View File

@ -625,7 +625,6 @@ fsl_pcib_outbound(struct fsl_pcib_softc *sc, int wnd, int res, uint64_t start,
bus_space_write_4(sc->sc_bst, sc->sc_bsh, REG_POWAR(wnd), attr);
}
static void
fsl_pcib_err_init(device_t dev)
{
@ -827,7 +826,6 @@ static int fsl_pcib_map_msi(device_t dev, device_t child,
return (0);
}
/*
* Linux device trees put the msi@<x> as children of the SoC, with ranges based
* on the CCSR. Since rman doesn't permit overlapping or sub-ranges between

6
sys/powerpc/mpc85xx/platform_mpc85xx.c
View File

@ -569,7 +569,6 @@ dummy_freeze(device_t dev, bool freeze)
/* Nothing to do here, move along. */
}
/* QorIQ Run control/power management timebase management. */
#define RCPM_CTBENR 0x00000084
@ -583,7 +582,7 @@ mpc85xx_rcpm_freeze_timebase(device_t dev, bool freeze)
struct mpc85xx_rcpm_softc *sc;
sc = device_get_softc(dev);
if (freeze)
bus_write_4(sc->sc_mem, RCPM_CTBENR, 0);
else
@ -634,7 +633,6 @@ static driver_t mpc85xx_rcpm_driver = {
EARLY_DRIVER_MODULE(mpc85xx_rcpm, simplebus, mpc85xx_rcpm_driver,
mpc85xx_rcpm_devclass, 0, 0, BUS_PASS_BUS);
/* "Global utilities" power management/Timebase management. */
#define GUTS_DEVDISR 0x00000070
@ -652,7 +650,7 @@ mpc85xx_guts_freeze_timebase(device_t dev, bool freeze)
uint32_t devdisr;
sc = device_get_softc(dev);
devdisr = bus_read_4(sc->sc_mem, GUTS_DEVDISR);
if (freeze)
bus_write_4(sc->sc_mem, GUTS_DEVDISR,

3
sys/powerpc/mpc85xx/qoriq_gpio.c
View File

@ -67,7 +67,6 @@ __FBSDID("$FreeBSD$");
#define GPIO_GPIMR 0x10
#define GPIO_GPICR 0x14
struct qoriq_gpio_softc {
device_t dev;
device_t busdev;
@ -209,7 +208,7 @@ qoriq_gpio_pin_toggle(device_t dev, uint32_t pin)
val = bus_read_4(sc->sc_mem, GPIO_GPDAT);
val ^= (1 << (31 - pin));
bus_write_4(sc->sc_mem, GPIO_GPDAT, val);
GPIO_UNLOCK(sc);
return (0);

1
sys/powerpc/ofw/ofw_initrd.c
View File

@ -109,4 +109,3 @@ ofw_initrd_probe_and_attach(void *junk)
start, end);
}
}

5
sys/powerpc/ofw/ofw_machdep.c
View File

@ -122,7 +122,7 @@ ofw_sprg_prepare(void)
{
if (ofw_real_mode)
return;
/*
* Assume that interrupt are disabled at this point, or
* SPRG1-3 could be trashed
@ -154,7 +154,7 @@ ofw_sprg_restore(void)
{
if (ofw_real_mode)
return;
/*
* Note that SPRG1-3 contents are irrelevant. They are scratch
* registers used in the early portion of trap handling when
@ -869,4 +869,3 @@ OF_decode_addr(phandle_t dev, int regno, bus_space_tag_t *tag,
return (bus_space_map(*tag, addr, size, flags, handle));
}

1
sys/powerpc/ofw/ofw_pcib_pci.c
View File

@ -173,4 +173,3 @@ ofw_pcib_pci_route_interrupt(device_t bridge, device_t dev, int intpin)
return (PCIB_ROUTE_INTERRUPT(device_get_parent(device_get_parent(
bridge)), bridge, intpin));
}

10
sys/powerpc/ofw/ofw_pcibus.c
View File

@ -312,7 +312,7 @@ ofw_pcibus_child_pnpinfo_str_method(device_t cbdev, device_t child, char *buf,
return (0);
}
static int
ofw_pcibus_assign_interrupt(device_t dev, device_t child)
{
@ -324,12 +324,12 @@ ofw_pcibus_assign_interrupt(device_t dev, device_t child)
if (node == -1) {
/* Non-firmware enumerated child, use standard routing */
intr[0] = pci_get_intpin(child);
return (PCIB_ROUTE_INTERRUPT(device_get_parent(dev), child,
intr[0]));
}
/*
* Try to determine the node's interrupt parent so we know which
* PIC to use.
@ -343,7 +343,7 @@ ofw_pcibus_assign_interrupt(device_t dev, device_t child)
if (iparent != -1)
OF_getencprop(OF_node_from_xref(iparent), "#interrupt-cells",
&icells, sizeof(icells));
/*
* Any AAPL,interrupts property gets priority and is
* fully specified (i.e. does not need routing)
@ -362,7 +362,7 @@ ofw_pcibus_assign_interrupt(device_t dev, device_t child)
/* No property: our best guess is the intpin. */
intr[0] = pci_get_intpin(child);
}
/*
* If we got intr from a property, it may or may not be an intpin.
* For on-board devices, it frequently is not, and is completely out

1
sys/powerpc/ofw/ofw_pcibus.h
View File

@ -50,4 +50,3 @@ struct ofw_pcibus_devinfo {
};
#endif // POWERPC_OFW_OFW_PCIBUS_H

2
sys/powerpc/ofw/ofw_real.c
View File

@ -141,7 +141,6 @@ static ofw_method_t ofw_real_methods[] = {
OFWMETHOD(ofw_release, ofw_real_release),
OFWMETHOD(ofw_enter, ofw_real_enter),
OFWMETHOD(ofw_exit, ofw_real_exit),
{ 0, 0 }
};
@ -1184,4 +1183,3 @@ ofw_real_exit(ofw_t ofw)
;
ofw_real_stop();
}

1
sys/powerpc/ofw/ofw_syscons.c
View File

@ -817,7 +817,6 @@ ofwfb_putc8(video_adapter_t *adp, vm_offset_t off, uint8_t c, uint8_t a)
uint8_t c[4];
} ch1, ch2;
sc = (struct ofwfb_softc *)adp;
row = (off / adp->va_info.vi_width) * adp->va_info.vi_cheight;
col = (off % adp->va_info.vi_width) * adp->va_info.vi_cwidth;

3
sys/powerpc/ofw/openpic_ofw.c
View File

@ -138,7 +138,7 @@ openpic_ofw_attach(device_t dev)
OF_getencprop(node, "ibm,phandle", &xref, sizeof(xref)) == -1 &&
OF_getencprop(node, "linux,phandle", &xref, sizeof(xref)) == -1)
xref = node;
if (ofw_bus_is_compatible(dev, "fsl,mpic")) {
sc->sc_quirks = OPENPIC_QUIRK_SINGLE_BIND;
sc->sc_quirks |= OPENPIC_QUIRK_HIDDEN_IRQS;
@ -177,4 +177,3 @@ openpic_ofw_translate_code(device_t dev, u_int irq, int code,
*pol = INTR_POLARITY_CONFORM;
}
}

4
sys/powerpc/ofw/rtas.c
View File

@ -259,7 +259,7 @@ cell_t
rtas_token_lookup(const char *method)
{
cell_t token;
if (!rtas_exists())
return (-1);
@ -268,5 +268,3 @@ rtas_token_lookup(const char *method)
return (token);
}

2
sys/powerpc/powermac/ata_dbdma.c
View File

@ -175,7 +175,7 @@ ata_dbdma_stop(struct ata_request *request)
struct ata_dbdma_channel *sc = device_get_softc(request->parent);
uint16_t status;
status = dbdma_get_chan_status(sc->dbdma);
dbdma_pause(sc->dbdma);

1
sys/powerpc/powermac/ata_dbdma.h
View File

@ -54,4 +54,3 @@ struct ata_dbdma_channel {
void ata_dbdma_dmainit(device_t dev);
#endif /* ATA_DBDMA_H */

7
sys/powerpc/powermac/ata_macio.c
View File

@ -270,7 +270,7 @@ ata_macio_setmode(device_t dev, int target, int mode)
if ((mode & ATA_DMA_MASK) == ATA_UDMA0) {
min_cycle = udma_timings[mode & ATA_MODE_MASK].cycle;
min_active = udma_timings[mode & ATA_MODE_MASK].active;
cycle_tick = ATA_TIME_TO_TICK(sc->rev,min_cycle);
act_tick = ATA_TIME_TO_TICK(sc->rev,min_active);
@ -280,7 +280,7 @@ ata_macio_setmode(device_t dev, int target, int mode)
} else if ((mode & ATA_DMA_MASK) == ATA_WDMA0) {
min_cycle = dma_timings[mode & ATA_MODE_MASK].cycle;
min_active = dma_timings[mode & ATA_MODE_MASK].active;
cycle_tick = ATA_TIME_TO_TICK(sc->rev,min_cycle);
act_tick = ATA_TIME_TO_TICK(sc->rev,min_active);
@ -304,7 +304,7 @@ ata_macio_setmode(device_t dev, int target, int mode)
pio_timings[(mode & ATA_MODE_MASK) - ATA_PIO0].cycle;
min_active =
pio_timings[(mode & ATA_MODE_MASK) - ATA_PIO0].active;
cycle_tick = ATA_TIME_TO_TICK(sc->rev,min_cycle);
act_tick = ATA_TIME_TO_TICK(sc->rev,min_active);
@ -372,4 +372,3 @@ ata_macio_resume(device_t dev)
return (error);
}

2
sys/powerpc/powermac/cpcht.c
View File

@ -465,7 +465,7 @@ cpcht_alloc_msix(device_t dev, device_t child, int *irq)
return (ENXIO);
}
static int
cpcht_release_msix(device_t dev, device_t child, int irq)
{

7
sys/powerpc/powermac/cuda.c
View File

@ -150,10 +150,10 @@ cuda_attach(device_t dev)
volatile int i;
uint8_t reg;
phandle_t node,child;
sc = device_get_softc(dev);
sc->sc_dev = dev;
sc->sc_memrid = 0;
sc->sc_memr = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
&sc->sc_memrid, RF_ACTIVE);
@ -445,7 +445,7 @@ cuda_send_inbound(struct cuda_softc *sc)
struct cuda_packet *pkt;
dev = sc->sc_dev;
mtx_lock(&sc->sc_mutex);
while ((pkt = STAILQ_FIRST(&sc->sc_inq)) != NULL) {
@ -799,4 +799,3 @@ cuda_settime(device_t dev, struct timespec *ts)
return (0);
}

4
sys/powerpc/powermac/dbdma.c
View File

@ -97,7 +97,7 @@ dbdma_resize_channel(dbdma_channel_t *chan, int newslots)
if (newslots > (PAGE_SIZE / sizeof(struct dbdma_command)))
return (-1);
chan->sc_nslots = newslots;
return (0);
}
@ -234,7 +234,7 @@ void
dbdma_set_device_status(dbdma_channel_t *chan, uint8_t mask, uint8_t value)
{
uint32_t control_reg;
control_reg = mask;
control_reg <<= DBDMA_REG_MASK_SHIFT;
control_reg |= value;

3
sys/powerpc/powermac/dbdmavar.h
View File

@ -64,12 +64,11 @@ struct dbdma_channel {
bus_dmamap_t sc_dmamap;
uint32_t sc_saved_regs[5];
};
/*
DBDMA registers are found at 0x8000 + n*0x100 in the macio register space,
and are laid out as follows within each block:
Address: Description: Length (bytes):
0x000 Channel Control 4
0x004 Channel Status 4

2
sys/powerpc/powermac/grackle.c
View File

@ -152,7 +152,6 @@ grackle_read_config(device_t dev, u_int bus, u_int slot, u_int func, u_int reg,
caoff = sc->sc_data + (reg & 0x03);
if (grackle_enable_config(sc, bus, slot, func, reg) != 0) {
/*
* Config probes to non-existent devices on the
* secondary bus generates machine checks. Be sure
@ -311,7 +310,6 @@ static device_method_t grackle_hb_methods[] = {
/* Device interface */
DEVMETHOD(device_probe, grackle_hb_probe),
DEVMETHOD(device_attach, grackle_hb_attach),
{ 0, 0 }
};

6
sys/powerpc/powermac/kiic.c
View File

@ -137,7 +137,6 @@ static device_method_t kiic_methods[] = {
/* ofw_bus interface */
DEVMETHOD(ofw_bus_get_node, kiic_get_node),
{ 0, 0 }
};
@ -175,7 +174,7 @@ kiic_attach(device_t self)
bzero(sc, sizeof(*sc));
sc->sc_dev = self;
node = ofw_bus_get_node(self);
if (node == 0 || node == -1) {
return (EINVAL);
@ -236,7 +235,7 @@ kiic_attach(device_t self)
kiic_setmode(sc, I2C_STDMODE);
kiic_setspeed(sc, I2C_100kHz); /* XXX rate */
kiic_writereg(sc, IER, I2C_INT_DATA | I2C_INT_ADDR | I2C_INT_STOP);
if (bootverbose)
@ -443,4 +442,3 @@ kiic_get_node(device_t bus, device_t dev)
return sc->sc_node;
}

13
sys/powerpc/powermac/macgpio.c
View File

@ -92,7 +92,7 @@ static device_method_t macgpio_methods[] = {
DEVMETHOD(device_shutdown, bus_generic_shutdown),
DEVMETHOD(device_suspend, macgpio_suspend),
DEVMETHOD(device_resume, macgpio_resume),
/* Bus interface */
DEVMETHOD(bus_print_child, macgpio_print_child),
DEVMETHOD(bus_probe_nomatch, macgpio_probe_nomatch),
@ -113,7 +113,6 @@ static device_method_t macgpio_methods[] = {
DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name),
DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node),
DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type),
{ 0, 0 }
};
@ -145,7 +144,7 @@ macgpio_probe(device_t dev)
device_set_desc(dev, "MacIO GPIO Controller");
return (0);
}
return (ENXIO);
}
@ -164,7 +163,7 @@ macgpio_attach(device_t dev)
sc = device_get_softc(dev);
root = sc->sc_node = ofw_bus_get_node(dev);
sc->sc_gpios = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
&sc->sc_gpios_rid, RF_ACTIVE);
@ -220,7 +219,6 @@ macgpio_attach(device_t dev)
return (bus_generic_attach(dev));
}
static int
macgpio_print_child(device_t dev, device_t child)
{
@ -230,7 +228,7 @@ macgpio_print_child(device_t dev, device_t child)
dinfo = device_get_ivars(child);
retval += bus_print_child_header(dev, child);
if (dinfo->gpio_num >= GPIO_BASE)
printf(" gpio %d", dinfo->gpio_num - GPIO_BASE);
else if (dinfo->gpio_num >= GPIO_EXTINT_BASE)
@ -245,7 +243,6 @@ macgpio_print_child(device_t dev, device_t child)
return (retval);
}
static void
macgpio_probe_nomatch(device_t dev, device_t child)
{
@ -266,7 +263,6 @@ macgpio_probe_nomatch(device_t dev, device_t child)
}
}
static struct resource *
macgpio_alloc_resource(device_t bus, device_t child, int type, int *rid,
rman_res_t start, rman_res_t end, rman_res_t count,
@ -306,7 +302,6 @@ macgpio_activate_resource(device_t bus, device_t child, int type, int rid,
return (bus_activate_resource(bus, type, rid, res));
}
static int
macgpio_deactivate_resource(device_t bus, device_t child, int type, int rid,
struct resource *res)

20
sys/powerpc/powermac/macio.c
View File

@ -101,7 +101,7 @@ static device_method_t macio_methods[] = {
DEVMETHOD(device_shutdown, bus_generic_shutdown),
DEVMETHOD(device_suspend, bus_generic_suspend),
DEVMETHOD(device_resume, bus_generic_resume),
/* Bus interface */
DEVMETHOD(bus_print_child, macio_print_child),
DEVMETHOD(bus_probe_nomatch, macio_probe_nomatch),
@ -123,7 +123,6 @@ static device_method_t macio_methods[] = {
DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name),
DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node),
DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type),
{ 0, 0 }
};
@ -187,7 +186,6 @@ macio_get_quirks(const char *name)
return (0);
}
/*
* Add an interrupt to the dev's resource list if present
*/
@ -235,7 +233,6 @@ macio_add_intr(phandle_t devnode, struct macio_devinfo *dinfo)
}
}
static void
macio_add_reg(phandle_t devnode, struct macio_devinfo *dinfo)
{
@ -293,7 +290,7 @@ macio_probe(device_t dev)
{
int i;
u_int32_t devid;
devid = pci_get_devid(dev);
for (i = 0; macio_pci_devlist[i].mpd_desc != NULL; i++) {
if (devid == macio_pci_devlist[i].mpd_devid) {
@ -301,7 +298,7 @@ macio_probe(device_t dev)
return (0);
}
}
return (ENXIO);
}
@ -324,7 +321,7 @@ macio_attach(device_t dev)
sc = device_get_softc(dev);
root = sc->sc_node = ofw_bus_get_node(dev);
/*
* Locate the device node and it's base address
*/
@ -425,20 +422,17 @@ macio_attach(device_t dev)
*/
if ((strcmp(ofw_bus_get_name(cdev), "i2s") == 0) &&
(strcmp(compat, "K2-Keylargo") == 0)) {
uint32_t fcr1;
fcr1 = bus_read_4(sc->sc_memr, KEYLARGO_FCR1);
fcr1 |= FCR1_I2S0_CLK_ENABLE | FCR1_I2S0_ENABLE;
bus_write_4(sc->sc_memr, KEYLARGO_FCR1, fcr1);
}
}
return (bus_generic_attach(dev));
}
static int
macio_print_child(device_t dev, device_t child)
{
@ -459,7 +453,6 @@ macio_print_child(device_t dev, device_t child)
return (retval);
}
static void
macio_probe_nomatch(device_t dev, device_t child)
{
@ -480,7 +473,6 @@ macio_probe_nomatch(device_t dev, device_t child)
}
}
static struct resource *
macio_alloc_resource(device_t bus, device_t child, int type, int *rid,
rman_res_t start, rman_res_t end, rman_res_t count,
@ -585,7 +577,6 @@ macio_alloc_resource(device_t bus, device_t child, int type, int *rid,
return (rv);
}
static int
macio_release_resource(device_t bus, device_t child, int type, int rid,
struct resource *res)
@ -599,7 +590,6 @@ macio_release_resource(device_t bus, device_t child, int type, int rid,
return (rman_release_resource(res));
}
static int
macio_activate_resource(device_t bus, device_t child, int type, int rid,
struct resource *res)
@ -625,7 +615,6 @@ macio_activate_resource(device_t bus, device_t child, int type, int rid,
return (rman_activate_resource(res));
}
static int
macio_deactivate_resource(device_t bus, device_t child, int type, int rid,
struct resource *res)
@ -643,7 +632,6 @@ macio_deactivate_resource(device_t bus, device_t child, int type, int rid,
return (rman_deactivate_resource(res));
}
static struct resource_list *
macio_get_resource_list (device_t dev, device_t child)
{

1
sys/powerpc/powermac/nvbl.c
View File

@ -53,7 +53,6 @@ __FBSDID("$FreeBSD$");
#define NVIDIA_PMC_BL_SHIFT (16)
#define NVIDIA_PMC_BL_EN (1U << 31)
struct nvbl_softc {
device_t dev;
struct resource *sc_memr;

7
sys/powerpc/powermac/platform_powermac.c
View File

@ -75,7 +75,7 @@ static platform_method_t powermac_methods[] = {
PLATFORMMETHOD(platform_attach, powermac_attach),
PLATFORMMETHOD(platform_mem_regions, powermac_mem_regions),
PLATFORMMETHOD(platform_timebase_freq, powermac_timebase_freq),
PLATFORMMETHOD(platform_smp_first_cpu, powermac_smp_first_cpu),
PLATFORMMETHOD(platform_smp_next_cpu, powermac_smp_next_cpu),
PLATFORMMETHOD(platform_smp_get_bsp, powermac_smp_get_bsp),
@ -109,7 +109,7 @@ powermac_probe(platform_t plat)
return (ENXIO);
compatlen = OF_getprop(root, "compatible", compat, sizeof(compat));
for (curstr = compat; curstr < compat + compatlen;
curstr += strlen(curstr) + 1) {
if (strncmp(curstr, "MacRISC", 7) == 0)
@ -193,7 +193,6 @@ powermac_attach(platform_t plat)
phandle_t rootnode;
char model[32];
/*
* Quiesce Open Firmware on PowerMac11,2 and 12,1. It is
* necessary there to shut down a background thread doing fan
@ -232,7 +231,6 @@ powermac_timebase_freq(platform_t plat, struct cpuref *cpuref)
return (ticks);
}
static int
powermac_smp_fill_cpuref(struct cpuref *cpuref, phandle_t cpu)
{
@ -413,4 +411,3 @@ powermac_sleep(platform_t platform)
*(unsigned long *)0x80 = 0x100;
cpu_sleep();
}

20
sys/powerpc/powermac/pmu.c
View File

@ -167,7 +167,6 @@ static device_method_t pmuextint_methods[] = {
/* Device interface */
DEVMETHOD(device_probe, pmuextint_probe),
DEVMETHOD(device_attach, pmuextint_attach),
{0,0}
};
@ -304,7 +303,6 @@ pmu_probe(device_t dev)
return (0);
}
static int
setup_pmu_intr(device_t dev, device_t extint)
{
@ -352,10 +350,10 @@ pmu_attach(device_t dev)
phandle_t node,child;
struct sysctl_ctx_list *ctx;
struct sysctl_oid *tree;
sc = device_get_softc(dev);
sc->sc_dev = dev;
sc->sc_memrid = 0;
sc->sc_memr = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
&sc->sc_memrid, RF_ACTIVE);
@ -447,7 +445,6 @@ pmu_attach(device_t dev)
CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0,
pmu_battmon, "I", "Post battery events to devd");
SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
"acline", CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_MPSAFE, sc,
0, pmu_acline_state, "I", "AC Line Status");
@ -649,7 +646,6 @@ done:
return rcv_len;
}
static u_int
pmu_poll(device_t dev)
{
@ -814,7 +810,7 @@ pmu_adb_autopoll(device_t dev, uint16_t mask)
pmu_send(sc, PMU_ADB_POLL_OFF, 0, NULL, 16, resp);
mtx_unlock(&sc->sc_mutex);
return 0;
}
@ -823,7 +819,7 @@ pmu_shutdown(void *xsc, int howto)
{
struct pmu_softc *sc = xsc;
uint8_t cmd[] = {'M', 'A', 'T', 'T'};
if (howto & RB_HALT)
pmu_send(sc, PMU_POWER_OFF, 4, cmd, 0, NULL);
else
@ -839,7 +835,7 @@ pmu_set_sleepled(void *xsc, int onoff)
uint8_t cmd[] = {4, 0, 0};
cmd[2] = onoff;
mtx_lock(&sc->sc_mutex);
pmu_send(sc, PMU_SET_SLEEPLED, 3, cmd, 0, NULL);
mtx_unlock(&sc->sc_mutex);
@ -849,7 +845,7 @@ static int
pmu_server_mode(SYSCTL_HANDLER_ARGS)
{
struct pmu_softc *sc = arg1;
u_int server_mode = 0;
uint8_t getcmd[] = {PMU_PWR_GET_POWERUP_EVENTS};
uint8_t setcmd[] = {0, 0, PMU_PWR_WAKEUP_AC_INSERT};
@ -1000,7 +996,7 @@ pmu_battmon(SYSCTL_HANDLER_ARGS)
if (error || !req->newptr)
return (error);
if (!result && pmu_battmon_enabled)
error = kproc_suspend(pmubattproc, hz);
else if (result && pmu_battmon_enabled == 0)
@ -1024,7 +1020,7 @@ pmu_acline_state(SYSCTL_HANDLER_ARGS)
if (error != 0)
return (error);
result = (batt.state & PMU_PWR_AC_PRESENT) ? 1 : 0;
error = sysctl_handle_int(oidp, &result, 0, req);

1
sys/powerpc/powermac/pmuvar.h
View File

@ -122,7 +122,6 @@ enum {
#define PMU_PWR_PCHARGE_RESET (1 << 6)
#define PMU_PWR_BATT_EXIST (1 << 7)
/* I2C related definitions */
#define PMU_I2C_MODE_SIMPLE 0
#define PMU_I2C_MODE_STDSUB 1

3
sys/powerpc/powermac/powermac_thermal.c
View File

@ -88,7 +88,7 @@ fan_management_proc(void)
/* Nothing to manage? */
if (SLIST_EMPTY(&fans))
kproc_exit(0);
while (1) {
pmac_therm_manage_fans();
pause("pmac_therm", hz);
@ -217,4 +217,3 @@ pmac_thermal_sensor_register(struct pmac_therm *sensor)
SLIST_INSERT_HEAD(&sensors, list_entry, entries);
}

4
sys/powerpc/powermac/powermac_thermal.h
View File

@ -35,7 +35,7 @@
struct pmac_fan {
int min_rpm, max_rpm, default_rpm;
char name[32];
int zone;
@ -45,7 +45,7 @@ struct pmac_fan {
struct pmac_therm {
int target_temp, max_temp; /* Tenths of a degree K */
char name[32];
int zone;

1
sys/powerpc/powermac/pswitch.c
View File

@ -60,7 +60,6 @@ static device_method_t pswitch_methods[] = {
/* Device interface */
DEVMETHOD(device_probe, pswitch_probe),
DEVMETHOD(device_attach, pswitch_attach),
{ 0, 0 }
};

17
sys/powerpc/powermac/smu.c
View File

@ -464,7 +464,7 @@ smu_doorbell_intr(void *xdev)
/* Check result. First invalidate the cache again... */
__asm __volatile("dcbf 0,%0; sync" :: "r"(sc->sc_cmd) : "memory");
bus_dmamap_sync(sc->sc_dmatag, sc->sc_cmd_dmamap, BUS_DMASYNC_POSTREAD);
sc->sc_cur_cmd->cmd = sc->sc_cmd->cmd;
@ -676,7 +676,7 @@ smu_fan_check_old_style(struct smu_fan *fan)
* them except by seeing if the new one fails. If the new one
* fails, use the old one.
*/
cmd.cmd = SMU_FAN;
cmd.len = 2;
cmd.data[0] = 0x31;
@ -787,14 +787,14 @@ smu_fan_set_pwm(struct smu_fan *fan, int pwm)
* them except by seeing if the new one fails. If the new one
* fails, use the old one.
*/
if (!fan->old_style) {
cmd.len = 4;
cmd.data[0] = 0x30;
cmd.data[1] = fan->reg;
cmd.data[2] = (pwm >> 8) & 0xff;
cmd.data[3] = pwm & 0xff;
error = smu_run_cmd(smu, &cmd, 1);
if (error && error != EWOULDBLOCK)
fan->old_style = 1;
@ -1014,7 +1014,7 @@ smu_attach_fans(device_t dev, phandle_t fanroot)
/* Now fill in the properties. */
smu_count_fans(dev);
/* Register fans with pmac_thermal */
for (i = 0; i < sc->sc_nfans; i++)
pmac_thermal_fan_register(&sc->sc_fans[i].fan);
@ -1079,7 +1079,6 @@ smu_attach_fans(device_t dev, phandle_t fanroot)
smu_fanrpm_sysctl, "I", "Fan RPM");
fan->fan.read = NULL;
fan->fan.set = (int (*)(struct pmac_fan *, int))smu_fan_set_pwm;
}
if (bootverbose)
device_printf(dev, "Fan: %s type: %d\n",
@ -1104,7 +1103,7 @@ smu_sensor_read(struct smu_sensor *sens)
error = smu_run_cmd(smu, &cmd, 1);
if (error != 0)
return (-1);
sc = device_get_softc(smu);
value = (cmd.data[0] << 8) | cmd.data[1];
@ -1286,7 +1285,7 @@ smu_server_mode(SYSCTL_HANDLER_ARGS)
u_int server_mode;
device_t smu = arg1;
int error;
cmd.cmd = SMU_POWER_EVENTS;
cmd.len = 1;
cmd.data[0] = SMU_PWR_GET_POWERUP;
@ -1402,7 +1401,6 @@ static device_method_t smuiic_methods[] = {
/* ofw_bus interface */
DEVMETHOD(ofw_bus_get_node, smuiic_get_node),
{ 0, 0 }
};
@ -1582,4 +1580,3 @@ smuiic_get_node(device_t bus, device_t dev)
return (ofw_bus_get_node(bus));
}

1
sys/powerpc/powermac/smusat.c
View File

@ -292,4 +292,3 @@ smusat_sensor_sysctl(SYSCTL_HANDLER_ARGS)
return (error);
}

7
sys/powerpc/powermac/uninorth.c
View File

@ -101,7 +101,6 @@ static void unin_enable_mpic(device_t dev);
* Driver methods.
*/
static device_method_t unin_chip_methods[] = {
/* Device interface */
DEVMETHOD(device_probe, unin_chip_probe),
DEVMETHOD(device_attach, unin_chip_attach),
@ -127,7 +126,6 @@ static device_method_t unin_chip_methods[] = {
DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name),
DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node),
DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type),
{ 0, 0 }
};
@ -403,7 +401,7 @@ unin_chip_attach(device_t dev)
if (strcmp(compat, "chrp,open-pic") == 0)
unin_enable_mpic(dev);
}
/*
* GMAC lives under the PCI bus, so just check if enet is gmac.
*/
@ -456,7 +454,6 @@ unin_chip_probe_nomatch(device_t dev, device_t child)
}
}
static struct resource *
unin_chip_alloc_resource(device_t bus, device_t child, int type, int *rid,
rman_res_t start, rman_res_t end, rman_res_t count,
@ -608,7 +605,6 @@ unin_chip_activate_resource(device_t bus, device_t child, int type, int rid,
return (rman_activate_resource(res));
}
static int
unin_chip_deactivate_resource(device_t bus, device_t child, int type, int rid,
struct resource *res)
@ -626,7 +622,6 @@ unin_chip_deactivate_resource(device_t bus, device_t child, int type, int rid,
return (rman_deactivate_resource(res));
}
static struct resource_list *
unin_chip_get_resource_list (device_t dev, device_t child)
{

3
sys/powerpc/powermac/uninorthpci.c
View File

@ -128,7 +128,7 @@ uninorth_probe(device_t dev)
device_set_desc(dev, "IBM CPC945 PCI Express Root");
return (0);
}
return (ENXIO);
}
@ -278,4 +278,3 @@ uninorth_enable_config(struct uninorth_softc *sc, u_int bus, u_int slot,
return (1);
}

1
sys/powerpc/powermac/uninorthvar.h
View File

@ -98,7 +98,6 @@ struct unin_chip_devinfo {
#define UNIN_SLEEPING 0x01
#define UNIN_RUNNING 0x02
/*
* Toggle registers
*/

1
sys/powerpc/powermac/vcoregpio.c
View File

@ -112,4 +112,3 @@ vcoregpio_post_change(device_t dev, const struct cf_level *level)
macgpio_write(dev, GPIO_DDR_OUTPUT | 0);
}
}

3
sys/powerpc/powernv/opal.c
View File

@ -51,7 +51,7 @@ opal_check(void)
if (!OF_hasprop(opal, "opal-base-address") ||
!OF_hasprop(opal, "opal-entry-address"))
return (ENOENT);
OF_getencprop(opal, "opal-base-address", val, sizeof(val));
opal_data = ((uint64_t)val[0] << 32) | val[1];
OF_getencprop(opal, "opal-entry-address", val, sizeof(val));
@ -63,4 +63,3 @@ opal_check(void)
return (0);
}

9
sys/powerpc/powernv/opal_console.c
View File

@ -110,7 +110,7 @@ static driver_t uart_opal_driver = {
uart_opal_methods,
sizeof(struct uart_opal_softc),
};
DRIVER_MODULE(uart_opal, opalcons, uart_opal_driver, uart_devclass, 0, 0);
static int uart_opal_getc(struct uart_opal_softc *sc);
@ -157,7 +157,7 @@ uart_opal_real_map_outbuffer(uint64_t *bufferp, uint64_t *lenp)
*bufferp = (uint64_t)opalcons_buffer.tmpbuf;
*lenp = (uint64_t)&opalcons_buffer.size;
}
static void
uart_opal_real_unmap_outbuffer(uint64_t *len)
{
@ -237,7 +237,7 @@ uart_opal_cnprobe(struct consdev *cp)
/* Check if OF has an active stdin/stdout */
if (OF_getprop(chosen, "linux,stdout-path", buf, sizeof(buf)) <= 0)
goto fail;
input = OF_finddevice(buf);
if (input == -1)
goto fail;
@ -253,7 +253,7 @@ uart_opal_cnprobe(struct consdev *cp)
cp->cn_arg = console_sc;
stdout_cp = cp;
return;
fail:
cp->cn_pri = CN_DEAD;
return;
@ -573,4 +573,3 @@ static driver_t opalcons_driver = {
static devclass_t opalcons_devclass;
DRIVER_MODULE(opalcons, opal, opalcons_driver, opalcons_devclass, 0, 0);

8
sys/powerpc/powernv/opal_dev.c
View File

@ -84,7 +84,7 @@ static device_method_t opaldev_methods[] = {
DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name),
DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node),
DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type),
DEVMETHOD_END
};
@ -172,7 +172,6 @@ opaldev_probe(device_t dev)
free(irqs, M_DEVBUF);
}
return (BUS_PROBE_SPECIFIC);
}
@ -197,7 +196,7 @@ opaldev_attach(device_t dev)
if (rv == OPAL_SUCCESS)
clock_register(dev, 2000);
EVENTHANDLER_REGISTER(OPAL_SHUTDOWN, opal_handle_shutdown_message,
NULL, EVENTHANDLER_PRI_ANY);
EVENTHANDLER_REGISTER(shutdown_final, opal_shutdown, NULL,
@ -381,7 +380,7 @@ opal_handle_messages(void)
uint32_t type;
rv = opal_call(OPAL_GET_MSG, vtophys(&msg), sizeof(msg));
if (rv != OPAL_SUCCESS)
return;
@ -422,4 +421,3 @@ opal_intr(void *xintr)
wakeup(opal_hb_proc);
}

1
sys/powerpc/powernv/opal_flash.c
View File

@ -324,7 +324,6 @@ opalflash_task(void *arg)
}
}
/* Device driver interfaces. */
static int

1
sys/powerpc/powernv/opal_i2cm.c
View File

@ -130,4 +130,3 @@ DRIVER_MODULE(opal_i2cm, powernv_xscom, opal_i2cm_driver, opal_i2cm_devclass, NU
NULL);
DRIVER_MODULE(opal_i2cm, powernv_centaur, opal_i2cm_driver, opal_i2cm_devclass, NULL,
NULL);

5
sys/powerpc/powernv/opal_nvram.c
View File

@ -84,7 +84,6 @@ static device_method_t opal_nvram_methods[] = {
DEVMETHOD(device_probe, opal_nvram_probe),
DEVMETHOD(device_attach, opal_nvram_attach),
DEVMETHOD(device_detach, opal_nvram_detach),
{ 0, 0 }
};
@ -157,7 +156,7 @@ opal_nvram_attach(device_t dev)
sc->sc_cdev = make_dev(&opal_nvram_cdevsw, 0, 0, 0, 0600,
"nvram");
sc->sc_cdev->si_drv1 = sc;
mtx_init(&sc->sc_mtx, "opal_nvram", 0, MTX_DEF);
return (0);
@ -176,7 +175,7 @@ opal_nvram_detach(device_t dev)
contigfree(sc->sc_buf, NVRAM_BUFSIZE, M_DEVBUF);
mtx_destroy(&sc->sc_mtx);
return (0);
}

2
sys/powerpc/powernv/opal_pci.c
View File

@ -540,7 +540,7 @@ opalpci_read_config(device_t dev, u_int bus, u_int slot, u_int func, u_int reg,
* Poking config state for non-existant devices can make
* the host bridge hang up. Clear any errors.
*/
if (error != OPAL_SUCCESS ||
(word == ((1UL << (8 * width)) - 1))) {
if (error != OPAL_HARDWARE) {

9
sys/powerpc/powernv/opal_sensor.c
View File

@ -117,7 +117,7 @@ opal_sensor_get_val(struct opal_sensor_softc *sc, uint32_t key, uint64_t *val)
*val = val32;
else
rv = EIO;
opal_free_async_token(token);
return (rv);
}
@ -139,7 +139,7 @@ opal_sensor_sysctl(SYSCTL_HANDLER_ARGS)
return (error);
result = sensval;
switch (sc->sc_type) {
case OPAL_SENSOR_TEMP:
result = result * 10 + 2731; /* Convert to K */
@ -179,7 +179,7 @@ opal_sensor_attach(device_t dev)
sc->sc_dev = dev;
node = ofw_bus_get_node(dev);
if (OF_getencprop(node, "sensor-data", &sensor_id, sizeof(sensor_id)) < 0) {
device_printf(dev, "Missing sensor ID\n");
return (ENXIO);
@ -188,7 +188,7 @@ opal_sensor_attach(device_t dev)
device_printf(dev, "Missing sensor type\n");
return (ENXIO);
}
sc->sc_type = -1;
for (i = 0; i < OPAL_SENSOR_MAX; i++) {
if (strcmp(type, opal_sensor_types[i]) == 0) {
@ -259,7 +259,6 @@ static devclass_t opal_sensor_devclass;
DRIVER_MODULE(opal_sensor, opalsens, opal_sensor_driver, opal_sensor_devclass,
NULL, NULL);
static int
opalsens_probe(device_t dev)
{

4
sys/powerpc/powernv/platform_powernv.c
View File

@ -89,7 +89,7 @@ static platform_method_t powernv_methods[] = {
PLATFORMMETHOD(platform_mem_regions, powernv_mem_regions),
PLATFORMMETHOD(platform_numa_mem_regions, powernv_numa_mem_regions),
PLATFORMMETHOD(platform_timebase_freq, powernv_timebase_freq),
PLATFORMMETHOD(platform_smp_ap_init, powernv_smp_ap_init),
PLATFORMMETHOD(platform_smp_first_cpu, powernv_smp_first_cpu),
PLATFORMMETHOD(platform_smp_next_cpu, powernv_smp_next_cpu),
@ -102,7 +102,6 @@ static platform_method_t powernv_methods[] = {
PLATFORMMETHOD(platform_node_numa_domain, powernv_node_numa_domain),
PLATFORMMETHOD(platform_reset, powernv_reset),
{ 0, 0 }
};
@ -257,7 +256,6 @@ out:
return (0);
}
void
powernv_mem_regions(platform_t plat, struct mem_region *phys, int *physsz,
struct mem_region *avail, int *availsz)

1
sys/powerpc/powernv/powernv_centaur.c
View File

@ -127,4 +127,3 @@ DEFINE_CLASS_0(powernv_centaur, powernv_centaur_driver, powernv_centaur_methods,
sizeof(struct powernv_centaur_softc));
DRIVER_MODULE(powernv_centaur, ofwbus, powernv_centaur_driver, powernv_centaur_devclass, NULL,
NULL);

1
sys/powerpc/powernv/powernv_xscom.c
View File

@ -127,4 +127,3 @@ DEFINE_CLASS_0(powernv_xscom, powernv_xscom_driver, powernv_xscom_methods,
sizeof(struct powernv_xscom_softc));
DRIVER_MODULE(powernv_xscom, ofwbus, powernv_xscom_driver, powernv_xscom_devclass, NULL,
NULL);

6
sys/powerpc/powernv/xive.c
View File

@ -107,7 +107,6 @@ static void xive_init_irq(struct xive_irq *irqd, u_int irq);
static struct xive_irq *xive_configure_irq(u_int irq);
static int xive_provision_page(struct xive_softc *sc);
/* Interfaces */
static int xive_probe(device_t);
static int xive_attach(device_t);
@ -292,7 +291,6 @@ xive_write_mmap8(vm_offset_t addr, uint64_t val)
*(uint64_t *)(addr) = val;
}
/* Device interfaces. */
static int
xive_probe(device_t dev)
@ -467,7 +465,7 @@ xive_bind(device_t dev, u_int irq, cpuset_t cpumask, void **priv)
}
opal_call(OPAL_XIVE_SYNC, OPAL_XIVE_SYNC_QUEUE, irq);
irqd->vp = pcpu_find(cpu)->pc_hwref;
error = opal_call(OPAL_XIVE_SET_IRQ_CONFIG, irq, irqd->vp,
XIVE_PRIORITY, irqd->lirq);
@ -708,7 +706,7 @@ xive_init_irq(struct xive_irq *irqd, u_int irq)
irqd->girq = irq;
irqd->esb_size = 1 << esb_shift;
irqd->eoi_page = (vm_offset_t)pmap_mapdev(eoi_phys, irqd->esb_size);
if (eoi_phys == trig_phys)
irqd->trig_page = irqd->eoi_page;
else if (trig_phys != 0)

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