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The PCI config mechanism 1 test failed for the Intel Aries.

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Make it less strict ...

Submitted by:	NIIMI Satoshi <sa2c@and.or.jp>
This commit is contained in:
Stefan Eßer 1995-06-30 16:11:42 +00:00
parent 4fa53f8ca6
commit d2a2d5ec41
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=9379
6 changed files with 12 additions and 12 deletions
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4
sys/amd64/pci/pci_bus.c
View File

@ -1,6 +1,6 @@
/**************************************************************************
**
** $Id: pcibus.c,v 1.8 1995/03/22 21:35:39 se Exp $
** $Id: pcibus.c,v 1.9 1995/06/28 15:54:57 se Exp $
**
** pci bus subroutines for i386 architecture.
**
@ -164,7 +164,7 @@ pcibus_setup (void)
result = inl (CONF1_ADDR_PORT);
outl (CONF1_ADDR_PORT, oldval);
if (result == CONF1_ENABLE) {
if (result & CONF1_ENABLE) {
pci_mechanism = 1;
pci_maxdevice = 32;
return;

4
sys/amd64/pci/pci_cfgreg.c
View File

@ -1,6 +1,6 @@
/**************************************************************************
**
** $Id: pcibus.c,v 1.8 1995/03/22 21:35:39 se Exp $
** $Id: pcibus.c,v 1.9 1995/06/28 15:54:57 se Exp $
**
** pci bus subroutines for i386 architecture.
**
@ -164,7 +164,7 @@ pcibus_setup (void)
result = inl (CONF1_ADDR_PORT);
outl (CONF1_ADDR_PORT, oldval);
if (result == CONF1_ENABLE) {
if (result & CONF1_ENABLE) {
pci_mechanism = 1;
pci_maxdevice = 32;
return;

4
sys/i386/isa/pcibus.c
View File

@ -1,6 +1,6 @@
/**************************************************************************
**
** $Id: pcibus.c,v 1.8 1995/03/22 21:35:39 se Exp $
** $Id: pcibus.c,v 1.9 1995/06/28 15:54:57 se Exp $
**
** pci bus subroutines for i386 architecture.
**
@ -164,7 +164,7 @@ pcibus_setup (void)
result = inl (CONF1_ADDR_PORT);
outl (CONF1_ADDR_PORT, oldval);
if (result == CONF1_ENABLE) {
if (result & CONF1_ENABLE) {
pci_mechanism = 1;
pci_maxdevice = 32;
return;

4
sys/i386/pci/pci_bus.c
View File

@ -1,6 +1,6 @@
/**************************************************************************
**
** $Id: pcibus.c,v 1.8 1995/03/22 21:35:39 se Exp $
** $Id: pcibus.c,v 1.9 1995/06/28 15:54:57 se Exp $
**
** pci bus subroutines for i386 architecture.
**
@ -164,7 +164,7 @@ pcibus_setup (void)
result = inl (CONF1_ADDR_PORT);
outl (CONF1_ADDR_PORT, oldval);
if (result == CONF1_ENABLE) {
if (result & CONF1_ENABLE) {
pci_mechanism = 1;
pci_maxdevice = 32;
return;

4
sys/i386/pci/pci_cfgreg.c
View File

@ -1,6 +1,6 @@
/**************************************************************************
**
** $Id: pcibus.c,v 1.8 1995/03/22 21:35:39 se Exp $
** $Id: pcibus.c,v 1.9 1995/06/28 15:54:57 se Exp $
**
** pci bus subroutines for i386 architecture.
**
@ -164,7 +164,7 @@ pcibus_setup (void)
result = inl (CONF1_ADDR_PORT);
outl (CONF1_ADDR_PORT, oldval);
if (result == CONF1_ENABLE) {
if (result & CONF1_ENABLE) {
pci_mechanism = 1;
pci_maxdevice = 32;
return;

4
sys/i386/pci/pci_pir.c
View File

@ -1,6 +1,6 @@
/**************************************************************************
**
** $Id: pcibus.c,v 1.8 1995/03/22 21:35:39 se Exp $
** $Id: pcibus.c,v 1.9 1995/06/28 15:54:57 se Exp $
**
** pci bus subroutines for i386 architecture.
**
@ -164,7 +164,7 @@ pcibus_setup (void)
result = inl (CONF1_ADDR_PORT);
outl (CONF1_ADDR_PORT, oldval);
if (result == CONF1_ENABLE) {
if (result & CONF1_ENABLE) {
pci_mechanism = 1;
pci_maxdevice = 32;
return;