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arm64: Add constants for decoding ISS fields for WF* exceptions

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WFI and WFIT trap to EL2 when executed in a vmm guest.  (Currently
WFE/WFET are not configured to trap.)  We only handle WFI at the moment,
so these constants are useful when handling the exception.

Reviewed by:	andrew
MFC after:	1 week
Sponsored by:	Innovate UK
Differential Revision:	https://reviews.freebsd.org/D41199
This commit is contained in:
Mark Johnston 2023-07-28 09:32:45 -04:00
parent 53e1af5a10
commit dd24d475d5
1 changed files with 20 additions and 0 deletions
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20
sys/arm64/include/armreg.h
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@ -316,6 +316,26 @@
#define ISS_INSN_S1PTW (0x01 << 7)
#define ISS_INSN_IFSC_MASK (0x1f << 0)
#define ISS_WFx_TI_SHIFT 0
#define ISS_WFx_TI_MASK (0x03 << ISS_WFx_TI_SHIFT)
#define ISS_WFx_TI_WFI (0x00 << ISS_WFx_TI_SHIFT)
#define ISS_WFx_TI_WFE (0x01 << ISS_WFx_TI_SHIFT)
#define ISS_WFx_TI_WFIT (0x02 << ISS_WFx_TI_SHIFT)
#define ISS_WFx_TI_WFET (0x03 << ISS_WFx_TI_SHIFT)
#define ISS_WFx_RV_SHIFT 2
#define ISS_WFx_RV_MASK (0x01 << ISS_WFx_RV_SHIFT)
#define ISS_WFx_RV_INVALID (0x00 << ISS_WFx_RV_SHIFT)
#define ISS_WFx_RV_VALID (0x01 << ISS_WFx_RV_SHIFT)
#define ISS_WFx_RN_SHIFT 5
#define ISS_WFx_RN_MASK (0x1f << ISS_WFx_RN_SHIFT)
#define ISS_WFx_RN(x) (((x) & ISS_WFx_RN_MASK) >> ISS_WFx_RN_SHIFT)
#define ISS_WFx_COND_SHIFT 20
#define ISS_WFx_COND_MASK (0x0f << ISS_WFx_COND_SHIFT)
#define ISS_WFx_CV_SHIFT 24
#define ISS_WFx_CV_MASK (0x01 << ISS_WFx_CV_SHIFT)
#define ISS_WFx_CV_INVALID (0x00 << ISS_WFx_CV_SHIFT)
#define ISS_WFx_CV_VALID (0x01 << ISS_WFx_CV_SHIFT)
#define ISS_MSR_DIR_SHIFT 0
#define ISS_MSR_DIR (0x01 << ISS_MSR_DIR_SHIFT)
#define ISS_MSR_Rt_SHIFT 5