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Merge llvm-project release/18.x llvmorg-18.1.4-0-ge6c3289804a6

Browse Source 
This updates llvm, clang, compiler-rt, libc++, libunwind, lld, lldb and
openmp to llvm-project release/18.x llvmorg-18.1.4-0-ge6c3289804a6.

PR:		276104
MFC after:	3 days
This commit is contained in:
Dimitry Andric 2024-04-20 14:01:32 +02:00
parent 8d74737035
commit dfa39133b3
25 changed files with 234 additions and 140 deletions
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2
contrib/llvm-project/clang/include/clang/Basic/Attr.td
View File

@ -1590,6 +1590,7 @@ def RegCall : DeclOrTypeAttr {
}
def Final : InheritableAttr {
let CanPrintOnLeft = 0;
let Spellings = [CustomKeyword<"final">, CustomKeyword<"sealed">];
let Accessors = [Accessor<"isSpelledAsSealed", [CustomKeyword<"sealed">]>];
let SemaHandler = 0;
@ -2472,6 +2473,7 @@ def Overloadable : Attr {
}
def Override : InheritableAttr {
let CanPrintOnLeft = 0;
let Spellings = [CustomKeyword<"override">];
let SemaHandler = 0;
// Omitted from docs, since this is language syntax, not an attribute, as far

20
contrib/llvm-project/clang/lib/Format/TokenAnnotator.cpp
View File

@ -3450,10 +3450,11 @@ void TokenAnnotator::calculateFormattingInformation(AnnotatedLine &Line) const {
for (AnnotatedLine *ChildLine : Line.Children)
calculateFormattingInformation(*ChildLine);
Line.First->TotalLength =
Line.First->IsMultiline ? Style.ColumnLimit
: Line.FirstStartColumn + Line.First->ColumnWidth;
FormatToken *Current = Line.First->Next;
auto *First = Line.First;
First->TotalLength = First->IsMultiline
? Style.ColumnLimit
: Line.FirstStartColumn + First->ColumnWidth;
FormatToken *Current = First->Next;
bool InFunctionDecl = Line.MightBeFunctionDecl;
bool AlignArrayOfStructures =
(Style.AlignArrayOfStructures != FormatStyle::AIAS_None &&
@ -3475,16 +3476,15 @@ void TokenAnnotator::calculateFormattingInformation(AnnotatedLine &Line) const {
if (const bool IsCtorOrDtor = Tok->is(TT_CtorDtorDeclName);
IsCtorOrDtor ||
isFunctionDeclarationName(Style.isCpp(), *Tok, Line, ClosingParen)) {
if (!IsCtorOrDtor) {
LineIsFunctionDeclaration = true;
if (!IsCtorOrDtor)
Tok->setFinalizedType(TT_FunctionDeclarationName);
}
LineIsFunctionDeclaration = true;
SeenName = true;
break;
}
}
if (IsCpp && LineIsFunctionDeclaration &&
if (IsCpp && (LineIsFunctionDeclaration || First->is(TT_CtorDtorDeclName)) &&
Line.endsWith(tok::semi, tok::r_brace)) {
auto *Tok = Line.Last->Previous;
while (Tok->isNot(tok::r_brace))
@ -3507,7 +3507,7 @@ void TokenAnnotator::calculateFormattingInformation(AnnotatedLine &Line) const {
if (IsCpp) {
if (!LineIsFunctionDeclaration) {
// Annotate */&/&& in `operator` function calls as binary operators.
for (const auto *Tok = Line.First; Tok; Tok = Tok->Next) {
for (const auto *Tok = First; Tok; Tok = Tok->Next) {
if (Tok->isNot(tok::kw_operator))
continue;
do {
@ -3644,7 +3644,7 @@ void TokenAnnotator::calculateFormattingInformation(AnnotatedLine &Line) const {
calculateUnbreakableTailLengths(Line);
unsigned IndentLevel = Line.Level;
for (Current = Line.First; Current; Current = Current->Next) {
for (Current = First; Current; Current = Current->Next) {
if (Current->Role)
Current->Role->precomputeFormattingInfos(Current);
if (Current->MatchingParen &&

4
contrib/llvm-project/clang/lib/Headers/__stddef_unreachable.h
View File

@ -7,6 +7,8 @@
*===-----------------------------------------------------------------------===
*/
#ifndef __cplusplus
/*
* When -fbuiltin-headers-in-system-modules is set this is a non-modular header
* and needs to behave as if it was textual.
@ -15,3 +17,5 @@
(__has_feature(modules) && !__building_module(_Builtin_stddef))
#define unreachable() __builtin_unreachable()
#endif
#endif

42
contrib/llvm-project/compiler-rt/lib/builtins/riscv/restore.S
View File

@ -22,6 +22,8 @@
#if __riscv_xlen == 32
#ifndef __riscv_32e
.globl __riscv_restore_12
.type __riscv_restore_12,@function
__riscv_restore_12:
@ -86,8 +88,29 @@ __riscv_restore_0:
addi sp, sp, 16
ret
#else
.globl __riscv_restore_2
.type __riscv_restore_2,@function
.globl __riscv_restore_1
.type __riscv_restore_1,@function
.globl __riscv_restore_0
.type __riscv_restore_0,@function
__riscv_restore_2:
__riscv_restore_1:
__riscv_restore_0:
lw s1, 0(sp)
lw s0, 4(sp)
lw ra, 8(sp)
addi sp, sp, 12
ret
#endif
#elif __riscv_xlen == 64
#ifndef __riscv_64e
.globl __riscv_restore_12
.type __riscv_restore_12,@function
__riscv_restore_12:
@ -161,6 +184,25 @@ __riscv_restore_0:
addi sp, sp, 16
ret
#else
.globl __riscv_restore_2
.type __riscv_restore_2,@function
.globl __riscv_restore_1
.type __riscv_restore_1,@function
.globl __riscv_restore_0
.type __riscv_restore_0,@function
__riscv_restore_2:
__riscv_restore_1:
__riscv_restore_0:
ld s1, 0(sp)
ld s0, 8(sp)
ld ra, 16(sp)
addi sp, sp, 24
ret
#endif
#else
# error "xlen must be 32 or 64 for save-restore implementation
#endif

42
contrib/llvm-project/compiler-rt/lib/builtins/riscv/save.S
View File

@ -18,6 +18,8 @@
#if __riscv_xlen == 32
#ifndef __riscv_32e
.globl __riscv_save_12
.type __riscv_save_12,@function
__riscv_save_12:
@ -92,8 +94,29 @@ __riscv_save_0:
sw ra, 12(sp)
jr t0
#else
.globl __riscv_save_2
.type __riscv_save_2,@function
.globl __riscv_save_1
.type __riscv_save_1,@function
.globl __riscv_save_0
.type __riscv_save_0,@function
__riscv_save_2:
__riscv_save_1:
__riscv_save_0:
addi sp, sp, -12
sw s1, 0(sp)
sw s0, 4(sp)
sw ra, 8(sp)
jr t0
#endif
#elif __riscv_xlen == 64
#ifndef __riscv_64e
.globl __riscv_save_12
.type __riscv_save_12,@function
__riscv_save_12:
@ -181,6 +204,25 @@ __riscv_save_0:
sd ra, 8(sp)
jr t0
#else
.globl __riscv_save_2
.type __riscv_save_2,@function
.globl __riscv_save_1
.type __riscv_save_1,@function
.globl __riscv_save_0
.type __riscv_save_0,@function
__riscv_save_2:
__riscv_save_1:
__riscv_save_0:
addi sp, sp, -24
sd s1, 0(sp)
sd s0, 8(sp)
sd ra, 16(sp)
jr t0
#endif
#else
# error "xlen must be 32 or 64 for save-restore implementation
#endif

2
contrib/llvm-project/libcxx/include/__format/formatter_floating_point.h
View File

@ -689,7 +689,7 @@ __format_floating_point(_Tp __value, _FormatContext& __ctx, __format_spec::__par
// Let P equal the precision if nonzero, 6 if the precision is not
// specified, or 1 if the precision is 0. Then, if a conversion with
// style E would have an exponent of X:
int __p = std::max(1, (__specs.__has_precision() ? __specs.__precision_ : 6));
int __p = std::max<int>(1, (__specs.__has_precision() ? __specs.__precision_ : 6));
if (__result.__exponent == __result.__last)
// if P > X >= -4, the conversion is with style f or F and precision P - 1 - X.
// By including the radix point it calculates P - (1 + X)

29
contrib/llvm-project/libcxx/include/stddef.h
View File

@ -7,18 +7,6 @@
//
//===----------------------------------------------------------------------===//
#if defined(__need_ptrdiff_t) || defined(__need_size_t) || defined(__need_wchar_t) || defined(__need_NULL) || \
defined(__need_wint_t)
# if !defined(_LIBCPP_HAS_NO_PRAGMA_SYSTEM_HEADER)
# pragma GCC system_header
# endif
# include_next <stddef.h>
#elif !defined(_LIBCPP_STDDEF_H)
# define _LIBCPP_STDDEF_H
/*
stddef.h synopsis
@ -36,15 +24,18 @@ Types:
*/
# include <__config>
#include <__config>
# if !defined(_LIBCPP_HAS_NO_PRAGMA_SYSTEM_HEADER)
# pragma GCC system_header
# endif
#if !defined(_LIBCPP_HAS_NO_PRAGMA_SYSTEM_HEADER)
# pragma GCC system_header
#endif
# if __has_include_next(<stddef.h>)
# include_next <stddef.h>
# endif
// Note: This include is outside of header guards because we sometimes get included multiple times
// with different defines and the underlying <stddef.h> will know how to deal with that.
#include_next <stddef.h>
#ifndef _LIBCPP_STDDEF_H
# define _LIBCPP_STDDEF_H
# ifdef __cplusplus
typedef decltype(nullptr) nullptr_t;

7
contrib/llvm-project/lld/COFF/Chunks.cpp
View File

@ -652,6 +652,13 @@ void SectionChunk::getRuntimePseudoRelocs(
dyn_cast_or_null<Defined>(file->getSymbol(rel.SymbolTableIndex));
if (!target || !target->isRuntimePseudoReloc)
continue;
// If the target doesn't have a chunk allocated, it may be a
// DefinedImportData symbol which ended up unnecessary after GC.
// Normally we wouldn't eliminate section chunks that are referenced, but
// references within DWARF sections don't count for keeping section chunks
// alive. Thus such dangling references in DWARF sections are expected.
if (!target->getChunk())
continue;
int sizeInBits =
getRuntimePseudoRelocSize(rel.Type, file->ctx.config.machine);
if (sizeInBits == 0) {

3
contrib/llvm-project/llvm/lib/Analysis/InstructionSimplify.cpp
View File

@ -439,7 +439,8 @@ static Value *threadBinOpOverSelect(Instruction::BinaryOps Opcode, Value *LHS,
// Check that the simplified value has the form "X op Y" where "op" is the
// same as the original operation.
Instruction *Simplified = dyn_cast<Instruction>(FV ? FV : TV);
if (Simplified && Simplified->getOpcode() == unsigned(Opcode)) {
if (Simplified && Simplified->getOpcode() == unsigned(Opcode) &&
!Simplified->hasPoisonGeneratingFlags()) {
// The value that didn't simplify is "UnsimplifiedLHS op UnsimplifiedRHS".
// We already know that "op" is the same as for the simplified value. See
// if the operands match too. If so, return the simplified value.

7
contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
View File

@ -3575,6 +3575,11 @@ static SDValue combineCarryDiamond(SelectionDAG &DAG, const TargetLowering &TLI,
return SDValue();
if (Opcode != ISD::UADDO && Opcode != ISD::USUBO)
return SDValue();
// Guarantee identical type of CarryOut
EVT CarryOutType = N->getValueType(0);
if (CarryOutType != Carry0.getValue(1).getValueType() ||
CarryOutType != Carry1.getValue(1).getValueType())
return SDValue();
// Canonicalize the add/sub of A and B (the top node in the above ASCII art)
// as Carry0 and the add/sub of the carry in as Carry1 (the middle node).
@ -3622,7 +3627,7 @@ static SDValue combineCarryDiamond(SelectionDAG &DAG, const TargetLowering &TLI,
// TODO: match other operations that can merge flags (ADD, etc)
DAG.ReplaceAllUsesOfValueWith(Carry1.getValue(0), Merged.getValue(0));
if (N->getOpcode() == ISD::AND)
return DAG.getConstant(0, DL, MVT::i1);
return DAG.getConstant(0, DL, CarryOutType);
return Merged.getValue(1);
}

4
contrib/llvm-project/llvm/lib/IR/ConstantRange.cpp
View File

@ -746,7 +746,7 @@ ConstantRange ConstantRange::castOp(Instruction::CastOps CastOp,
Min = Min.zext(ResultBitWidth);
Max = Max.zext(ResultBitWidth);
}
return ConstantRange(std::move(Min), std::move(Max));
return getNonEmpty(std::move(Min), std::move(Max) + 1);
}
case Instruction::SIToFP: {
// TODO: use input range if available
@ -757,7 +757,7 @@ ConstantRange ConstantRange::castOp(Instruction::CastOps CastOp,
SMin = SMin.sext(ResultBitWidth);
SMax = SMax.sext(ResultBitWidth);
}
return ConstantRange(std::move(SMin), std::move(SMax));
return getNonEmpty(std::move(SMin), std::move(SMax) + 1);
}
case Instruction::FPTrunc:
case Instruction::FPExt:

42
contrib/llvm-project/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
View File

@ -1658,40 +1658,14 @@ AArch64TargetLowering::AArch64TargetLowering(const TargetMachine &TM,
setMaxAtomicSizeInBitsSupported(128);
if (Subtarget->isWindowsArm64EC()) {
// FIXME: are there other intrinsics we need to add here?
setLibcallName(RTLIB::MEMCPY, "#memcpy");
setLibcallName(RTLIB::MEMSET, "#memset");
setLibcallName(RTLIB::MEMMOVE, "#memmove");
setLibcallName(RTLIB::REM_F32, "#fmodf");
setLibcallName(RTLIB::REM_F64, "#fmod");
setLibcallName(RTLIB::FMA_F32, "#fmaf");
setLibcallName(RTLIB::FMA_F64, "#fma");
setLibcallName(RTLIB::SQRT_F32, "#sqrtf");
setLibcallName(RTLIB::SQRT_F64, "#sqrt");
setLibcallName(RTLIB::CBRT_F32, "#cbrtf");
setLibcallName(RTLIB::CBRT_F64, "#cbrt");
setLibcallName(RTLIB::LOG_F32, "#logf");
setLibcallName(RTLIB::LOG_F64, "#log");
setLibcallName(RTLIB::LOG2_F32, "#log2f");
setLibcallName(RTLIB::LOG2_F64, "#log2");
setLibcallName(RTLIB::LOG10_F32, "#log10f");
setLibcallName(RTLIB::LOG10_F64, "#log10");
setLibcallName(RTLIB::EXP_F32, "#expf");
setLibcallName(RTLIB::EXP_F64, "#exp");
setLibcallName(RTLIB::EXP2_F32, "#exp2f");
setLibcallName(RTLIB::EXP2_F64, "#exp2");
setLibcallName(RTLIB::EXP10_F32, "#exp10f");
setLibcallName(RTLIB::EXP10_F64, "#exp10");
setLibcallName(RTLIB::SIN_F32, "#sinf");
setLibcallName(RTLIB::SIN_F64, "#sin");
setLibcallName(RTLIB::COS_F32, "#cosf");
setLibcallName(RTLIB::COS_F64, "#cos");
setLibcallName(RTLIB::POW_F32, "#powf");
setLibcallName(RTLIB::POW_F64, "#pow");
setLibcallName(RTLIB::LDEXP_F32, "#ldexpf");
setLibcallName(RTLIB::LDEXP_F64, "#ldexp");
setLibcallName(RTLIB::FREXP_F32, "#frexpf");
setLibcallName(RTLIB::FREXP_F64, "#frexp");
// FIXME: are there intrinsics we need to exclude from this?
for (int i = 0; i < RTLIB::UNKNOWN_LIBCALL; ++i) {
auto code = static_cast<RTLIB::Libcall>(i);
auto libcallName = getLibcallName(code);
if ((libcallName != nullptr) && (libcallName[0] != '#')) {
setLibcallName(code, Saver.save(Twine("#") + libcallName).data());
}
}
}
}

3
contrib/llvm-project/llvm/lib/Target/AArch64/AArch64ISelLowering.h
View File

@ -1001,6 +1001,9 @@ private:
/// make the right decision when generating code for different targets.
const AArch64Subtarget *Subtarget;
llvm::BumpPtrAllocator BumpAlloc;
llvm::StringSaver Saver{BumpAlloc};
bool isExtFreeImpl(const Instruction *Ext) const override;
void addTypeForNEON(MVT VT);

8
contrib/llvm-project/llvm/lib/Target/Mips/Mips32r6InstrInfo.td
View File

@ -152,15 +152,15 @@ class SELNEZ_ENC : SPECIAL_3R_FM<0b00000, 0b110111>;
class LWPC_ENC : PCREL19_FM<OPCODE2_LWPC>;
class MAX_S_ENC : COP1_3R_FM<0b011101, FIELD_FMT_S>;
class MAX_D_ENC : COP1_3R_FM<0b011101, FIELD_FMT_D>;
class MAX_S_ENC : COP1_3R_FM<0b011110, FIELD_FMT_S>;
class MAX_D_ENC : COP1_3R_FM<0b011110, FIELD_FMT_D>;
class MIN_S_ENC : COP1_3R_FM<0b011100, FIELD_FMT_S>;
class MIN_D_ENC : COP1_3R_FM<0b011100, FIELD_FMT_D>;
class MAXA_S_ENC : COP1_3R_FM<0b011111, FIELD_FMT_S>;
class MAXA_D_ENC : COP1_3R_FM<0b011111, FIELD_FMT_D>;
class MINA_S_ENC : COP1_3R_FM<0b011110, FIELD_FMT_S>;
class MINA_D_ENC : COP1_3R_FM<0b011110, FIELD_FMT_D>;
class MINA_S_ENC : COP1_3R_FM<0b011101, FIELD_FMT_S>;
class MINA_D_ENC : COP1_3R_FM<0b011101, FIELD_FMT_D>;
class SELEQZ_S_ENC : COP1_3R_FM<0b010100, FIELD_FMT_S>;
class SELEQZ_D_ENC : COP1_3R_FM<0b010100, FIELD_FMT_D>;

60
contrib/llvm-project/llvm/lib/Target/Mips/MipsExpandPseudo.cpp
View File

@ -388,32 +388,18 @@ bool MipsExpandPseudo::expandAtomicBinOpSubword(
Opcode = Mips::XOR;
break;
case Mips::ATOMIC_LOAD_UMIN_I8_POSTRA:
IsUnsigned = true;
IsMin = true;
break;
case Mips::ATOMIC_LOAD_UMIN_I16_POSTRA:
IsUnsigned = true;
IsMin = true;
break;
[[fallthrough]];
case Mips::ATOMIC_LOAD_MIN_I8_POSTRA:
SEOp = Mips::SEB;
IsMin = true;
break;
case Mips::ATOMIC_LOAD_MIN_I16_POSTRA:
IsMin = true;
break;
case Mips::ATOMIC_LOAD_UMAX_I8_POSTRA:
IsUnsigned = true;
IsMax = true;
break;
case Mips::ATOMIC_LOAD_UMAX_I16_POSTRA:
IsUnsigned = true;
IsMax = true;
break;
[[fallthrough]];
case Mips::ATOMIC_LOAD_MAX_I8_POSTRA:
SEOp = Mips::SEB;
IsMax = true;
break;
case Mips::ATOMIC_LOAD_MAX_I16_POSTRA:
IsMax = true;
break;
@ -475,42 +461,14 @@ bool MipsExpandPseudo::expandAtomicBinOpSubword(
// For little endian we need to clear uninterested bits.
if (STI->isLittle()) {
if (!IsUnsigned) {
BuildMI(loopMBB, DL, TII->get(Mips::SRAV), OldVal)
.addReg(OldVal)
.addReg(ShiftAmnt);
BuildMI(loopMBB, DL, TII->get(Mips::SRAV), Incr)
.addReg(Incr)
.addReg(ShiftAmnt);
if (STI->hasMips32r2()) {
BuildMI(loopMBB, DL, TII->get(SEOp), OldVal).addReg(OldVal);
BuildMI(loopMBB, DL, TII->get(SEOp), Incr).addReg(Incr);
} else {
const unsigned ShiftImm = SEOp == Mips::SEH ? 16 : 24;
BuildMI(loopMBB, DL, TII->get(Mips::SLL), OldVal)
.addReg(OldVal, RegState::Kill)
.addImm(ShiftImm);
BuildMI(loopMBB, DL, TII->get(Mips::SRA), OldVal)
.addReg(OldVal, RegState::Kill)
.addImm(ShiftImm);
BuildMI(loopMBB, DL, TII->get(Mips::SLL), Incr)
.addReg(Incr, RegState::Kill)
.addImm(ShiftImm);
BuildMI(loopMBB, DL, TII->get(Mips::SRA), Incr)
.addReg(Incr, RegState::Kill)
.addImm(ShiftImm);
}
} else {
// and OldVal, OldVal, Mask
// and Incr, Incr, Mask
BuildMI(loopMBB, DL, TII->get(Mips::AND), OldVal)
.addReg(OldVal)
.addReg(Mask);
BuildMI(loopMBB, DL, TII->get(Mips::AND), Incr)
.addReg(Incr)
.addReg(Mask);
}
// and OldVal, OldVal, Mask
// and Incr, Incr, Mask
BuildMI(loopMBB, DL, TII->get(Mips::AND), OldVal)
.addReg(OldVal)
.addReg(Mask);
BuildMI(loopMBB, DL, TII->get(Mips::AND), Incr).addReg(Incr).addReg(Mask);
}
// unsigned: sltu Scratch4, oldVal, Incr
// signed: slt Scratch4, oldVal, Incr
BuildMI(loopMBB, DL, TII->get(SLTScratch4), Scratch4)

44
contrib/llvm-project/llvm/lib/Target/Sparc/SparcAsmPrinter.cpp
View File

@ -434,6 +434,50 @@ bool SparcAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
default:
// See if this is a generic print operand
return AsmPrinter::PrintAsmOperand(MI, OpNo, ExtraCode, O);
case 'L': // Low order register of a twin word register operand
case 'H': // High order register of a twin word register operand
{
const SparcSubtarget &Subtarget = MF->getSubtarget<SparcSubtarget>();
const MachineOperand &MO = MI->getOperand(OpNo);
const SparcRegisterInfo *RegisterInfo = Subtarget.getRegisterInfo();
Register MOReg = MO.getReg();
Register HiReg, LoReg;
if (!SP::IntPairRegClass.contains(MOReg)) {
// If we aren't given a register pair already, find out which pair it
// belongs to. Note that here, the specified register operand, which
// refers to the high part of the twinword, needs to be an even-numbered
// register.
MOReg = RegisterInfo->getMatchingSuperReg(MOReg, SP::sub_even,
&SP::IntPairRegClass);
if (!MOReg) {
SMLoc Loc;
OutContext.reportError(
Loc, "Hi part of pair should point to an even-numbered register");
OutContext.reportError(
Loc, "(note that in some cases it might be necessary to manually "
"bind the input/output registers instead of relying on "
"automatic allocation)");
return true;
}
}
HiReg = RegisterInfo->getSubReg(MOReg, SP::sub_even);
LoReg = RegisterInfo->getSubReg(MOReg, SP::sub_odd);
Register Reg;
switch (ExtraCode[0]) {
case 'L':
Reg = LoReg;
break;
case 'H':
Reg = HiReg;
break;
}
O << '%' << SparcInstPrinter::getRegisterName(Reg);
return false;
}
case 'f':
case 'r':
break;

4
contrib/llvm-project/llvm/lib/Target/X86/X86MCInstLower.cpp
View File

@ -959,8 +959,10 @@ void X86AsmPrinter::LowerPATCHABLE_OP(const MachineInstr &MI,
SmallString<256> Code;
unsigned MinSize = MI.getOperand(0).getImm();
if (NextMI != MI.getParent()->end()) {
if (NextMI != MI.getParent()->end() && !NextMI->isInlineAsm()) {
// Lower the next MachineInstr to find its byte size.
// If the next instruction is inline assembly, we skip lowering it for now,
// and assume we should always generate NOPs.
MCInst MCI;
MCIL.Lower(&*NextMI, MCI);

21
contrib/llvm-project/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
View File

@ -11653,12 +11653,12 @@ Value *BoUpSLP::vectorizeTree(TreeEntry *E, bool PostponedPHIs) {
if (UseIntrinsic && isVectorIntrinsicWithOverloadTypeAtArg(ID, -1))
TysForDecl.push_back(
FixedVectorType::get(CI->getType(), E->Scalars.size()));
auto *CEI = cast<CallInst>(VL0);
for (unsigned I : seq<unsigned>(0, CI->arg_size())) {
ValueList OpVL;
// Some intrinsics have scalar arguments. This argument should not be
// vectorized.
if (UseIntrinsic && isVectorIntrinsicWithScalarOpAtArg(ID, I)) {
CallInst *CEI = cast<CallInst>(VL0);
ScalarArg = CEI->getArgOperand(I);
OpVecs.push_back(CEI->getArgOperand(I));
if (isVectorIntrinsicWithOverloadTypeAtArg(ID, I))
@ -11671,6 +11671,25 @@ Value *BoUpSLP::vectorizeTree(TreeEntry *E, bool PostponedPHIs) {
LLVM_DEBUG(dbgs() << "SLP: Diamond merged for " << *VL0 << ".\n");
return E->VectorizedValue;
}
auto GetOperandSignedness = [&](unsigned Idx) {
const TreeEntry *OpE = getOperandEntry(E, Idx);
bool IsSigned = false;
auto It = MinBWs.find(OpE);
if (It != MinBWs.end())
IsSigned = It->second.second;
else
IsSigned = any_of(OpE->Scalars, [&](Value *R) {
return !isKnownNonNegative(R, SimplifyQuery(*DL));
});
return IsSigned;
};
ScalarArg = CEI->getArgOperand(I);
if (cast<VectorType>(OpVec->getType())->getElementType() !=
ScalarArg->getType()) {
auto *CastTy = FixedVectorType::get(ScalarArg->getType(),
VecTy->getNumElements());
OpVec = Builder.CreateIntCast(OpVec, CastTy, GetOperandSignedness(I));
}
LLVM_DEBUG(dbgs() << "SLP: OpVec[" << I << "]: " << *OpVec << "\n");
OpVecs.push_back(OpVec);
if (UseIntrinsic && isVectorIntrinsicWithOverloadTypeAtArg(ID, I))

6
lib/clang/include/VCSVersion.inc
View File

@ -1,8 +1,8 @@
#define LLVM_REVISION "llvmorg-18.1.3-0-gc13b7485b879"
#define LLVM_REVISION "llvmorg-18.1.4-0-ge6c3289804a6"
#define LLVM_REPOSITORY "https://github.com/llvm/llvm-project.git"
#define CLANG_REVISION "llvmorg-18.1.3-0-gc13b7485b879"
#define CLANG_REVISION "llvmorg-18.1.4-0-ge6c3289804a6"
#define CLANG_REPOSITORY "https://github.com/llvm/llvm-project.git"
#define LLDB_REVISION "llvmorg-18.1.3-0-gc13b7485b879"
#define LLDB_REVISION "llvmorg-18.1.4-0-ge6c3289804a6"
#define LLDB_REPOSITORY "https://github.com/llvm/llvm-project.git"

6
lib/clang/include/clang/Basic/Version.inc
View File

@ -1,8 +1,8 @@
#define CLANG_VERSION 18.1.3
#define CLANG_VERSION_STRING "18.1.3"
#define CLANG_VERSION 18.1.4
#define CLANG_VERSION_STRING "18.1.4"
#define CLANG_VERSION_MAJOR 18
#define CLANG_VERSION_MAJOR_STRING "18"
#define CLANG_VERSION_MINOR 1
#define CLANG_VERSION_PATCHLEVEL 3
#define CLANG_VERSION_PATCHLEVEL 4
#define CLANG_VENDOR "FreeBSD "

2
lib/clang/include/lld/Common/Version.inc
View File

@ -1,4 +1,4 @@
// Local identifier in __FreeBSD_version style
#define LLD_FREEBSD_VERSION 1500000
#define LLD_VERSION_STRING "18.1.3 (FreeBSD llvmorg-18.1.3-0-gc13b7485b879-" __XSTRING(LLD_FREEBSD_VERSION) ")"
#define LLD_VERSION_STRING "18.1.4 (FreeBSD llvmorg-18.1.4-0-ge6c3289804a6-" __XSTRING(LLD_FREEBSD_VERSION) ")"

6
lib/clang/include/lldb/Version/Version.inc
View File

@ -1,6 +1,6 @@
#define LLDB_VERSION 18.1.3
#define LLDB_VERSION_STRING "18.1.3"
#define LLDB_VERSION 18.1.4
#define LLDB_VERSION_STRING "18.1.4"
#define LLDB_VERSION_MAJOR 18
#define LLDB_VERSION_MINOR 1
#define LLDB_VERSION_PATCH 3
#define LLDB_VERSION_PATCH 4
/* #undef LLDB_FULL_VERSION_STRING */

4
lib/clang/include/llvm/Config/config.h
View File

@ -344,10 +344,10 @@
#define PACKAGE_NAME "LLVM"
/* Define to the full name and version of this package. */
#define PACKAGE_STRING "LLVM 18.1.3"
#define PACKAGE_STRING "LLVM 18.1.4"
/* Define to the version of this package. */
#define PACKAGE_VERSION "18.1.3"
#define PACKAGE_VERSION "18.1.4"
/* Define to the vendor of this package. */
/* #undef PACKAGE_VENDOR */

4
lib/clang/include/llvm/Config/llvm-config.h
View File

@ -180,10 +180,10 @@
#define LLVM_VERSION_MINOR 1
/* Patch version of the LLVM API */
#define LLVM_VERSION_PATCH 3
#define LLVM_VERSION_PATCH 4
/* LLVM version string */
#define LLVM_VERSION_STRING "18.1.3"
#define LLVM_VERSION_STRING "18.1.4"
/* Whether LLVM records statistics for use with GetStatistics(),
* PrintStatistics() or PrintStatisticsJSON()

2
lib/clang/include/llvm/Support/VCSRevision.h
View File

@ -1,2 +1,2 @@
#define LLVM_REVISION "llvmorg-18.1.3-0-gc13b7485b879"
#define LLVM_REVISION "llvmorg-18.1.4-0-ge6c3289804a6"
#define LLVM_REPOSITORY "https://github.com/llvm/llvm-project.git"