mirror of
https://git.hardenedbsd.org/hardenedbsd/HardenedBSD.git
synced 2025-01-23 17:31:43 +01:00
Repo copy isa/sio* to dev/sio/sio* in preperation for extra bus methods
including pci. Also, eliminate NSIOTOT and do it dynamically where it matters.
This commit is contained in:
parent
945f740363
commit
e5174d14c5
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=51018
sys
alpha/conf
conf
dev/sio
i386/conf
isa
@ -152,7 +152,6 @@ isa/atkbd_isa.c optional atkbd
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isa/atkbdc_isa.c optional atkbdc
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isa/fd.c optional fd
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isa/psm.c optional psm
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isa/sio.c optional sio
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isa/syscons_isa.c optional sc
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isa/vga_isa.c optional vga
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kern/subr_diskmbr.c standard
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@ -161,6 +161,7 @@ dev/ppbus/ppi.c optional ppi
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dev/ppbus/pps.c optional pps
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dev/ppbus/vpo.c optional vpo
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dev/ppbus/vpoio.c optional vpo
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dev/sio/sio.c optional sio
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smbus_if.o optional smbus \
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dependency "smbus_if.c smbus_if.h" \
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compile-with "${NORMAL_C}" \
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@ -152,7 +152,6 @@ isa/atkbd_isa.c optional atkbd
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isa/atkbdc_isa.c optional atkbdc
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isa/fd.c optional fd
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isa/psm.c optional psm
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isa/sio.c optional sio
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isa/syscons_isa.c optional sc
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isa/vga_isa.c optional vga
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kern/subr_diskmbr.c standard
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@ -362,7 +362,6 @@ i4b/layer1/i4b_usr_sti.c optional isic
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isa/atkbd_isa.c optional atkbd
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isa/atkbdc_isa.c optional atkbdc
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isa/psm.c optional psm
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isa/sio.c optional sio
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isa/syscons_isa.c optional sc
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isa/vga_isa.c optional vga
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kern/subr_diskmbr.c standard
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3060
sys/dev/sio/sio.c
3060
sys/dev/sio/sio.c
File diff suppressed because it is too large
Load Diff
@ -1,128 +0,0 @@
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/*-
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* Copyright (c) 1991 The Regents of the University of California.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: @(#)comreg.h 7.2 (Berkeley) 5/9/91
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* $FreeBSD$
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*/
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/* 16 bit baud rate divisor (lower byte in dca_data, upper in dca_ier) */
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#define COMBRD(x) (1843200 / (16*(x)))
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#ifdef PC98
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#define COMBRD_RSA(x) (14745600 / (16*(x)))
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#endif
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/* interrupt enable register */
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#define IER_ERXRDY 0x1
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#define IER_ETXRDY 0x2
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#define IER_ERLS 0x4
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#define IER_EMSC 0x8
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/* interrupt identification register */
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#define IIR_IMASK 0xf
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#define IIR_RXTOUT 0xc
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#define IIR_RLS 0x6
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#define IIR_RXRDY 0x4
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#define IIR_TXRDY 0x2
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#define IIR_NOPEND 0x1
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#define IIR_MLSC 0x0
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#define IIR_FIFO_MASK 0xc0 /* set if FIFOs are enabled */
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/* fifo control register */
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#define FIFO_ENABLE 0x01
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#define FIFO_RCV_RST 0x02
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#define FIFO_XMT_RST 0x04
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#define FIFO_DMA_MODE 0x08
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#define FIFO_RX_LOW 0x00
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#define FIFO_RX_MEDL 0x40
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#define FIFO_RX_MEDH 0x80
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#define FIFO_RX_HIGH 0xc0
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/* character format control register */
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#define CFCR_DLAB 0x80
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#define CFCR_SBREAK 0x40
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#define CFCR_PZERO 0x30
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#define CFCR_PONE 0x20
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#define CFCR_PEVEN 0x10
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#define CFCR_PODD 0x00
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#define CFCR_PENAB 0x08
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#define CFCR_STOPB 0x04
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#define CFCR_8BITS 0x03
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#define CFCR_7BITS 0x02
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#define CFCR_6BITS 0x01
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#define CFCR_5BITS 0x00
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/* modem control register */
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#define MCR_LOOPBACK 0x10
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#define MCR_IENABLE 0x08
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#define MCR_DRS 0x04
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#define MCR_RTS 0x02
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#define MCR_DTR 0x01
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/* line status register */
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#define LSR_RCV_FIFO 0x80
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#define LSR_TSRE 0x40
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#define LSR_TXRDY 0x20
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#define LSR_BI 0x10
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#define LSR_FE 0x08
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#define LSR_PE 0x04
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#define LSR_OE 0x02
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#define LSR_RXRDY 0x01
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#define LSR_RCV_MASK 0x1f
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/* modem status register */
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#define MSR_DCD 0x80
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#define MSR_RI 0x40
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#define MSR_DSR 0x20
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#define MSR_CTS 0x10
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#define MSR_DDCD 0x08
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#define MSR_TERI 0x04
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#define MSR_DDSR 0x02
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#define MSR_DCTS 0x01
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#ifdef PC98
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/* Hardware extension mode register for RSB-2000/3000. */
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#define EMR_EXBUFF 0x04
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#define EMR_CTSFLW 0x08
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#define EMR_DSRFLW 0x10
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#define EMR_RTSFLW 0x20
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#define EMR_DTRFLW 0x40
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#define EMR_EFMODE 0x80
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#endif
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/* speed to initialize to during chip tests */
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#define SIO_TEST_SPEED 9600
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/* default serial console speed if not set with sysctl or probed from boot */
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#ifndef CONSPEED
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#define CONSPEED 9600
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#endif
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@ -362,7 +362,6 @@ i4b/layer1/i4b_usr_sti.c optional isic
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isa/atkbd_isa.c optional atkbd
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isa/atkbdc_isa.c optional atkbdc
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isa/psm.c optional psm
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isa/sio.c optional sio
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isa/syscons_isa.c optional sc
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isa/vga_isa.c optional vga
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kern/subr_diskmbr.c standard
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3060
sys/isa/sio.c
3060
sys/isa/sio.c
File diff suppressed because it is too large
Load Diff
128
sys/isa/sioreg.h
128
sys/isa/sioreg.h
@ -1,128 +0,0 @@
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/*-
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* Copyright (c) 1991 The Regents of the University of California.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: @(#)comreg.h 7.2 (Berkeley) 5/9/91
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* $FreeBSD$
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*/
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/* 16 bit baud rate divisor (lower byte in dca_data, upper in dca_ier) */
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#define COMBRD(x) (1843200 / (16*(x)))
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#ifdef PC98
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#define COMBRD_RSA(x) (14745600 / (16*(x)))
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#endif
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/* interrupt enable register */
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#define IER_ERXRDY 0x1
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#define IER_ETXRDY 0x2
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#define IER_ERLS 0x4
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#define IER_EMSC 0x8
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/* interrupt identification register */
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#define IIR_IMASK 0xf
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#define IIR_RXTOUT 0xc
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#define IIR_RLS 0x6
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#define IIR_RXRDY 0x4
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#define IIR_TXRDY 0x2
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#define IIR_NOPEND 0x1
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#define IIR_MLSC 0x0
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#define IIR_FIFO_MASK 0xc0 /* set if FIFOs are enabled */
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/* fifo control register */
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#define FIFO_ENABLE 0x01
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#define FIFO_RCV_RST 0x02
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#define FIFO_XMT_RST 0x04
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#define FIFO_DMA_MODE 0x08
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#define FIFO_RX_LOW 0x00
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#define FIFO_RX_MEDL 0x40
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#define FIFO_RX_MEDH 0x80
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#define FIFO_RX_HIGH 0xc0
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/* character format control register */
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#define CFCR_DLAB 0x80
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#define CFCR_SBREAK 0x40
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#define CFCR_PZERO 0x30
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#define CFCR_PONE 0x20
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#define CFCR_PEVEN 0x10
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#define CFCR_PODD 0x00
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#define CFCR_PENAB 0x08
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#define CFCR_STOPB 0x04
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#define CFCR_8BITS 0x03
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#define CFCR_7BITS 0x02
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#define CFCR_6BITS 0x01
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#define CFCR_5BITS 0x00
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/* modem control register */
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#define MCR_LOOPBACK 0x10
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#define MCR_IENABLE 0x08
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#define MCR_DRS 0x04
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#define MCR_RTS 0x02
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#define MCR_DTR 0x01
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/* line status register */
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#define LSR_RCV_FIFO 0x80
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#define LSR_TSRE 0x40
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#define LSR_TXRDY 0x20
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#define LSR_BI 0x10
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#define LSR_FE 0x08
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#define LSR_PE 0x04
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#define LSR_OE 0x02
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#define LSR_RXRDY 0x01
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#define LSR_RCV_MASK 0x1f
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/* modem status register */
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#define MSR_DCD 0x80
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#define MSR_RI 0x40
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#define MSR_DSR 0x20
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#define MSR_CTS 0x10
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#define MSR_DDCD 0x08
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#define MSR_TERI 0x04
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#define MSR_DDSR 0x02
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#define MSR_DCTS 0x01
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#ifdef PC98
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/* Hardware extension mode register for RSB-2000/3000. */
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#define EMR_EXBUFF 0x04
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#define EMR_CTSFLW 0x08
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#define EMR_DSRFLW 0x10
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#define EMR_RTSFLW 0x20
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#define EMR_DTRFLW 0x40
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#define EMR_EFMODE 0x80
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#endif
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/* speed to initialize to during chip tests */
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#define SIO_TEST_SPEED 9600
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/* default serial console speed if not set with sysctl or probed from boot */
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#ifndef CONSPEED
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#define CONSPEED 9600
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#endif
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