diff --git a/sys/ia64/ia64/mca.c b/sys/ia64/ia64/mca.c index a11742a5ec2b..c9f0ae5b80ae 100644 --- a/sys/ia64/ia64/mca.c +++ b/sys/ia64/ia64/mca.c @@ -28,6 +28,7 @@ #include #include +#include #include #include #include @@ -36,6 +37,7 @@ #include #include #include +#include #include #include #include @@ -72,6 +74,8 @@ SYSCTL_INT(_hw_mca, OID_AUTO, last, CTLFLAG_RD, &mca_last, 0, static struct mtx mca_sysctl_lock; +static u_int mca_xiv_cmc; + static int mca_sysctl_inject(SYSCTL_HANDLER_ARGS) { @@ -227,6 +231,26 @@ ia64_mca_save_state(int type) } } +static u_int +ia64_mca_intr(struct thread *td, u_int xiv, struct trapframe *tf) +{ + + if (xiv == mca_xiv_cmc) { + printf("MCA: corrected machine check (CMC) interrupt\n"); + return (0); + } + + return (0); +} + +void +ia64_mca_init_ap(void) +{ + + if (mca_xiv_cmc != 0) + ia64_set_cmcv(mca_xiv_cmc); +} + void ia64_mca_init(void) { @@ -289,4 +313,14 @@ ia64_mca_init(void) */ for (i = 0; i < SAL_INFO_TYPES; i++) ia64_mca_save_state(i); + + /* + * Allocate a XIV for CMC interrupts, so that we can collect and save + * the corrected processor checks. + */ + mca_xiv_cmc = ia64_xiv_alloc(PI_SOFT, IA64_XIV_PLAT, ia64_mca_intr); + if (mca_xiv_cmc != 0) + ia64_set_cmcv(mca_xiv_cmc); + else + printf("MCA: CMC vector could not be allocated\n"); } diff --git a/sys/ia64/ia64/mp_machdep.c b/sys/ia64/ia64/mp_machdep.c index 05f352ac6061..5b94e53fe88a 100644 --- a/sys/ia64/ia64/mp_machdep.c +++ b/sys/ia64/ia64/mp_machdep.c @@ -163,6 +163,8 @@ ia64_store_mca_state(void* arg) sched_bind(td, pc->pc_cpuid); thread_unlock(td); + ia64_mca_init_ap(); + /* * Get and save the CPU specific MCA records. Should we get the * MCA state for each processor, or just the CMC state? diff --git a/sys/ia64/include/mca.h b/sys/ia64/include/mca.h index e13d2bfb4b59..1f38c135aafb 100644 --- a/sys/ia64/include/mca.h +++ b/sys/ia64/include/mca.h @@ -240,6 +240,7 @@ struct mca_pcidev_reg { #ifdef _KERNEL void ia64_mca_init(void); +void ia64_mca_init_ap(void); void ia64_mca_save_state(int); #endif /* _KERNEL */