amdtemp: add support for AMD Family 19h Models 40h-4Fh

PR:		281962
MFC after:	2 weeks
This commit is contained in:
Matthias Lanter 2024-10-13 13:21:19 +00:00 committed by Mark Johnston
parent a76e28d10f
commit ecbe99e162

View File

@ -114,6 +114,7 @@ struct amdtemp_softc {
#define DEVICEID_AMD_HOSTB17H_M30H_ROOT 0x1480 /* Also M70H, F19H M00H/M20H */ #define DEVICEID_AMD_HOSTB17H_M30H_ROOT 0x1480 /* Also M70H, F19H M00H/M20H */
#define DEVICEID_AMD_HOSTB17H_M60H_ROOT 0x1630 #define DEVICEID_AMD_HOSTB17H_M60H_ROOT 0x1630
#define DEVICEID_AMD_HOSTB19H_M10H_ROOT 0x14a4 #define DEVICEID_AMD_HOSTB19H_M10H_ROOT 0x14a4
#define DEVICEID_AMD_HOSTB19H_M40H_ROOT 0x14b5
#define DEVICEID_AMD_HOSTB19H_M60H_ROOT 0x14d8 #define DEVICEID_AMD_HOSTB19H_M60H_ROOT 0x14d8
#define DEVICEID_AMD_HOSTB19H_M70H_ROOT 0x14e8 #define DEVICEID_AMD_HOSTB19H_M70H_ROOT 0x14e8
@ -141,6 +142,7 @@ static const struct amdtemp_product {
{ VENDORID_AMD, DEVICEID_AMD_HOSTB17H_M30H_ROOT, false }, { VENDORID_AMD, DEVICEID_AMD_HOSTB17H_M30H_ROOT, false },
{ VENDORID_AMD, DEVICEID_AMD_HOSTB17H_M60H_ROOT, false }, { VENDORID_AMD, DEVICEID_AMD_HOSTB17H_M60H_ROOT, false },
{ VENDORID_AMD, DEVICEID_AMD_HOSTB19H_M10H_ROOT, false }, { VENDORID_AMD, DEVICEID_AMD_HOSTB19H_M10H_ROOT, false },
{ VENDORID_AMD, DEVICEID_AMD_HOSTB19H_M40H_ROOT, false },
{ VENDORID_AMD, DEVICEID_AMD_HOSTB19H_M60H_ROOT, false }, { VENDORID_AMD, DEVICEID_AMD_HOSTB19H_M60H_ROOT, false },
{ VENDORID_AMD, DEVICEID_AMD_HOSTB19H_M70H_ROOT, false }, { VENDORID_AMD, DEVICEID_AMD_HOSTB19H_M70H_ROOT, false },
}; };
@ -874,6 +876,7 @@ amdtemp_probe_ccd_sensors19h(device_t dev, uint32_t model)
maxreg = 12; maxreg = 12;
_Static_assert((int)NUM_CCDS >= 12, ""); _Static_assert((int)NUM_CCDS >= 12, "");
break; break;
case 0x40 ... 0x4f: /* Zen3+ Ryzen "Rembrandt" */
case 0x60 ... 0x6f: /* Zen4 Ryzen "Raphael" */ case 0x60 ... 0x6f: /* Zen4 Ryzen "Raphael" */
case 0x70 ... 0x7f: /* Zen4 Ryzen "Phoenix" */ case 0x70 ... 0x7f: /* Zen4 Ryzen "Phoenix" */
sc->sc_temp_base = AMDTEMP_ZEN4_CCD_TMP_BASE; sc->sc_temp_base = AMDTEMP_ZEN4_CCD_TMP_BASE;