mirror of
https://git.hardenedbsd.org/hardenedbsd/HardenedBSD.git
synced 2024-12-04 23:22:22 +01:00
d41cd6cce7
On boot we don't need to perform any CPU cache management when the IDC
and DIC fields in the ctr_el0 register are set. Add a command to tell
loader to ignore these fields. This could be useful, for example, if the
hardware is misreporting the values and we are missing a quirk to enable
it.
It is not expected this will be needed, but is only intended as a
workaround to ensure the kernel can still boot.
Sponsored by: The FreeBSD Foundation
(cherry picked from commit
|
||
---|---|---|
.. | ||
libarm64 | ||
Makefile |