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95ee2897e9
Remove /^\s*\*\n \*\s+\$FreeBSD\$$\n/
87 lines
3.5 KiB
C
87 lines
3.5 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2021 Ampere Computing LLC
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#ifndef _DEV_HWPMC_PMU_DMC620_REG_H_
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#define _DEV_HWPMC_PMU_DMC620_REG_H_
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#define DMC620_UNIT_PER_SOCKET 8
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#define DMC620_MAX_SOCKET 2
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#define DMC620_UNIT_MAX (DMC620_UNIT_PER_SOCKET * DMC620_MAX_SOCKET)
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#define DMC620_SNAPSHOT_REQ 0x000 /* WO */
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#define DMC620_SNAPSHOT_ACK 0x004 /* RO */
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#define DMC620_OVERFLOW_STATUS_CLKDIV2 0x008 /* RW */
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#define DMC620_OVERFLOW_STATUS_CLK 0x00C /* RW */
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#define DMC620_COUNTER_MASK_LO 0x000 /* RW */
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#define DMC620_COUNTER_MASK_HI 0x004 /* RW */
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#define DMC620_COUNTER_MATCH_LO 0x008 /* RW */
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#define DMC620_COUNTER_MATCH_HI 0x00C /* RW */
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#define DMC620_COUNTER_CONTROL 0x010 /* RW */
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#define DMC620_COUNTER_CONTROL_ENABLE (1 << 0)
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#define DMC620_COUNTER_CONTROL_INVERT (1 << 1)
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#define DMC620_COUNTER_CONTROL_EVENT_SHIFT 2
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#define DMC620_COUNTER_CONTROL_EVENT_MASK (0x1f << 2)
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#define DMC620_COUNTER_CONTROL_INCR_SHIFT 7
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#define DMC620_COUNTER_CONTROL_INCR_MASK (0x3 << 7)
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#define DMC620_COUNTER_SNAPSHOT_VALUE_LO 0x018 /* RO */
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#define DMC620_COUNTER_VALUE_LO 0x020 /* RW */
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#define DMC620_CLKDIV2_COUNTERS_BASE 0x010
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#define DMC620_CLKDIV2_COUNTERS_OFF 0x28
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#define DMC620_CLKDIV2_COUNTERS_N 8
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#define DMC620_CLKDIV2_REG(u, r) (DMC620_CLKDIV2_COUNTERS_BASE + \
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(DMC620_CLKDIV2_COUNTERS_OFF * (u)) + (r))
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#define DMC620_CLK_COUNTERS_BASE 0x150
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#define DMC620_CLK_COUNTERS_OFF 0x28
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#define DMC620_CLK_COUNTERS_N 2
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#define DMC620_CLK_REG(u, r) (DMC620_CLK_COUNTERS_BASE + \
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(DMC620_CLK_COUNTERS_OFF * (u)) + (r))
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/* CLK counters continue registers set. */
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#define DMC620_REG(u, r) (DMC620_CLKDIV2_COUNTERS_BASE + \
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(DMC620_CLKDIV2_COUNTERS_OFF * (u)) + (r))
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#define DMC620_PMU_DEFAULT_UNITS_N 8
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#define DMC620_COUNTERS_N (DMC620_CLKDIV2_COUNTERS_N + \
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DMC620_CLK_COUNTERS_N)
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/* IO from HWPMC module to driver. */
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uint32_t pmu_dmc620_rd4(void *arg, u_int cntr, off_t reg);
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void pmu_dmc620_wr4(void *arg, u_int cntr, off_t reg, uint32_t val);
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/* Driver's interrupt notification to HWPMC module. */
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int dmc620_intr(struct trapframe *tf, int c, int unit, int ri);
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/* Registration of counters pool. */
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void dmc620_pmc_register(int unit, void *argi, int domain);
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void dmc620_pmc_unregister(int unit);
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#endif /*_DEV_HWPMC_PMU_DMC620_REG_H_ */
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