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389 lines
11 KiB
C
389 lines
11 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (C) 2007-2008 Semihalf, Rafal Jaworowski
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* Copyright (C) 2006-2007 Semihalf, Piotr Kruszynski
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
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* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* From: FreeBSD: head/sys/dev/tsec/if_tsec_ocp.c 188712 2009-02-17 14:59:47Z raj
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*/
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/*
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* FDT 'simple-bus' attachment for Freescale TSEC controller.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/endian.h>
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#include <sys/lock.h>
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#include <sys/mbuf.h>
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#include <sys/mutex.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/socket.h>
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#include <sys/sysctl.h>
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#include <sys/bus.h>
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#include <machine/bus.h>
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#include <sys/rman.h>
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#include <machine/resource.h>
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#include <net/ethernet.h>
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#include <net/if.h>
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#include <net/if_media.h>
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#include <dev/fdt/fdt_common.h>
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#include <dev/mii/mii.h>
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#include <dev/mii/miivar.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <dev/ofw/openfirm.h>
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#include <dev/tsec/if_tsec.h>
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#include <dev/tsec/if_tsecreg.h>
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#include "miibus_if.h"
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#define TSEC_RID_TXIRQ 0
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#define TSEC_RID_RXIRQ 1
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#define TSEC_RID_ERRIRQ 2
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static int tsec_fdt_probe(device_t dev);
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static int tsec_fdt_attach(device_t dev);
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static int tsec_fdt_detach(device_t dev);
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static int tsec_setup_intr(struct tsec_softc *sc, struct resource **ires,
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void **ihand, int *irid, driver_intr_t handler, const char *iname);
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static void tsec_release_intr(struct tsec_softc *sc, struct resource *ires,
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void *ihand, int irid, const char *iname);
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static device_method_t tsec_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, tsec_fdt_probe),
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DEVMETHOD(device_attach, tsec_fdt_attach),
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DEVMETHOD(device_detach, tsec_fdt_detach),
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DEVMETHOD(device_shutdown, tsec_shutdown),
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DEVMETHOD(device_suspend, tsec_suspend),
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DEVMETHOD(device_resume, tsec_resume),
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/* MII interface */
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DEVMETHOD(miibus_readreg, tsec_miibus_readreg),
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DEVMETHOD(miibus_writereg, tsec_miibus_writereg),
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DEVMETHOD(miibus_statchg, tsec_miibus_statchg),
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DEVMETHOD_END
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};
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static driver_t tsec_fdt_driver = {
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"tsec",
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tsec_methods,
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sizeof(struct tsec_softc),
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};
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DRIVER_MODULE(tsec, simplebus, tsec_fdt_driver, 0, 0);
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static int
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tsec_fdt_probe(device_t dev)
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{
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struct tsec_softc *sc;
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uint32_t id;
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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if (ofw_bus_get_type(dev) == NULL ||
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strcmp(ofw_bus_get_type(dev), "network") != 0)
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return (ENXIO);
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if (!ofw_bus_is_compatible(dev, "gianfar") &&
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!ofw_bus_is_compatible(dev, "fsl,etsec2"))
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return (ENXIO);
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sc = device_get_softc(dev);
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/*
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* Device trees with "fsl,etsec2" compatible nodes don't have a reg
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* property, as it's been relegated to the queue-group children.
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*/
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if (ofw_bus_is_compatible(dev, "fsl,etsec2"))
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sc->is_etsec = 1;
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else {
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sc->sc_rrid = 0;
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sc->sc_rres = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->sc_rrid,
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RF_ACTIVE);
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if (sc->sc_rres == NULL)
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return (ENXIO);
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sc->sc_bas.bsh = rman_get_bushandle(sc->sc_rres);
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sc->sc_bas.bst = rman_get_bustag(sc->sc_rres);
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/* Check if we are eTSEC (enhanced TSEC) */
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id = TSEC_READ(sc, TSEC_REG_ID);
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sc->is_etsec = ((id >> 16) == TSEC_ETSEC_ID) ? 1 : 0;
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id |= TSEC_READ(sc, TSEC_REG_ID2);
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bus_release_resource(dev, SYS_RES_MEMORY, sc->sc_rrid, sc->sc_rres);
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if (id == 0) {
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device_printf(dev, "could not identify TSEC type\n");
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return (ENXIO);
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}
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}
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if (sc->is_etsec)
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device_set_desc(dev, "Enhanced Three-Speed Ethernet Controller");
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else
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device_set_desc(dev, "Three-Speed Ethernet Controller");
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return (BUS_PROBE_DEFAULT);
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}
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static int
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tsec_fdt_attach(device_t dev)
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{
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struct tsec_softc *sc;
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struct resource_list *rl;
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phandle_t child, mdio, phy;
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int acells, scells;
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int error = 0;
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sc = device_get_softc(dev);
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sc->dev = dev;
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sc->node = ofw_bus_get_node(dev);
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if (fdt_addrsize_cells(sc->node, &acells, &scells) != 0) {
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acells = 1;
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scells = 1;
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}
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if (ofw_bus_is_compatible(dev, "fsl,etsec2")) {
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rl = BUS_GET_RESOURCE_LIST(device_get_parent(dev), dev);
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/*
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* TODO: Add all children resources to the list. Will be
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* required to support multigroup mode.
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*/
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child = OF_child(sc->node);
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ofw_bus_reg_to_rl(dev, child, acells, scells, rl);
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ofw_bus_intr_to_rl(dev, child, rl, NULL);
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}
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/* Get phy address from fdt */
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if (OF_getencprop(sc->node, "phy-handle", &phy, sizeof(phy)) <= 0) {
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device_printf(dev, "PHY not found in device tree");
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return (ENXIO);
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}
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phy = OF_node_from_xref(phy);
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mdio = OF_parent(phy);
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OF_decode_addr(mdio, 0, &sc->phy_bst, &sc->phy_bsh, NULL);
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OF_getencprop(phy, "reg", &sc->phyaddr, sizeof(sc->phyaddr));
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/*
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* etsec2 MDIO nodes are given the MDIO module base address, so we need
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* to add the MII offset to get the PHY registers.
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*/
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if (ofw_bus_node_is_compatible(mdio, "fsl,etsec2-mdio"))
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sc->phy_regoff = TSEC_REG_MIIBASE;
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/* Init timer */
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callout_init(&sc->tsec_callout, 1);
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/* Init locks */
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mtx_init(&sc->transmit_lock, device_get_nameunit(dev), "TSEC TX lock",
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MTX_DEF);
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mtx_init(&sc->receive_lock, device_get_nameunit(dev), "TSEC RX lock",
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MTX_DEF);
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mtx_init(&sc->ic_lock, device_get_nameunit(dev), "TSEC IC lock",
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MTX_DEF);
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/* Allocate IO memory for TSEC registers */
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sc->sc_rrid = 0;
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sc->sc_rres = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->sc_rrid,
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RF_ACTIVE);
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if (sc->sc_rres == NULL) {
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device_printf(dev, "could not allocate IO memory range!\n");
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goto fail1;
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}
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sc->sc_bas.bsh = rman_get_bushandle(sc->sc_rres);
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sc->sc_bas.bst = rman_get_bustag(sc->sc_rres);
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/* TSEC attach */
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if (tsec_attach(sc) != 0) {
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device_printf(dev, "could not be configured\n");
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goto fail2;
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}
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/* Set up interrupts (TX/RX/ERR) */
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sc->sc_transmit_irid = TSEC_RID_TXIRQ;
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error = tsec_setup_intr(sc, &sc->sc_transmit_ires,
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&sc->sc_transmit_ihand, &sc->sc_transmit_irid,
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tsec_transmit_intr, "TX");
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if (error)
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goto fail2;
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sc->sc_receive_irid = TSEC_RID_RXIRQ;
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error = tsec_setup_intr(sc, &sc->sc_receive_ires,
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&sc->sc_receive_ihand, &sc->sc_receive_irid,
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tsec_receive_intr, "RX");
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if (error)
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goto fail3;
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sc->sc_error_irid = TSEC_RID_ERRIRQ;
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error = tsec_setup_intr(sc, &sc->sc_error_ires,
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&sc->sc_error_ihand, &sc->sc_error_irid,
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tsec_error_intr, "ERR");
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if (error)
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goto fail4;
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return (0);
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fail4:
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tsec_release_intr(sc, sc->sc_receive_ires, sc->sc_receive_ihand,
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sc->sc_receive_irid, "RX");
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fail3:
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tsec_release_intr(sc, sc->sc_transmit_ires, sc->sc_transmit_ihand,
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sc->sc_transmit_irid, "TX");
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fail2:
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bus_release_resource(dev, SYS_RES_MEMORY, sc->sc_rrid, sc->sc_rres);
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fail1:
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mtx_destroy(&sc->receive_lock);
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mtx_destroy(&sc->transmit_lock);
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return (ENXIO);
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}
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static int
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tsec_setup_intr(struct tsec_softc *sc, struct resource **ires, void **ihand,
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int *irid, driver_intr_t handler, const char *iname)
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{
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int error;
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*ires = bus_alloc_resource_any(sc->dev, SYS_RES_IRQ, irid, RF_ACTIVE);
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if (*ires == NULL) {
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device_printf(sc->dev, "could not allocate %s IRQ\n", iname);
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return (ENXIO);
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}
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error = bus_setup_intr(sc->dev, *ires, INTR_TYPE_NET | INTR_MPSAFE,
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NULL, handler, sc, ihand);
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if (error) {
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device_printf(sc->dev, "failed to set up %s IRQ\n", iname);
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if (bus_release_resource(sc->dev, SYS_RES_IRQ, *irid, *ires))
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device_printf(sc->dev, "could not release %s IRQ\n", iname);
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*ires = NULL;
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return (error);
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}
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return (0);
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}
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static void
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tsec_release_intr(struct tsec_softc *sc, struct resource *ires, void *ihand,
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int irid, const char *iname)
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{
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int error;
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if (ires == NULL)
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return;
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error = bus_teardown_intr(sc->dev, ires, ihand);
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if (error)
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device_printf(sc->dev, "bus_teardown_intr() failed for %s intr"
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", error %d\n", iname, error);
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error = bus_release_resource(sc->dev, SYS_RES_IRQ, irid, ires);
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if (error)
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device_printf(sc->dev, "bus_release_resource() failed for %s "
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"intr, error %d\n", iname, error);
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}
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static int
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tsec_fdt_detach(device_t dev)
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{
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struct tsec_softc *sc;
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int error;
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sc = device_get_softc(dev);
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/* Wait for stopping watchdog */
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callout_drain(&sc->tsec_callout);
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/* Stop and release all interrupts */
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tsec_release_intr(sc, sc->sc_transmit_ires, sc->sc_transmit_ihand,
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sc->sc_transmit_irid, "TX");
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tsec_release_intr(sc, sc->sc_receive_ires, sc->sc_receive_ihand,
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sc->sc_receive_irid, "RX");
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tsec_release_intr(sc, sc->sc_error_ires, sc->sc_error_ihand,
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sc->sc_error_irid, "ERR");
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/* TSEC detach */
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tsec_detach(sc);
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/* Free IO memory handler */
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if (sc->sc_rres) {
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error = bus_release_resource(dev, SYS_RES_MEMORY, sc->sc_rrid,
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sc->sc_rres);
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if (error)
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device_printf(dev, "bus_release_resource() failed for"
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" IO memory, error %d\n", error);
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}
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/* Destroy locks */
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mtx_destroy(&sc->receive_lock);
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mtx_destroy(&sc->transmit_lock);
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mtx_destroy(&sc->ic_lock);
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return (0);
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}
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void
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tsec_get_hwaddr(struct tsec_softc *sc, uint8_t *addr)
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{
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union {
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uint32_t reg[2];
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uint8_t addr[6];
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} hw;
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int i;
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hw.reg[0] = hw.reg[1] = 0;
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/* Retrieve the hardware address from the device tree. */
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i = OF_getprop(sc->node, "local-mac-address", (void *)hw.addr, 6);
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if (i == 6 && (hw.reg[0] != 0 || hw.reg[1] != 0)) {
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bcopy(hw.addr, addr, 6);
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return;
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}
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/* Also try the mac-address property, which is second-best */
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i = OF_getprop(sc->node, "mac-address", (void *)hw.addr, 6);
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if (i == 6 && (hw.reg[0] != 0 || hw.reg[1] != 0)) {
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bcopy(hw.addr, addr, 6);
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return;
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}
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/*
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* Fall back -- use the currently programmed address in the hope that
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* it was set be firmware...
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*/
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hw.reg[0] = TSEC_READ(sc, TSEC_REG_MACSTNADDR1);
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hw.reg[1] = TSEC_READ(sc, TSEC_REG_MACSTNADDR2);
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for (i = 0; i < 6; i++)
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addr[5-i] = hw.addr[i];
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}
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