Ed Maste 4258eb5a0d x86: handle domains with no CPUs usable for intr delivery ... We can end up with a domain having no CPUs capable of receiving I/O interrupts. This can occur, for example, when all APIC IDs in a given domain are 256 or greater, and we have no IOMMU. In this case disable per-domain interrupt support, effectively reverting to the behaviour before commit a48de40bcc ("Only use CPUs in the domain the device is attached to for default"). This has a performance impact but at least allows the system to be functional. It is a stop- gap until we can rely on the presence of an IOMMU on all x86 platforms. Thanks to AMD for providing the high-thread-count machine I used for testing this change, and to cperciva for testing on other hardware. Reviewed by: jhb Tested by: cperciva, emaste Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D41501		2023-08-21 15:52:10 -04:00
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acpica	sys: Remove $FreeBSD$: one-line .c pattern	2023-08-16 11:54:36 -06:00
bios	sys: Remove $FreeBSD$: one-line .c pattern	2023-08-16 11:54:36 -06:00
conf	sys: Remove $FreeBSD$: one-line sh pattern	2023-08-16 11:54:58 -06:00
cpufreq	sys: Remove $FreeBSD$: one-line .c pattern	2023-08-16 11:54:36 -06:00
include
iommu	sys: Remove $FreeBSD$: one-line .c pattern	2023-08-16 11:54:36 -06:00
isa	sys: Remove $FreeBSD$: one-line .c pattern	2023-08-16 11:54:36 -06:00
linux	linux(4): Remove sys/cdefs.h inclusion under x86/linux due to 685dc743	2023-08-18 15:58:32 +03:00
pci	sys: Remove $FreeBSD$: one-line .c pattern	2023-08-16 11:54:36 -06:00
x86	x86: handle domains with no CPUs usable for intr delivery	2023-08-21 15:52:10 -04:00
xen	sys: Remove $FreeBSD$: one-line .c pattern	2023-08-16 11:54:36 -06:00