mirror of
https://git.hardenedbsd.org/hardenedbsd/HardenedBSD.git
synced 2024-11-15 06:42:51 +01:00
8455e365f7
Synced to the ixgbe shared code with DPDK shared code which has local fixes on top of "not-released-cid-ixgbe.2020.06.09.tar.gz" Approved by: imp MFC after: 1 week Differential Revision: https://reviews.freebsd.org/D31621
79 lines
2.9 KiB
C
79 lines
2.9 KiB
C
/******************************************************************************
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Copyright (c) 2001-2020, Intel Corporation
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice,
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this list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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3. Neither the name of the Intel Corporation nor the names of its
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contributors may be used to endorse or promote products derived from
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this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE.
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******************************************************************************/
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/*$FreeBSD$*/
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#include "ixgbe.h"
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inline u16
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ixgbe_read_pci_cfg(struct ixgbe_hw *hw, u32 reg)
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{
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return pci_read_config(((struct adapter *)hw->back)->dev, reg, 2);
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}
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inline void
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ixgbe_write_pci_cfg(struct ixgbe_hw *hw, u32 reg, u16 value)
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{
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pci_write_config(((struct adapter *)hw->back)->dev, reg, value, 2);
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}
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inline u32
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ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg)
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{
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return bus_space_read_4(((struct adapter *)hw->back)->osdep.mem_bus_space_tag,
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((struct adapter *)hw->back)->osdep.mem_bus_space_handle, reg);
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}
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inline void
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ixgbe_write_reg(struct ixgbe_hw *hw, u32 reg, u32 val)
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{
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bus_space_write_4(((struct adapter *)hw->back)->osdep.mem_bus_space_tag,
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((struct adapter *)hw->back)->osdep.mem_bus_space_handle,
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reg, val);
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}
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inline u32
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ixgbe_read_reg_array(struct ixgbe_hw *hw, u32 reg, u32 offset)
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{
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return bus_space_read_4(((struct adapter *)hw->back)->osdep.mem_bus_space_tag,
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((struct adapter *)hw->back)->osdep.mem_bus_space_handle,
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reg + (offset << 2));
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}
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inline void
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ixgbe_write_reg_array(struct ixgbe_hw *hw, u32 reg, u32 offset, u32 val)
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{
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bus_space_write_4(((struct adapter *)hw->back)->osdep.mem_bus_space_tag,
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((struct adapter *)hw->back)->osdep.mem_bus_space_handle,
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reg + (offset << 2), val);
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}
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