mirror of
https://git.hardenedbsd.org/hardenedbsd/HardenedBSD.git
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118 lines
2.1 KiB
Plaintext
118 lines
2.1 KiB
Plaintext
/*
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*/
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/dts-v1/;
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/ {
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model = "ARM Versatile PB";
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "arm,versatile-pb";
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amba {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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intc: interrupt-controller {
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compatible = "arm,versatile-vic";
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reg = <0x10140000 0x1000>;
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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sic: secondary-interrupt-controller {
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compatible = "arm,versatile-sic";
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reg = <0x10003000 0x28>;
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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uart0: uart0 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0x101f1000 0x1000>;
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interrupts = <12>;
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interrupt-parent = <&intc>;
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clock-frequency = <3000000>;
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reg-shift = <2>;
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};
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uart1: uart1 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0x101f2000 0x1000>;
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interrupts = <13>;
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interrupt-parent = <&intc>;
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clock-frequency = <3000000>;
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reg-shift = <2>;
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};
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uart2: uart2 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0x101f3000 0x1000>;
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interrupts = <14>;
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interrupt-parent = <&intc>;
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clock-frequency = <3000000>;
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reg-shift = <2>;
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};
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timer0 {
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compatible = "arm,sp804", "arm,primecell";
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reg = <0x101e2000 0x40>;
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interrupts = <4>;
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interrupt-parent = <&intc>;
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};
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pci0 {
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compatible = "versatile,pci";
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reg = <0x10000044 0x4
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0x10001000 0x1000
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0x41000000 0x01000000
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0x42000000 0x02000000>;
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};
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net {
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compatible = "smsc,lan91c111";
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reg = <0x10010000 0x10000>;
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interrupts = <25>;
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interrupt-parent = <&intc>;
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};
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display {
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compatible = "arm,pl110", "arm,primecell";
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reg = <0x10000050 4
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0x10120000 0x1000>;
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interrupts = <16>;
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interrupt-parent = <&intc>;
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};
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/*
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* Cut corner here: we do not have proper interrupt
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* controllers cascading so just hardwire SIC IRQ 3
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* to VIC IRQ31
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*/
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kmi {
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compatible = "arm,pl050", "arm,primecell";
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reg = <0x10006000 0x1000>;
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interrupt-parent = <&intc>;
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interrupts = <31>;
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};
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};
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memory {
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device_type = "memory";
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reg = <0 0x08000000>; /* 128MB */
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};
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aliases {
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uart0 = &uart0;
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};
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chosen {
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stdin = "uart0";
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stdout = "uart0";
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};
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};
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