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50 lines
1.4 KiB
Plaintext
50 lines
1.4 KiB
Plaintext
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* Multi purpose pin (MPP) configuration.
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Required properties:
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- pin-map : array of pin configurations. Each pin is defined by 2 cells,
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respectively: <pin> <function>. Pins not specified in the pin-map property
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are assumed to have default value of <function> = 0, which means GPIO.
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- pin : pin number.
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- function : function ID of the pin according to the assignment tables in
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User Manual. Each pin can have many possible functions depending on the
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MPP unit incarnation.
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- pin-count: number of the physical MPP connections on the SOC (depending on
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the model it can be 24-50, or possibly else in future devices).
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Example:
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mpp@10000 {
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#pin-cells = <2>;
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compatible = "mrvl,mpp";
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reg = <0x10000 0x34>;
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pin-count= <50>;
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pin-map = <
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0 1 /* MPP[0]: NF_IO[2] */
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1 1 /* MPP[1]: NF_IO[3] */
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2 1 /* MPP[2]: NF_IO[4] */
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3 1 /* MPP[3]: NF_IO[5] */
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4 1 /* MPP[4]: NF_IO[6] */
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5 1 /* MPP[5]: NF_IO[7] */
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6 1 /* MPP[6]: SYSRST_OUTn */
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7 2 /* MPP[7]: SPI_SCn */
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8 1 /* MPP[8]: TW_SDA */
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9 1 /* MPP[9]: TW_SCK */
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10 3 /* MPP[10]: UA0_TXD */
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11 3 /* MPP[11]: UA0_RXD */
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12 1 /* MPP[12]: SD_CLK */
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13 1 /* MPP[13]: SD_CMD */
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14 1 /* MPP[14]: SD_D[0] */
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15 1 /* MPP[15]: SD_D[1] */
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16 1 /* MPP[16]: SD_D[2] */
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17 1 /* MPP[17]: SD_D[3] */
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18 1 /* MPP[18]: NF_IO[0] */
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19 1 /* MPP[19]: NF_IO[1] */
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20 5 /* MPP[20]: SATA1_AC */
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21 5 >; /* MPP[21]: SATA0_AC */
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};
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