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https://git.hardenedbsd.org/hardenedbsd/HardenedBSD.git
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4a078e7d90
Improved bus probing, symbolic names for registers.. Chip set parameters get dumped for intel PCI chip sets (82424+82434 only, for now).
299 lines
7.0 KiB
C
299 lines
7.0 KiB
C
/**************************************************************************
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**
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** $Id: pcibios.c,v 2.0.0.2 94/08/18 23:04:11 wolf Exp $
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**
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** #define for pci-bus bios functions.
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**
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** 386bsd / FreeBSD
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**
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**-------------------------------------------------------------------------
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**
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** Copyright (c) 1994 Wolfgang Stanglmeier. All rights reserved.
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**
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** Redistribution and use in source and binary forms, with or without
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** modification, are permitted provided that the following conditions
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** are met:
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** 1. Redistributions of source code must retain the above copyright
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** notice, this list of conditions and the following disclaimer.
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** 2. Redistributions in binary form must reproduce the above copyright
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** notice, this list of conditions and the following disclaimer in the
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** documentation and/or other materials provided with the distribution.
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** 3. The name of the author may not be used to endorse or promote products
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** derived from this software without specific prior written permission.
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**
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** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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** DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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**
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**-------------------------------------------------------------------------
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*/
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#include "types.h"
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#include "i386/isa/isa.h"
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#include "i386/pci/pci.h"
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#include "i386/pci/pcibios.h"
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extern int printf();
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static char pci_mode;
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char ident_pcibios_c[] =
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"\n$Id: pcibios.c,v 2.0.0.2 94/08/18 23:04:11 wolf Exp $\n";
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/*--------------------------------------------------------------------
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**
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** Port access
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**
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**--------------------------------------------------------------------
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**
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** @FREEBSD@ inl() and outl() functions are not defined
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*/
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#define DIRTY
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#ifdef DIRTY
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#undef inl
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#define inl(port) \
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({ u_long data; \
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__asm __volatile("inl %1, %0": "=a" (data): "d" ((u_short)(port))); \
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data; })
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#undef outl
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#define outl(port, data) \
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{__asm __volatile("outl %0, %1"::"a" ((u_long)(data)), "d" ((u_short)(port)));}
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#undef inb
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#define inb(port) \
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({ u_char data; \
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__asm __volatile("inb %1, %0": "=a" (data): "d" ((u_short)(port))); \
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data; })
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#undef outb
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#define outb(port, data) \
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{__asm __volatile("outb %0, %1"::"a" ((u_char)(data)), "d" ((u_short)(port)));}
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#endif
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/*--------------------------------------------------------------------
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**
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** Determine configuration mode
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**
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**--------------------------------------------------------------------
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*/
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#define CONF1_ENABLE 0x80000000ul
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#define CONF1_ADDR_PORT 0x0cf8
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#define CONF1_DATA_PORT 0x0cfc
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#define CONF2_ENABLE_PORT 0x0cf8
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#define CONF2_FORWARD_PORT 0x0cfa
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int pci_conf_mode (void)
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{
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#ifdef PCI_CONF_MODE
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return (PCI_CONF_MODE)
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#else /* PCI_CONF_MODE */
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u_long result, oldval;
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/*---------------------------------------
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** Configuration mode 2 ?
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**---------------------------------------
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*/
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outb (CONF2_ENABLE_PORT, 0);
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outb (CONF2_FORWARD_PORT, 0);
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if (!inb (CONF2_ENABLE_PORT) && !inb (CONF2_FORWARD_PORT)) {
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pci_mode = 2;
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return (2);
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};
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/*---------------------------------------
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** Configuration mode 1 ?
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**---------------------------------------
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*/
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oldval = inl (CONF1_ADDR_PORT);
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outl (CONF1_ADDR_PORT, CONF1_ENABLE);
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result = inl (CONF1_ADDR_PORT);
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outl (CONF1_ADDR_PORT, oldval);
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if (result == CONF1_ENABLE) {
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pci_mode = 1;
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return (1);
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};
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/*---------------------------------------
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** No PCI bus available.
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**---------------------------------------
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*/
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return (0);
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#endif /* PCI_CONF_MODE */
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}
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/*--------------------------------------------------------------------
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**
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** Build a pcitag from bus, device and function number
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**
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**--------------------------------------------------------------------
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*/
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pcici_t pcitag (unsigned char bus,
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unsigned char device,
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unsigned char func)
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{
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pcici_t tag;
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tag.cfg1 = 0;
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if (device >= 32) return tag;
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if (func >= 8) return tag;
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switch (pci_mode) {
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case 1:
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tag.cfg1 = CONF1_ENABLE
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| (((u_long) bus ) << 16ul)
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| (((u_long) device) << 11ul)
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| (((u_long) func ) << 8ul);
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break;
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case 2:
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if (device >= 16) break;
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tag.cfg2.port = 0xc000 | (device << 8ul);
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tag.cfg2.enable = 0xf1 | (func << 1ul);
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tag.cfg2.forward = bus;
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break;
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};
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return tag;
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}
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/*--------------------------------------------------------------------
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**
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** Read register from configuration space.
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**
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**--------------------------------------------------------------------
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*/
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u_long pci_conf_read (pcici_t tag, u_long reg)
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{
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u_long addr, data = 0;
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if (!tag.cfg1) return (0xfffffffful);
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switch (pci_mode) {
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case 1:
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addr = tag.cfg1 | reg & 0xfc;
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#ifdef PCI_DEBUG
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printf ("pci_conf_read(1): addr=%x ", addr);
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#endif
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outl (CONF1_ADDR_PORT, addr);
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data = inl (CONF1_DATA_PORT);
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outl (CONF1_ADDR_PORT, 0 );
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break;
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case 2:
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addr = tag.cfg2.port | reg & 0xfc;
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#ifdef PCI_DEBUG
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printf ("pci_conf_read(2): addr=%x ", addr);
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#endif
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outb (CONF2_ENABLE_PORT , tag.cfg2.enable );
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outb (CONF2_FORWARD_PORT, tag.cfg2.forward);
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data = inl ((u_short) addr);
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outb (CONF2_ENABLE_PORT, 0);
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outb (CONF2_FORWARD_PORT, 0);
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break;
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};
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#ifdef PCI_DEBUG
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printf ("data=%x\n", data);
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#endif
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return (data);
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}
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/*--------------------------------------------------------------------
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**
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** Write register into configuration space.
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**
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**--------------------------------------------------------------------
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*/
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void pci_conf_write (pcici_t tag, u_long reg, u_long data)
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{
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u_long addr;
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if (!tag.cfg1) return;
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switch (pci_mode) {
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case 1:
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addr = tag.cfg1 | reg & 0xfc;
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#ifdef PCI_DEBUG
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printf ("pci_conf_write(1): addr=%x data=%x\n",
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addr, data);
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#endif
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outl (CONF1_ADDR_PORT, addr);
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outl (CONF1_DATA_PORT, data);
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outl (CONF1_ADDR_PORT, 0 );
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break;
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case 2:
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addr = tag.cfg2.port | reg & 0xfc;
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#ifdef PCI_DEBUG
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printf ("pci_conf_write(2): addr=%x data=%x\n",
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addr, data);
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#endif
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outb (CONF2_ENABLE_PORT, tag.cfg2.enable);
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outb (CONF2_FORWARD_PORT, tag.cfg2.forward);
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outl ((u_short) addr, data);
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outb (CONF2_ENABLE_PORT, 0);
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outb (CONF2_FORWARD_PORT, 0);
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break;
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};
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}
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/*--------------------------------------------------------------------
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**
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** Get the number of available PCI busses.
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**
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**--------------------------------------------------------------------
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*/
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/*
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** A certain chipset seems to ignore the bus number.
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** Until fixed, check only bus 0.
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** Maybe it's a good idea to ask the real pci bios
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** if available.
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*/
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#ifndef PCI_LAST_BUS
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#define PCI_LAST_BUS (0)
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#endif /* PCI_LAST_BUS */
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int pci_last_bus (void)
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{
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return (PCI_LAST_BUS);
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}
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