HardenedBSD/sys/dev/bce
Xin LI ab7b2d927c DMA synchronization fixes:
- In bce_rx_intr(), use BUS_DMASYNC_POSTREAD instead of
   BUS_DMASYNC_POSTWRITE, as we want to "read" from the
   rx page chain pages.
 - Document why we need to do PREWRITE after we have updated
   the rx page chain pages.
 - In bce_intr(), use BUS_DMASYNC_POSTREAD and
   BUS_DMASYNC_PREREAD when before and after CPU "reading"
   the status block.
 - Adjust some nearby style mismatches/etc.

Pointed out by:	yongari
Approved by:	davidch (no objection) but bugs are mine :)
2009-05-18 01:51:52 +00:00
..
if_bce.c DMA synchronization fixes: 2009-05-18 01:51:52 +00:00
if_bcefw.h
if_bcereg.h