mirror of
https://git.hardenedbsd.org/hardenedbsd/HardenedBSD.git
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4c024bbdf8
supports All Cyrix CPUs, IBM Blue Lightning CPU and NexGen (now AMD)
Nx586 CPU, and initialize special registers of Cyrix CPU and msr of
IBM Blue Lightning CPU.
If revision of Cyrix 6x86 CPU < 2.7, CPU cache is enabled in
write-through mode. This can be disabled by kernel configuration
options.
Reviewed by: Bruce Evans <bde@freebsd.org> and
Jordan K. Hubbard <jkh@freebsd.org>
82 lines
3.1 KiB
C
82 lines
3.1 KiB
C
/*-
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* Copyright (c) 1995 Bruce D. Evans.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the author nor the names of contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $Id: md_var.h,v 1.12 1997/02/22 09:34:49 peter Exp $
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*/
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#ifndef _MACHINE_MD_VAR_H_
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#define _MACHINE_MD_VAR_H_
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/*
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* Miscellaneous machine-dependent declarations.
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*/
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extern int Maxmem;
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extern u_int atdevbase; /* offset in virtual memory of ISA io mem */
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extern u_long cpu_feature;
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extern u_long cpu_high;
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extern u_long cpu_id;
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extern u_long cyrix_did;
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extern char cpu_vendor[];
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extern char etext[];
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extern char kstack[];
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extern void (*netisrs[32]) __P((void));
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extern int nfs_diskless_valid;
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extern char sigcode[];
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extern int szsigcode;
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typedef void alias_for_inthand_t __P((u_int cs, u_int ef, u_int esp, u_int ss));
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struct proc;
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struct reg;
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void bcopyb __P((const void *from, void *to, size_t len));
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void cpu_reset __P((void));
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void cpu_halt __P((void));
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void doreti_iret __P((void)) __asm(__STRING(doreti_iret));
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void doreti_iret_fault __P((void)) __asm(__STRING(doreti_iret_fault));
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void doreti_popl_ds __P((void)) __asm(__STRING(doreti_popl_ds));
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void doreti_popl_ds_fault __P((void)) __asm(__STRING(doreti_popl_ds_fault));
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void doreti_popl_es __P((void)) __asm(__STRING(doreti_popl_es));
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void doreti_popl_es_fault __P((void)) __asm(__STRING(doreti_popl_es_fault));
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int fill_regs __P((struct proc *p, struct reg *regs));
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void fillw __P((int /*u_short*/ pat, void *base, size_t cnt));
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int fusword __P((void *base));
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u_long kvtop __P((void *addr));
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void setidt __P((int idx, alias_for_inthand_t *func, int typ, int dpl,
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int selec));
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void userconfig __P((void));
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void vm_bounce_init __P((void));
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int vm_page_zero_idle __P((void));
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#ifdef PC98
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extern int need_pre_dma_flush;
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extern int need_post_dma_flush;
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#endif
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#endif /* !_MACHINE_MD_VAR_H_ */
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