HardenedBSD/sys/riscv
Ayrton Munoz 85918beb38 intrng: Add support for multiple interrupt roots
Different types of interrupts may require using different exception
vectors so this commit adds support multiple interrupt roots to handle
these cases. Archs may opt-in to multiple interrupt roots by defining
INTR_ROOT_NUM as the number of roots in their intr.h. Based off
https://reviews.freebsd.org/D40161.

Signed-off-by: Ayrton Munoz <a.munoz3327@gmail.com>
Co-authored-by: Kyle Evans <kevans@FreeBSD.org>
Co-authored-by: Andrew Turner <andrew@FreeBSD.org>
Reviewed-by: imp,mmel,mhorne
Pull-Request: https://github.com/freebsd/freebsd-src/pull/1363
2024-09-22 07:18:34 -06:00
..
allwinner
conf
include riscv: fix csr_swap() 2024-09-04 10:08:40 +01:00
riscv intrng: Add support for multiple interrupt roots 2024-09-22 07:18:34 -06:00
sifive newbus: globally replace device_add_child(..., -1) with DEVICE_UNIT_ANY 2024-07-24 22:22:58 -06:00
starfive