mirror of
https://git.hardenedbsd.org/hardenedbsd/HardenedBSD.git
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5b56413d04
Sponsored by: Netflix
719 lines
18 KiB
C
719 lines
18 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (C) 2002 Benno Rice.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/module.h>
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#include <sys/bus.h>
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#include <sys/conf.h>
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#include <sys/kernel.h>
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#include <dev/ofw/openfirm.h>
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#include <dev/ofw/ofw_pci.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcireg.h>
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#include <machine/bus.h>
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#include <machine/intr_machdep.h>
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#include <machine/md_var.h>
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#include <machine/pio.h>
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#include <machine/resource.h>
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#include <sys/rman.h>
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#include <powerpc/powermac/uninorthvar.h>
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#include <vm/vm.h>
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#include <vm/pmap.h>
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/*
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* Driver for the Uninorth chip itself.
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*/
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static MALLOC_DEFINE(M_UNIN, "unin", "unin device information");
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/*
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* Device interface.
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*/
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static int unin_chip_probe(device_t);
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static int unin_chip_attach(device_t);
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/*
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* Bus interface.
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*/
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static int unin_chip_print_child(device_t dev, device_t child);
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static void unin_chip_probe_nomatch(device_t, device_t);
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static struct rman *unin_chip_get_rman(device_t, int, u_int);
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static struct resource *unin_chip_alloc_resource(device_t, device_t, int, int *,
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rman_res_t, rman_res_t,
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rman_res_t, u_int);
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static int unin_chip_adjust_resource(device_t, device_t,
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struct resource *, rman_res_t,
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rman_res_t);
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static int unin_chip_activate_resource(device_t, device_t,
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struct resource *);
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static int unin_chip_deactivate_resource(device_t, device_t,
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struct resource *);
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static int unin_chip_map_resource(device_t, device_t, struct resource *,
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struct resource_map_request *,
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struct resource_map *);
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static int unin_chip_unmap_resource(device_t, device_t, struct resource *,
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struct resource_map *);
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static int unin_chip_release_resource(device_t, device_t, struct resource *);
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static struct resource_list *unin_chip_get_resource_list (device_t, device_t);
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/*
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* OFW Bus interface
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*/
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static ofw_bus_get_devinfo_t unin_chip_get_devinfo;
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/*
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* Local routines
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*/
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static void unin_enable_gmac(device_t dev);
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static void unin_enable_mpic(device_t dev);
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/*
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* Driver methods.
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*/
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static device_method_t unin_chip_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, unin_chip_probe),
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DEVMETHOD(device_attach, unin_chip_attach),
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/* Bus interface */
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DEVMETHOD(bus_print_child, unin_chip_print_child),
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DEVMETHOD(bus_probe_nomatch, unin_chip_probe_nomatch),
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DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
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DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
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DEVMETHOD(bus_get_rman, unin_chip_get_rman),
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DEVMETHOD(bus_alloc_resource, unin_chip_alloc_resource),
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DEVMETHOD(bus_adjust_resource, unin_chip_adjust_resource),
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DEVMETHOD(bus_release_resource, unin_chip_release_resource),
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DEVMETHOD(bus_activate_resource, unin_chip_activate_resource),
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DEVMETHOD(bus_deactivate_resource, unin_chip_deactivate_resource),
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DEVMETHOD(bus_map_resource, unin_chip_map_resource),
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DEVMETHOD(bus_unmap_resource, unin_chip_unmap_resource),
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DEVMETHOD(bus_get_resource_list, unin_chip_get_resource_list),
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DEVMETHOD(bus_child_pnpinfo, ofw_bus_gen_child_pnpinfo),
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/* ofw_bus interface */
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DEVMETHOD(ofw_bus_get_devinfo, unin_chip_get_devinfo),
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DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat),
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DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model),
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DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name),
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DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node),
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DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type),
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{ 0, 0 }
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};
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static driver_t unin_chip_driver = {
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"unin",
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unin_chip_methods,
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sizeof(struct unin_chip_softc)
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};
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/*
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* Assume there is only one unin chip in a PowerMac, so that pmu.c functions can
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* suspend the chip after the whole rest of the device tree is suspended, not
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* earlier.
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*/
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static device_t unin_chip;
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EARLY_DRIVER_MODULE(unin, ofwbus, unin_chip_driver, 0, 0, BUS_PASS_BUS);
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/*
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* Add an interrupt to the dev's resource list if present
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*/
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static void
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unin_chip_add_intr(phandle_t devnode, struct unin_chip_devinfo *dinfo)
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{
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phandle_t iparent;
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int *intr;
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int i, nintr;
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int icells;
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if (dinfo->udi_ninterrupts >= 6) {
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printf("unin: device has more than 6 interrupts\n");
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return;
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}
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nintr = OF_getprop_alloc_multi(devnode, "interrupts", sizeof(*intr),
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(void **)&intr);
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if (nintr == -1) {
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nintr = OF_getprop_alloc_multi(devnode, "AAPL,interrupts",
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sizeof(*intr), (void **)&intr);
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if (nintr == -1)
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return;
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}
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if (intr[0] == -1)
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return;
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if (OF_getprop(devnode, "interrupt-parent", &iparent, sizeof(iparent))
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<= 0)
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panic("Interrupt but no interrupt parent!\n");
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if (OF_searchprop(iparent, "#interrupt-cells", &icells, sizeof(icells))
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<= 0)
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icells = 1;
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for (i = 0; i < nintr; i+=icells) {
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u_int irq = MAP_IRQ(iparent, intr[i]);
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resource_list_add(&dinfo->udi_resources, SYS_RES_IRQ,
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dinfo->udi_ninterrupts, irq, irq, 1);
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if (icells > 1) {
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powerpc_config_intr(irq,
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(intr[i+1] & 1) ? INTR_TRIGGER_LEVEL :
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INTR_TRIGGER_EDGE, INTR_POLARITY_LOW);
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}
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dinfo->udi_interrupts[dinfo->udi_ninterrupts] = irq;
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dinfo->udi_ninterrupts++;
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}
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}
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static void
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unin_chip_add_reg(phandle_t devnode, struct unin_chip_devinfo *dinfo)
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{
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struct unin_chip_reg *reg;
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int i, nreg;
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nreg = OF_getprop_alloc_multi(devnode, "reg", sizeof(*reg), (void **)®);
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if (nreg == -1)
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return;
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for (i = 0; i < nreg; i++) {
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resource_list_add(&dinfo->udi_resources, SYS_RES_MEMORY, i,
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reg[i].mr_base,
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reg[i].mr_base + reg[i].mr_size,
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reg[i].mr_size);
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}
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}
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static void
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unin_update_reg(device_t dev, uint32_t regoff, uint32_t set, uint32_t clr)
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{
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volatile u_int *reg;
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struct unin_chip_softc *sc;
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u_int32_t tmpl;
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sc = device_get_softc(dev);
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reg = (void *)(sc->sc_addr + regoff);
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tmpl = inl(reg);
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tmpl &= ~clr;
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tmpl |= set;
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outl(reg, tmpl);
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}
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static void
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unin_enable_gmac(device_t dev)
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{
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unin_update_reg(dev, UNIN_CLOCKCNTL, UNIN_CLOCKCNTL_GMAC, 0);
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}
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static void
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unin_enable_mpic(device_t dev)
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{
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unin_update_reg(dev, UNIN_TOGGLE_REG, UNIN_MPIC_RESET | UNIN_MPIC_OUTPUT_ENABLE, 0);
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}
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static int
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unin_chip_probe(device_t dev)
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{
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const char *name;
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name = ofw_bus_get_name(dev);
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if (name == NULL)
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return (ENXIO);
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if (strcmp(name, "uni-n") != 0 && strcmp(name, "u3") != 0
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&& strcmp(name, "u4") != 0)
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return (ENXIO);
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device_set_desc(dev, "Apple UniNorth System Controller");
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return (0);
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}
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static int
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unin_chip_attach(device_t dev)
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{
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struct unin_chip_softc *sc;
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struct unin_chip_devinfo *dinfo;
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phandle_t root;
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phandle_t child;
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phandle_t iparent;
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device_t cdev;
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cell_t acells, scells;
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char compat[32];
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char name[32];
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u_int irq, reg[3];
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int error, i = 0;
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sc = device_get_softc(dev);
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root = ofw_bus_get_node(dev);
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if (OF_getprop(root, "reg", reg, sizeof(reg)) < 8)
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return (ENXIO);
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acells = scells = 1;
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OF_getprop(OF_parent(root), "#address-cells", &acells, sizeof(acells));
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OF_getprop(OF_parent(root), "#size-cells", &scells, sizeof(scells));
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i = 0;
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sc->sc_physaddr = reg[i++];
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if (acells == 2) {
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sc->sc_physaddr <<= 32;
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sc->sc_physaddr |= reg[i++];
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}
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sc->sc_size = reg[i++];
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if (scells == 2) {
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sc->sc_size <<= 32;
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sc->sc_size |= reg[i++];
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}
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sc->sc_mem_rman.rm_type = RMAN_ARRAY;
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sc->sc_mem_rman.rm_descr = "UniNorth Device Memory";
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error = rman_init(&sc->sc_mem_rman);
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if (error) {
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device_printf(dev, "rman_init() failed. error = %d\n", error);
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return (error);
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}
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error = rman_manage_region(&sc->sc_mem_rman, sc->sc_physaddr,
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sc->sc_physaddr + sc->sc_size - 1);
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if (error) {
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device_printf(dev,
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"rman_manage_region() failed. error = %d\n",
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error);
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return (error);
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}
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if (unin_chip == NULL)
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unin_chip = dev;
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/*
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* Iterate through the sub-devices
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*/
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for (child = OF_child(root); child != 0; child = OF_peer(child)) {
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dinfo = malloc(sizeof(*dinfo), M_UNIN, M_WAITOK | M_ZERO);
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if (ofw_bus_gen_setup_devinfo(&dinfo->udi_obdinfo, child)
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!= 0)
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{
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free(dinfo, M_UNIN);
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continue;
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}
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resource_list_init(&dinfo->udi_resources);
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dinfo->udi_ninterrupts = 0;
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unin_chip_add_intr(child, dinfo);
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/*
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* Some Apple machines do have a bug in OF, they miss
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* the interrupt entries on the U3 I2C node. That means they
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* do not have an entry with number of interrupts nor the
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* entry of the interrupt parent handle.
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* We define an interrupt and hardwire it to the /u3/mpic
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* handle.
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*/
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if (OF_getprop(child, "name", name, sizeof(name)) <= 0)
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device_printf(dev, "device has no name!\n");
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if (dinfo->udi_ninterrupts == 0 &&
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(strcmp(name, "i2c-bus") == 0 ||
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strcmp(name, "i2c") == 0)) {
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if (OF_getprop(child, "interrupt-parent", &iparent,
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sizeof(iparent)) <= 0) {
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iparent = OF_finddevice("/u3/mpic");
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device_printf(dev, "Set /u3/mpic as iparent!\n");
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}
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/* Add an interrupt number 0 to the parent. */
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irq = MAP_IRQ(iparent, 0);
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resource_list_add(&dinfo->udi_resources, SYS_RES_IRQ,
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dinfo->udi_ninterrupts, irq, irq, 1);
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dinfo->udi_interrupts[dinfo->udi_ninterrupts] = irq;
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dinfo->udi_ninterrupts++;
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}
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unin_chip_add_reg(child, dinfo);
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cdev = device_add_child(dev, NULL, DEVICE_UNIT_ANY);
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if (cdev == NULL) {
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device_printf(dev, "<%s>: device_add_child failed\n",
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dinfo->udi_obdinfo.obd_name);
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resource_list_free(&dinfo->udi_resources);
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ofw_bus_gen_destroy_devinfo(&dinfo->udi_obdinfo);
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free(dinfo, M_UNIN);
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continue;
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}
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device_set_ivars(cdev, dinfo);
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}
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/*
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* Only map the first page, since that is where the registers
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* of interest lie.
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*/
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sc->sc_addr = (vm_offset_t)pmap_mapdev(sc->sc_physaddr, PAGE_SIZE);
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sc->sc_version = *(u_int *)sc->sc_addr;
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device_printf(dev, "Version %d\n", sc->sc_version);
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/*
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* Enable the GMAC Ethernet cell and the integrated OpenPIC
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* if Open Firmware says they are used.
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*/
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for (child = OF_child(root); child; child = OF_peer(child)) {
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memset(compat, 0, sizeof(compat));
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OF_getprop(child, "compatible", compat, sizeof(compat));
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if (strcmp(compat, "gmac") == 0)
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unin_enable_gmac(dev);
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if (strcmp(compat, "chrp,open-pic") == 0)
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unin_enable_mpic(dev);
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}
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/*
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* GMAC lives under the PCI bus, so just check if enet is gmac.
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*/
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child = OF_finddevice("enet");
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memset(compat, 0, sizeof(compat));
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OF_getprop(child, "compatible", compat, sizeof(compat));
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if (strcmp(compat, "gmac") == 0)
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unin_enable_gmac(dev);
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return (bus_generic_attach(dev));
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}
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static int
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unin_chip_print_child(device_t dev, device_t child)
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{
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struct unin_chip_devinfo *dinfo;
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struct resource_list *rl;
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int retval = 0;
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dinfo = device_get_ivars(child);
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rl = &dinfo->udi_resources;
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retval += bus_print_child_header(dev, child);
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retval += resource_list_print_type(rl, "mem", SYS_RES_MEMORY, "%#jx");
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retval += resource_list_print_type(rl, "irq", SYS_RES_IRQ, "%jd");
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retval += bus_print_child_footer(dev, child);
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return (retval);
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}
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static void
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unin_chip_probe_nomatch(device_t dev, device_t child)
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{
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struct unin_chip_devinfo *dinfo;
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struct resource_list *rl;
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const char *type;
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if (bootverbose) {
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dinfo = device_get_ivars(child);
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rl = &dinfo->udi_resources;
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if ((type = ofw_bus_get_type(child)) == NULL)
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type = "(unknown)";
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device_printf(dev, "<%s, %s>", type, ofw_bus_get_name(child));
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resource_list_print_type(rl, "mem", SYS_RES_MEMORY, "%#jx");
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resource_list_print_type(rl, "irq", SYS_RES_IRQ, "%jd");
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printf(" (no driver attached)\n");
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}
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}
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|
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static struct rman *
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unin_chip_get_rman(device_t bus, int type, u_int flags)
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{
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struct unin_chip_softc *sc;
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sc = device_get_softc(bus);
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switch (type) {
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case SYS_RES_MEMORY:
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case SYS_RES_IOPORT:
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return (&sc->sc_mem_rman);
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default:
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return (NULL);
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}
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}
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|
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static struct resource *
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unin_chip_alloc_resource(device_t bus, device_t child, int type, int *rid,
|
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rman_res_t start, rman_res_t end, rman_res_t count,
|
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u_int flags)
|
|
{
|
|
rman_res_t adjstart, adjend, adjcount;
|
|
struct unin_chip_devinfo *dinfo;
|
|
struct resource_list_entry *rle;
|
|
|
|
dinfo = device_get_ivars(child);
|
|
|
|
switch (type) {
|
|
case SYS_RES_MEMORY:
|
|
case SYS_RES_IOPORT:
|
|
rle = resource_list_find(&dinfo->udi_resources, SYS_RES_MEMORY,
|
|
*rid);
|
|
if (rle == NULL) {
|
|
device_printf(bus, "no rle for %s memory %d\n",
|
|
device_get_nameunit(child), *rid);
|
|
return (NULL);
|
|
}
|
|
|
|
rle->end = rle->end - 1; /* Hack? */
|
|
|
|
if (start < rle->start)
|
|
adjstart = rle->start;
|
|
else if (start > rle->end)
|
|
adjstart = rle->end;
|
|
else
|
|
adjstart = start;
|
|
|
|
if (end < rle->start)
|
|
adjend = rle->start;
|
|
else if (end > rle->end)
|
|
adjend = rle->end;
|
|
else
|
|
adjend = end;
|
|
|
|
adjcount = adjend - adjstart;
|
|
|
|
return (bus_generic_rman_alloc_resource(bus, child,
|
|
SYS_RES_MEMORY, rid, adjstart, adjend, adjcount, flags));
|
|
case SYS_RES_IRQ:
|
|
/* Check for passthrough from subattachments. */
|
|
if (device_get_parent(child) != bus)
|
|
return BUS_ALLOC_RESOURCE(device_get_parent(bus), child,
|
|
type, rid, start, end, count,
|
|
flags);
|
|
|
|
rle = resource_list_find(&dinfo->udi_resources, SYS_RES_IRQ,
|
|
*rid);
|
|
if (rle == NULL) {
|
|
if (dinfo->udi_ninterrupts >= 6) {
|
|
device_printf(bus,
|
|
"%s has more than 6 interrupts\n",
|
|
device_get_nameunit(child));
|
|
return (NULL);
|
|
}
|
|
resource_list_add(&dinfo->udi_resources, SYS_RES_IRQ,
|
|
dinfo->udi_ninterrupts, start, start,
|
|
1);
|
|
|
|
dinfo->udi_interrupts[dinfo->udi_ninterrupts] = start;
|
|
dinfo->udi_ninterrupts++;
|
|
}
|
|
|
|
return (resource_list_alloc(&dinfo->udi_resources, bus, child,
|
|
type, rid, start, end, count,
|
|
flags));
|
|
default:
|
|
device_printf(bus, "unknown resource request from %s\n",
|
|
device_get_nameunit(child));
|
|
return (NULL);
|
|
}
|
|
}
|
|
|
|
static int
|
|
unin_chip_adjust_resource(device_t bus, device_t child, struct resource *r,
|
|
rman_res_t start, rman_res_t end)
|
|
{
|
|
switch (rman_get_type(r)) {
|
|
case SYS_RES_IOPORT:
|
|
case SYS_RES_MEMORY:
|
|
return (bus_generic_rman_adjust_resource(bus, child, r, start,
|
|
end));
|
|
case SYS_RES_IRQ:
|
|
return (bus_generic_adjust_resource(bus, child, r, start, end));
|
|
default:
|
|
return (EINVAL);
|
|
}
|
|
}
|
|
|
|
static int
|
|
unin_chip_release_resource(device_t bus, device_t child, struct resource *res)
|
|
{
|
|
switch (rman_get_type(res)) {
|
|
case SYS_RES_IOPORT:
|
|
case SYS_RES_MEMORY:
|
|
return (bus_generic_rman_release_resource(bus, child, res));
|
|
case SYS_RES_IRQ:
|
|
return (bus_generic_rl_release_resource(bus, child, res));
|
|
default:
|
|
return (EINVAL);
|
|
}
|
|
}
|
|
|
|
static int
|
|
unin_chip_activate_resource(device_t bus, device_t child, struct resource *res)
|
|
{
|
|
switch (rman_get_type(res)) {
|
|
case SYS_RES_IOPORT:
|
|
case SYS_RES_MEMORY:
|
|
return (bus_generic_rman_activate_resource(bus, child, res));
|
|
case SYS_RES_IRQ:
|
|
return (bus_generic_activate_resource(bus, child, res));
|
|
default:
|
|
return (EINVAL);
|
|
}
|
|
}
|
|
|
|
static int
|
|
unin_chip_deactivate_resource(device_t bus, device_t child,
|
|
struct resource *res)
|
|
{
|
|
switch (rman_get_type(res)) {
|
|
case SYS_RES_IOPORT:
|
|
case SYS_RES_MEMORY:
|
|
return (bus_generic_rman_deactivate_resource(bus, child, res));
|
|
case SYS_RES_IRQ:
|
|
return (bus_generic_deactivate_resource(bus, child, res));
|
|
default:
|
|
return (EINVAL);
|
|
}
|
|
}
|
|
|
|
static int
|
|
unin_chip_map_resource(device_t bus, device_t child, struct resource *r,
|
|
struct resource_map_request *argsp, struct resource_map *map)
|
|
{
|
|
struct resource_map_request args;
|
|
rman_res_t length, start;
|
|
int error;
|
|
|
|
/* Resources must be active to be mapped. */
|
|
if (!(rman_get_flags(r) & RF_ACTIVE))
|
|
return (ENXIO);
|
|
|
|
/* Mappings are only supported on I/O and memory resources. */
|
|
switch (rman_get_type(r)) {
|
|
case SYS_RES_IOPORT:
|
|
case SYS_RES_MEMORY:
|
|
break;
|
|
default:
|
|
return (EINVAL);
|
|
}
|
|
|
|
resource_init_map_request(&args);
|
|
error = resource_validate_map_request(r, argsp, &args, &start, &length);
|
|
if (error)
|
|
return (error);
|
|
|
|
if (bootverbose)
|
|
printf("nexus mapdev: start %jx, len %jd\n",
|
|
(uintmax_t)start, (uintmax_t)length);
|
|
|
|
map->r_vaddr = pmap_mapdev_attr(start, length, args.memattr);
|
|
if (map->r_vaddr == NULL)
|
|
return (ENOMEM);
|
|
map->r_bustag = &bs_be_tag;
|
|
map->r_size = length;
|
|
map->r_bushandle = (bus_space_handle_t)map->r_vaddr;
|
|
return (0);
|
|
}
|
|
|
|
static int
|
|
unin_chip_unmap_resource(device_t bus, device_t child, struct resource *r,
|
|
struct resource_map *map)
|
|
{
|
|
/*
|
|
* If this is a memory resource, unmap it.
|
|
*/
|
|
switch (rman_get_type(r)) {
|
|
case SYS_RES_IOPORT:
|
|
case SYS_RES_MEMORY:
|
|
pmap_unmapdev(map->r_vaddr, map->r_size);
|
|
break;
|
|
default:
|
|
return (EINVAL);
|
|
}
|
|
return (0);
|
|
}
|
|
|
|
static struct resource_list *
|
|
unin_chip_get_resource_list (device_t dev, device_t child)
|
|
{
|
|
struct unin_chip_devinfo *dinfo;
|
|
|
|
dinfo = device_get_ivars(child);
|
|
return (&dinfo->udi_resources);
|
|
}
|
|
|
|
static const struct ofw_bus_devinfo *
|
|
unin_chip_get_devinfo(device_t dev, device_t child)
|
|
{
|
|
struct unin_chip_devinfo *dinfo;
|
|
|
|
dinfo = device_get_ivars(child);
|
|
return (&dinfo->udi_obdinfo);
|
|
}
|
|
|
|
int
|
|
unin_chip_wake(device_t dev)
|
|
{
|
|
|
|
if (dev == NULL)
|
|
dev = unin_chip;
|
|
unin_update_reg(dev, UNIN_PWR_MGMT, UNIN_PWR_NORMAL, UNIN_PWR_MASK);
|
|
DELAY(10);
|
|
unin_update_reg(dev, UNIN_HWINIT_STATE, UNIN_RUNNING, 0);
|
|
DELAY(100);
|
|
|
|
return (0);
|
|
}
|
|
|
|
int
|
|
unin_chip_sleep(device_t dev, int idle)
|
|
{
|
|
if (dev == NULL)
|
|
dev = unin_chip;
|
|
|
|
unin_update_reg(dev, UNIN_HWINIT_STATE, UNIN_SLEEPING, 0);
|
|
DELAY(10);
|
|
if (idle)
|
|
unin_update_reg(dev, UNIN_PWR_MGMT, UNIN_PWR_IDLE2, UNIN_PWR_MASK);
|
|
else
|
|
unin_update_reg(dev, UNIN_PWR_MGMT, UNIN_PWR_SLEEP, UNIN_PWR_MASK);
|
|
DELAY(10);
|
|
|
|
return (0);
|
|
}
|