mirror of
https://git.hardenedbsd.org/hardenedbsd/HardenedBSD.git
synced 2024-11-22 11:14:18 +01:00
4f86b13696
Conflicts: sys/amd64/amd64/elf_machdep.c (unresolved) sys/amd64/sgx/sgx.c (deleted) sys/amd64/sgx/sgx_linux.c (deleted) sys/arm/arm/elf_machdep.c (unresolved) sys/arm64/arm64/elf_machdep.c (unresolved) sys/kern/imgact_aout.c (deleted) sys/kern/kern_environment.c (unresolved) sys/kern/kern_module.c (unresolved) sys/kern/kern_priv.c (unresolved) sys/kern/kern_procctl.c (unresolved) sys/kern/kern_resource.c (unresolved) sys/kern/sys_process.c (unresolved) sys/netlink/netlink_message_writer.c (unresolved) sys/riscv/riscv/elf_machdep.c (unresolved) sys/vm/vm_map.c (unresolved)
1004 lines
26 KiB
C
1004 lines
26 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright 2013 Nathan Whitehorn
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/malloc.h>
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#include <sys/module.h>
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#include <sys/selinfo.h>
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#include <sys/bus.h>
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#include <sys/conf.h>
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#include <sys/eventhandler.h>
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#include <sys/rman.h>
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#include <sys/bus_dma.h>
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#include <sys/bio.h>
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#include <sys/ioccom.h>
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#include <sys/uio.h>
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#include <sys/proc.h>
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#include <sys/signalvar.h>
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#include <sys/sysctl.h>
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#include <sys/endian.h>
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#include <sys/vmem.h>
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#include <cam/cam.h>
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#include <cam/cam_ccb.h>
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#include <cam/cam_debug.h>
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#include <cam/cam_periph.h>
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#include <cam/cam_sim.h>
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#include <cam/cam_xpt_periph.h>
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#include <cam/cam_xpt_sim.h>
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#include <cam/scsi/scsi_all.h>
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#include <cam/scsi/scsi_message.h>
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#include <dev/ofw/openfirm.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <machine/bus.h>
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#include <machine/resource.h>
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#include <powerpc/pseries/phyp-hvcall.h>
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struct vscsi_softc;
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/* VSCSI CRQ format from table 260 of PAPR spec 2.4 (page 760) */
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struct vscsi_crq {
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uint8_t valid;
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uint8_t format;
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uint8_t reserved;
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uint8_t status;
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uint16_t timeout;
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uint16_t iu_length;
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uint64_t iu_data;
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};
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struct vscsi_xfer {
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TAILQ_ENTRY(vscsi_xfer) queue;
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struct vscsi_softc *sc;
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union ccb *ccb;
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bus_dmamap_t dmamap;
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uint64_t tag;
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vmem_addr_t srp_iu_offset;
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vmem_size_t srp_iu_size;
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};
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TAILQ_HEAD(vscsi_xferq, vscsi_xfer);
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struct vscsi_softc {
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device_t dev;
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struct cam_devq *devq;
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struct cam_sim *sim;
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struct cam_path *path;
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struct mtx io_lock;
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cell_t unit;
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int bus_initialized;
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int bus_logged_in;
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int max_transactions;
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int irqid;
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struct resource *irq;
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void *irq_cookie;
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bus_dma_tag_t crq_tag;
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struct vscsi_crq *crq_queue;
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int n_crqs, cur_crq;
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bus_dmamap_t crq_map;
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bus_addr_t crq_phys;
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vmem_t *srp_iu_arena;
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void *srp_iu_queue;
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bus_addr_t srp_iu_phys;
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bus_dma_tag_t data_tag;
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struct vscsi_xfer loginxp;
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struct vscsi_xfer *xfer;
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struct vscsi_xferq active_xferq;
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struct vscsi_xferq free_xferq;
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};
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struct srp_login {
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uint8_t type;
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uint8_t reserved[7];
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uint64_t tag;
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uint64_t max_cmd_length;
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uint32_t reserved2;
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uint16_t buffer_formats;
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uint8_t flags;
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uint8_t reserved3[5];
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uint8_t initiator_port_id[16];
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uint8_t target_port_id[16];
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} __packed;
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struct srp_login_rsp {
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uint8_t type;
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uint8_t reserved[3];
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uint32_t request_limit_delta;
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uint8_t tag;
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uint32_t max_i_to_t_len;
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uint32_t max_t_to_i_len;
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uint16_t buffer_formats;
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uint8_t flags;
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/* Some reserved bits follow */
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} __packed;
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struct srp_cmd {
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uint8_t type;
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uint8_t flags1;
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uint8_t reserved[3];
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uint8_t formats;
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uint8_t out_buffer_count;
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uint8_t in_buffer_count;
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uint64_t tag;
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uint32_t reserved2;
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uint64_t lun;
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uint8_t reserved3[3];
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uint8_t additional_cdb;
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uint8_t cdb[16];
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uint8_t data_payload[0];
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} __packed;
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struct srp_rsp {
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uint8_t type;
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uint8_t reserved[3];
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uint32_t request_limit_delta;
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uint64_t tag;
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uint16_t reserved2;
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uint8_t flags;
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uint8_t status;
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uint32_t data_out_resid;
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uint32_t data_in_resid;
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uint32_t sense_data_len;
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uint32_t response_data_len;
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uint8_t data_payload[0];
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} __packed;
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struct srp_tsk_mgmt {
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uint8_t type;
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uint8_t reserved[7];
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uint64_t tag;
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uint32_t reserved2;
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uint64_t lun;
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uint8_t reserved3[2];
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uint8_t function;
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uint8_t reserved4;
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uint64_t manage_tag;
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uint64_t reserved5;
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} __packed;
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/* Message code type */
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#define SRP_LOGIN_REQ 0x00
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#define SRP_TSK_MGMT 0x01
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#define SRP_CMD 0x02
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#define SRP_I_LOGOUT 0x03
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#define SRP_LOGIN_RSP 0xC0
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#define SRP_RSP 0xC1
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#define SRP_LOGIN_REJ 0xC2
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#define SRP_T_LOGOUT 0x80
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#define SRP_CRED_REQ 0x81
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#define SRP_AER_REQ 0x82
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#define SRP_CRED_RSP 0x41
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#define SRP_AER_RSP 0x41
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/* Flags for srp_rsp flags field */
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#define SRP_RSPVALID 0x01
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#define SRP_SNSVALID 0x02
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#define SRP_DOOVER 0x04
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#define SRP_DOUNDER 0x08
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#define SRP_DIOVER 0x10
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#define SRP_DIUNDER 0x20
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#define MAD_SUCESS 0x00
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#define MAD_NOT_SUPPORTED 0xf1
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#define MAD_FAILED 0xf7
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#define MAD_EMPTY_IU 0x01
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#define MAD_ERROR_LOGGING_REQUEST 0x02
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#define MAD_ADAPTER_INFO_REQUEST 0x03
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#define MAD_CAPABILITIES_EXCHANGE 0x05
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#define MAD_PHYS_ADAP_INFO_REQUEST 0x06
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#define MAD_TAPE_PASSTHROUGH_REQUEST 0x07
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#define MAD_ENABLE_FAST_FAIL 0x08
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static int vscsi_probe(device_t);
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static int vscsi_attach(device_t);
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static int vscsi_detach(device_t);
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static void vscsi_cam_action(struct cam_sim *, union ccb *);
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static void vscsi_cam_poll(struct cam_sim *);
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static void vscsi_intr(void *arg);
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static void vscsi_check_response_queue(struct vscsi_softc *sc);
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static void vscsi_setup_bus(struct vscsi_softc *sc);
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static void vscsi_srp_login(struct vscsi_softc *sc);
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static void vscsi_crq_load_cb(void *, bus_dma_segment_t *, int, int);
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static void vscsi_scsi_command(void *xxp, bus_dma_segment_t *segs,
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int nsegs, int err);
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static void vscsi_task_management(struct vscsi_softc *sc, union ccb *ccb);
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static void vscsi_srp_response(struct vscsi_xfer *, struct vscsi_crq *);
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static device_method_t vscsi_methods[] = {
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DEVMETHOD(device_probe, vscsi_probe),
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DEVMETHOD(device_attach, vscsi_attach),
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DEVMETHOD(device_detach, vscsi_detach),
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DEVMETHOD_END
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};
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static driver_t vscsi_driver = {
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"vscsi",
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vscsi_methods,
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sizeof(struct vscsi_softc)
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};
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DRIVER_MODULE(vscsi, vdevice, vscsi_driver, 0, 0);
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MALLOC_DEFINE(M_VSCSI, "vscsi", "CAM device queue for VSCSI");
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static int
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vscsi_probe(device_t dev)
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{
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if (!ofw_bus_is_compatible(dev, "IBM,v-scsi"))
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return (ENXIO);
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device_set_desc(dev, "POWER Hypervisor Virtual SCSI Bus");
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return (0);
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}
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static int
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vscsi_attach(device_t dev)
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{
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struct vscsi_softc *sc;
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struct vscsi_xfer *xp;
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int error, i;
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sc = device_get_softc(dev);
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if (sc == NULL)
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return (EINVAL);
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sc->dev = dev;
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mtx_init(&sc->io_lock, "vscsi", NULL, MTX_DEF);
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/* Get properties */
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OF_getencprop(ofw_bus_get_node(dev), "reg", &sc->unit,
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sizeof(sc->unit));
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/* Setup interrupt */
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sc->irqid = 0;
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sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->irqid,
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RF_ACTIVE);
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if (!sc->irq) {
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device_printf(dev, "Could not allocate IRQ\n");
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mtx_destroy(&sc->io_lock);
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return (ENXIO);
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}
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bus_setup_intr(dev, sc->irq, INTR_TYPE_CAM | INTR_MPSAFE |
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INTR_ENTROPY, NULL, vscsi_intr, sc, &sc->irq_cookie);
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/* Data DMA */
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error = bus_dma_tag_create(bus_get_dma_tag(dev), 1, 0,
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BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, NULL, BUS_SPACE_MAXSIZE,
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256, BUS_SPACE_MAXSIZE_32BIT, 0, busdma_lock_mutex, &sc->io_lock,
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&sc->data_tag);
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TAILQ_INIT(&sc->active_xferq);
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TAILQ_INIT(&sc->free_xferq);
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/* First XFER for login data */
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sc->loginxp.sc = sc;
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bus_dmamap_create(sc->data_tag, 0, &sc->loginxp.dmamap);
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TAILQ_INSERT_TAIL(&sc->free_xferq, &sc->loginxp, queue);
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/* CRQ area */
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error = bus_dma_tag_create(bus_get_dma_tag(dev), PAGE_SIZE, 0,
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BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, NULL, 8*PAGE_SIZE,
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1, BUS_SPACE_MAXSIZE, 0, NULL, NULL, &sc->crq_tag);
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error = bus_dmamem_alloc(sc->crq_tag, (void **)&sc->crq_queue,
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BUS_DMA_WAITOK | BUS_DMA_ZERO, &sc->crq_map);
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sc->crq_phys = 0;
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sc->n_crqs = 0;
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error = bus_dmamap_load(sc->crq_tag, sc->crq_map, sc->crq_queue,
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8*PAGE_SIZE, vscsi_crq_load_cb, sc, 0);
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mtx_lock(&sc->io_lock);
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vscsi_setup_bus(sc);
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sc->xfer = malloc(sizeof(sc->xfer[0])*sc->max_transactions, M_VSCSI,
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M_NOWAIT);
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if (sc->xfer == NULL) {
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device_printf(dev, "Could not allocate buffer\n");
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return (ENOMEM)
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}
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for (i = 0; i < sc->max_transactions; i++) {
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xp = &sc->xfer[i];
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xp->sc = sc;
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error = bus_dmamap_create(sc->data_tag, 0, &xp->dmamap);
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if (error) {
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device_printf(dev, "Could not create DMA map (%d)\n",
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error);
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break;
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}
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TAILQ_INSERT_TAIL(&sc->free_xferq, xp, queue);
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}
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mtx_unlock(&sc->io_lock);
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/* Allocate CAM bits */
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if ((sc->devq = cam_simq_alloc(sc->max_transactions)) == NULL)
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return (ENOMEM);
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sc->sim = cam_sim_alloc(vscsi_cam_action, vscsi_cam_poll, "vscsi", sc,
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device_get_unit(dev), &sc->io_lock,
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sc->max_transactions, sc->max_transactions,
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sc->devq);
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if (sc->sim == NULL) {
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cam_simq_free(sc->devq);
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sc->devq = NULL;
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device_printf(dev, "CAM SIM attach failed\n");
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return (EINVAL);
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}
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mtx_lock(&sc->io_lock);
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if (xpt_bus_register(sc->sim, dev, 0) != 0) {
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device_printf(dev, "XPT bus registration failed\n");
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cam_sim_free(sc->sim, FALSE);
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sc->sim = NULL;
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cam_simq_free(sc->devq);
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sc->devq = NULL;
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mtx_unlock(&sc->io_lock);
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return (EINVAL);
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}
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mtx_unlock(&sc->io_lock);
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return (0);
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}
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static int
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vscsi_detach(device_t dev)
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{
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struct vscsi_softc *sc;
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sc = device_get_softc(dev);
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if (sc == NULL)
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return (EINVAL);
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if (sc->sim != NULL) {
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mtx_lock(&sc->io_lock);
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xpt_bus_deregister(cam_sim_path(sc->sim));
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cam_sim_free(sc->sim, FALSE);
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sc->sim = NULL;
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mtx_unlock(&sc->io_lock);
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}
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if (sc->devq != NULL) {
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cam_simq_free(sc->devq);
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sc->devq = NULL;
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}
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mtx_destroy(&sc->io_lock);
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return (0);
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}
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static void
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vscsi_cam_action(struct cam_sim *sim, union ccb *ccb)
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{
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struct vscsi_softc *sc = cam_sim_softc(sim);
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mtx_assert(&sc->io_lock, MA_OWNED);
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switch (ccb->ccb_h.func_code) {
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case XPT_PATH_INQ:
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{
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struct ccb_pathinq *cpi = &ccb->cpi;
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cpi->version_num = 1;
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cpi->hba_inquiry = PI_TAG_ABLE;
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cpi->hba_misc = PIM_EXTLUNS;
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cpi->target_sprt = 0;
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cpi->hba_eng_cnt = 0;
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cpi->max_target = 0;
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cpi->max_lun = 0;
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cpi->initiator_id = ~0;
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strlcpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN);
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strlcpy(cpi->hba_vid, "IBM", HBA_IDLEN);
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strlcpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN);
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cpi->unit_number = cam_sim_unit(sim);
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cpi->bus_id = cam_sim_bus(sim);
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cpi->base_transfer_speed = 150000;
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cpi->transport = XPORT_SRP;
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cpi->transport_version = 0;
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cpi->protocol = PROTO_SCSI;
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cpi->protocol_version = SCSI_REV_SPC4;
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cpi->ccb_h.status = CAM_REQ_CMP;
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break;
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}
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case XPT_RESET_BUS:
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ccb->ccb_h.status = CAM_REQ_CMP;
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break;
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case XPT_RESET_DEV:
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ccb->ccb_h.status = CAM_REQ_INPROG;
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vscsi_task_management(sc, ccb);
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return;
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case XPT_GET_TRAN_SETTINGS:
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ccb->cts.protocol = PROTO_SCSI;
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ccb->cts.protocol_version = SCSI_REV_SPC4;
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ccb->cts.transport = XPORT_SRP;
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ccb->cts.transport_version = 0;
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ccb->cts.proto_specific.valid = 0;
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ccb->cts.xport_specific.valid = 0;
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ccb->ccb_h.status = CAM_REQ_CMP;
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break;
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case XPT_SET_TRAN_SETTINGS:
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ccb->ccb_h.status = CAM_FUNC_NOTAVAIL;
|
|
break;
|
|
case XPT_SCSI_IO:
|
|
{
|
|
struct vscsi_xfer *xp;
|
|
|
|
ccb->ccb_h.status = CAM_REQ_INPROG;
|
|
|
|
xp = TAILQ_FIRST(&sc->free_xferq);
|
|
if (xp == NULL)
|
|
panic("SCSI queue flooded");
|
|
xp->ccb = ccb;
|
|
TAILQ_REMOVE(&sc->free_xferq, xp, queue);
|
|
TAILQ_INSERT_TAIL(&sc->active_xferq, xp, queue);
|
|
bus_dmamap_load_ccb(sc->data_tag, xp->dmamap,
|
|
ccb, vscsi_scsi_command, xp, 0);
|
|
|
|
return;
|
|
}
|
|
default:
|
|
ccb->ccb_h.status = CAM_REQ_INVALID;
|
|
break;
|
|
}
|
|
|
|
xpt_done(ccb);
|
|
return;
|
|
}
|
|
|
|
static void
|
|
vscsi_srp_login(struct vscsi_softc *sc)
|
|
{
|
|
struct vscsi_xfer *xp;
|
|
struct srp_login *login;
|
|
struct vscsi_crq crq;
|
|
int err;
|
|
|
|
mtx_assert(&sc->io_lock, MA_OWNED);
|
|
|
|
xp = TAILQ_FIRST(&sc->free_xferq);
|
|
if (xp == NULL)
|
|
panic("SCSI queue flooded");
|
|
xp->ccb = NULL;
|
|
TAILQ_REMOVE(&sc->free_xferq, xp, queue);
|
|
TAILQ_INSERT_TAIL(&sc->active_xferq, xp, queue);
|
|
|
|
/* Set up command */
|
|
xp->srp_iu_size = 64;
|
|
crq.iu_length = htobe16(xp->srp_iu_size);
|
|
err = vmem_alloc(xp->sc->srp_iu_arena, xp->srp_iu_size,
|
|
M_BESTFIT | M_NOWAIT, &xp->srp_iu_offset);
|
|
if (err)
|
|
panic("Error during VMEM allocation (%d)", err);
|
|
|
|
login = (struct srp_login *)((uint8_t *)xp->sc->srp_iu_queue +
|
|
(uintptr_t)xp->srp_iu_offset);
|
|
bzero(login, xp->srp_iu_size);
|
|
login->type = SRP_LOGIN_REQ;
|
|
login->tag = (uint64_t)(xp);
|
|
login->max_cmd_length = htobe64(256);
|
|
login->buffer_formats = htobe16(0x1 | 0x2); /* Direct and indirect */
|
|
login->flags = 0;
|
|
|
|
/* Create CRQ entry */
|
|
crq.valid = 0x80;
|
|
crq.format = 0x01;
|
|
crq.iu_data = htobe64(xp->sc->srp_iu_phys + xp->srp_iu_offset);
|
|
bus_dmamap_sync(sc->crq_tag, sc->crq_map, BUS_DMASYNC_PREWRITE);
|
|
|
|
err = phyp_hcall(H_SEND_CRQ, xp->sc->unit,
|
|
be64toh(((uint64_t *)(&crq))[0]),
|
|
be64toh(((uint64_t *)(&crq))[1]));
|
|
if (err != 0)
|
|
panic("CRQ send failure (%d)", err);
|
|
}
|
|
|
|
static void
|
|
vscsi_task_management(struct vscsi_softc *sc, union ccb *ccb)
|
|
{
|
|
struct srp_tsk_mgmt *cmd;
|
|
struct vscsi_xfer *xp;
|
|
struct vscsi_crq crq;
|
|
int err;
|
|
|
|
mtx_assert(&sc->io_lock, MA_OWNED);
|
|
|
|
xp = TAILQ_FIRST(&sc->free_xferq);
|
|
if (xp == NULL)
|
|
panic("SCSI queue flooded");
|
|
xp->ccb = ccb;
|
|
TAILQ_REMOVE(&sc->free_xferq, xp, queue);
|
|
TAILQ_INSERT_TAIL(&sc->active_xferq, xp, queue);
|
|
|
|
xp->srp_iu_size = sizeof(*cmd);
|
|
crq.iu_length = htobe16(xp->srp_iu_size);
|
|
err = vmem_alloc(xp->sc->srp_iu_arena, xp->srp_iu_size,
|
|
M_BESTFIT | M_NOWAIT, &xp->srp_iu_offset);
|
|
if (err)
|
|
panic("Error during VMEM allocation (%d)", err);
|
|
|
|
cmd = (struct srp_tsk_mgmt *)((uint8_t *)xp->sc->srp_iu_queue +
|
|
(uintptr_t)xp->srp_iu_offset);
|
|
bzero(cmd, xp->srp_iu_size);
|
|
cmd->type = SRP_TSK_MGMT;
|
|
cmd->tag = (uint64_t)xp;
|
|
cmd->lun = htobe64(CAM_EXTLUN_BYTE_SWIZZLE(ccb->ccb_h.target_lun));
|
|
|
|
switch (ccb->ccb_h.func_code) {
|
|
case XPT_RESET_DEV:
|
|
cmd->function = 0x08;
|
|
break;
|
|
default:
|
|
panic("Unimplemented code %d", ccb->ccb_h.func_code);
|
|
break;
|
|
}
|
|
|
|
bus_dmamap_sync(xp->sc->crq_tag, xp->sc->crq_map, BUS_DMASYNC_PREWRITE);
|
|
|
|
/* Create CRQ entry */
|
|
crq.valid = 0x80;
|
|
crq.format = 0x01;
|
|
crq.iu_data = htobe64(xp->sc->srp_iu_phys + xp->srp_iu_offset);
|
|
|
|
err = phyp_hcall(H_SEND_CRQ, xp->sc->unit,
|
|
be64toh(((uint64_t *)(&crq))[0]),
|
|
be64toh(((uint64_t *)(&crq))[1]));
|
|
if (err != 0)
|
|
panic("CRQ send failure (%d)", err);
|
|
}
|
|
|
|
static void
|
|
vscsi_scsi_command(void *xxp, bus_dma_segment_t *segs, int nsegs, int err)
|
|
{
|
|
struct vscsi_xfer *xp = xxp;
|
|
uint8_t *cdb;
|
|
union ccb *ccb = xp->ccb;
|
|
struct srp_cmd *cmd;
|
|
uint64_t chunk_addr;
|
|
uint32_t chunk_size;
|
|
int desc_start, i;
|
|
struct vscsi_crq crq;
|
|
|
|
KASSERT(err == 0, ("DMA error %d\n", err));
|
|
|
|
mtx_assert(&xp->sc->io_lock, MA_OWNED);
|
|
|
|
cdb = (ccb->ccb_h.flags & CAM_CDB_POINTER) ?
|
|
ccb->csio.cdb_io.cdb_ptr : ccb->csio.cdb_io.cdb_bytes;
|
|
|
|
/* Command format from Table 20, page 37 of SRP spec */
|
|
xp->srp_iu_size = 48 + ((nsegs > 1) ? 20 : 16) +
|
|
((ccb->csio.cdb_len > 16) ? (ccb->csio.cdb_len - 16) : 0);
|
|
crq.iu_length = htobe16(xp->srp_iu_size);
|
|
if (nsegs > 1)
|
|
xp->srp_iu_size += nsegs*16;
|
|
xp->srp_iu_size = roundup(xp->srp_iu_size, 16);
|
|
err = vmem_alloc(xp->sc->srp_iu_arena, xp->srp_iu_size,
|
|
M_BESTFIT | M_NOWAIT, &xp->srp_iu_offset);
|
|
if (err)
|
|
panic("Error during VMEM allocation (%d)", err);
|
|
|
|
cmd = (struct srp_cmd *)((uint8_t *)xp->sc->srp_iu_queue +
|
|
(uintptr_t)xp->srp_iu_offset);
|
|
bzero(cmd, xp->srp_iu_size);
|
|
cmd->type = SRP_CMD;
|
|
if (ccb->csio.cdb_len > 16)
|
|
cmd->additional_cdb = (ccb->csio.cdb_len - 16) << 2;
|
|
memcpy(cmd->cdb, cdb, ccb->csio.cdb_len);
|
|
|
|
cmd->tag = (uint64_t)(xp); /* Let the responder find this again */
|
|
cmd->lun = htobe64(CAM_EXTLUN_BYTE_SWIZZLE(ccb->ccb_h.target_lun));
|
|
|
|
if (nsegs > 1) {
|
|
/* Use indirect descriptors */
|
|
switch (ccb->ccb_h.flags & CAM_DIR_MASK) {
|
|
case CAM_DIR_OUT:
|
|
cmd->formats = (2 << 4);
|
|
break;
|
|
case CAM_DIR_IN:
|
|
cmd->formats = 2;
|
|
break;
|
|
default:
|
|
panic("Does not support bidirectional commands (%d)",
|
|
ccb->ccb_h.flags & CAM_DIR_MASK);
|
|
break;
|
|
}
|
|
|
|
desc_start = ((ccb->csio.cdb_len > 16) ?
|
|
ccb->csio.cdb_len - 16 : 0);
|
|
chunk_addr = htobe64(xp->sc->srp_iu_phys + xp->srp_iu_offset + 20 +
|
|
desc_start + sizeof(*cmd));
|
|
chunk_size = htobe32(16*nsegs);
|
|
memcpy(&cmd->data_payload[desc_start], &chunk_addr, 8);
|
|
memcpy(&cmd->data_payload[desc_start+12], &chunk_size, 4);
|
|
chunk_size = 0;
|
|
for (i = 0; i < nsegs; i++)
|
|
chunk_size += segs[i].ds_len;
|
|
chunk_size = htobe32(chunk_size);
|
|
memcpy(&cmd->data_payload[desc_start+16], &chunk_size, 4);
|
|
desc_start += 20;
|
|
for (i = 0; i < nsegs; i++) {
|
|
chunk_addr = htobe64(segs[i].ds_addr);
|
|
chunk_size = htobe32(segs[i].ds_len);
|
|
|
|
memcpy(&cmd->data_payload[desc_start + 16*i],
|
|
&chunk_addr, 8);
|
|
/* Set handle tag to 0 */
|
|
memcpy(&cmd->data_payload[desc_start + 16*i + 12],
|
|
&chunk_size, 4);
|
|
}
|
|
} else if (nsegs == 1) {
|
|
switch (ccb->ccb_h.flags & CAM_DIR_MASK) {
|
|
case CAM_DIR_OUT:
|
|
cmd->formats = (1 << 4);
|
|
break;
|
|
case CAM_DIR_IN:
|
|
cmd->formats = 1;
|
|
break;
|
|
default:
|
|
panic("Does not support bidirectional commands (%d)",
|
|
ccb->ccb_h.flags & CAM_DIR_MASK);
|
|
break;
|
|
}
|
|
|
|
/*
|
|
* Memory descriptor:
|
|
* 8 byte address
|
|
* 4 byte handle
|
|
* 4 byte length
|
|
*/
|
|
|
|
chunk_addr = htobe64(segs[0].ds_addr);
|
|
chunk_size = htobe32(segs[0].ds_len);
|
|
desc_start = ((ccb->csio.cdb_len > 16) ?
|
|
ccb->csio.cdb_len - 16 : 0);
|
|
|
|
memcpy(&cmd->data_payload[desc_start], &chunk_addr, 8);
|
|
/* Set handle tag to 0 */
|
|
memcpy(&cmd->data_payload[desc_start+12], &chunk_size, 4);
|
|
KASSERT(xp->srp_iu_size >= 48 + ((ccb->csio.cdb_len > 16) ?
|
|
ccb->csio.cdb_len : 16), ("SRP IU command length"));
|
|
} else {
|
|
cmd->formats = 0;
|
|
}
|
|
bus_dmamap_sync(xp->sc->crq_tag, xp->sc->crq_map, BUS_DMASYNC_PREWRITE);
|
|
|
|
/* Create CRQ entry */
|
|
crq.valid = 0x80;
|
|
crq.format = 0x01;
|
|
crq.iu_data = htobe64(xp->sc->srp_iu_phys + xp->srp_iu_offset);
|
|
|
|
err = phyp_hcall(H_SEND_CRQ, xp->sc->unit,
|
|
be64toh(((uint64_t *)(&crq))[0]),
|
|
be64toh(((uint64_t *)(&crq))[1]));
|
|
if (err != 0)
|
|
panic("CRQ send failure (%d)", err);
|
|
}
|
|
|
|
static void
|
|
vscsi_crq_load_cb(void *xsc, bus_dma_segment_t *segs, int nsegs, int err)
|
|
{
|
|
struct vscsi_softc *sc = xsc;
|
|
|
|
sc->crq_phys = segs[0].ds_addr;
|
|
sc->n_crqs = PAGE_SIZE/sizeof(struct vscsi_crq);
|
|
|
|
sc->srp_iu_queue = (uint8_t *)(sc->crq_queue);
|
|
sc->srp_iu_phys = segs[0].ds_addr;
|
|
sc->srp_iu_arena = vmem_create("VSCSI SRP IU", PAGE_SIZE,
|
|
segs[0].ds_len - PAGE_SIZE, 16, 0, M_BESTFIT | M_NOWAIT);
|
|
}
|
|
|
|
static void
|
|
vscsi_setup_bus(struct vscsi_softc *sc)
|
|
{
|
|
struct vscsi_crq crq;
|
|
struct vscsi_xfer *xp;
|
|
int error;
|
|
|
|
struct {
|
|
uint32_t type;
|
|
uint16_t status;
|
|
uint16_t length;
|
|
uint64_t tag;
|
|
uint64_t buffer;
|
|
struct {
|
|
char srp_version[8];
|
|
char partition_name[96];
|
|
uint32_t partition_number;
|
|
uint32_t mad_version;
|
|
uint32_t os_type;
|
|
uint32_t port_max_txu[8];
|
|
} payload;
|
|
} mad_adapter_info;
|
|
|
|
bzero(&crq, sizeof(crq));
|
|
|
|
/* Init message */
|
|
crq.valid = 0xc0;
|
|
crq.format = 0x01;
|
|
|
|
do {
|
|
error = phyp_hcall(H_FREE_CRQ, sc->unit);
|
|
} while (error == H_BUSY);
|
|
|
|
/* See initialization sequence page 757 */
|
|
bzero(sc->crq_queue, sc->n_crqs*sizeof(sc->crq_queue[0]));
|
|
sc->cur_crq = 0;
|
|
sc->bus_initialized = 0;
|
|
sc->bus_logged_in = 0;
|
|
bus_dmamap_sync(sc->crq_tag, sc->crq_map, BUS_DMASYNC_PREWRITE);
|
|
error = phyp_hcall(H_REG_CRQ, sc->unit, sc->crq_phys,
|
|
sc->n_crqs*sizeof(sc->crq_queue[0]));
|
|
KASSERT(error == 0, ("CRQ registration success"));
|
|
|
|
error = phyp_hcall(H_SEND_CRQ, sc->unit,
|
|
be64toh(((uint64_t *)(&crq))[0]),
|
|
be64toh(((uint64_t *)(&crq))[1]));
|
|
if (error != 0)
|
|
panic("CRQ setup failure (%d)", error);
|
|
|
|
while (sc->bus_initialized == 0)
|
|
vscsi_check_response_queue(sc);
|
|
|
|
/* Send MAD adapter info */
|
|
mad_adapter_info.type = htobe32(MAD_ADAPTER_INFO_REQUEST);
|
|
mad_adapter_info.status = 0;
|
|
mad_adapter_info.length = htobe16(sizeof(mad_adapter_info.payload));
|
|
|
|
strcpy(mad_adapter_info.payload.srp_version, "16.a");
|
|
strcpy(mad_adapter_info.payload.partition_name, "UNKNOWN");
|
|
mad_adapter_info.payload.partition_number = -1;
|
|
mad_adapter_info.payload.mad_version = htobe32(1);
|
|
mad_adapter_info.payload.os_type = htobe32(2); /* Claim we are Linux */
|
|
mad_adapter_info.payload.port_max_txu[0] = 0;
|
|
/* If this fails, we get the defaults above */
|
|
OF_getprop(OF_finddevice("/"), "ibm,partition-name",
|
|
mad_adapter_info.payload.partition_name,
|
|
sizeof(mad_adapter_info.payload.partition_name));
|
|
OF_getprop(OF_finddevice("/"), "ibm,partition-no",
|
|
&mad_adapter_info.payload.partition_number,
|
|
sizeof(mad_adapter_info.payload.partition_number));
|
|
|
|
xp = TAILQ_FIRST(&sc->free_xferq);
|
|
xp->ccb = NULL;
|
|
TAILQ_REMOVE(&sc->free_xferq, xp, queue);
|
|
TAILQ_INSERT_TAIL(&sc->active_xferq, xp, queue);
|
|
xp->srp_iu_size = sizeof(mad_adapter_info);
|
|
crq.iu_length = htobe16(xp->srp_iu_size);
|
|
vmem_alloc(xp->sc->srp_iu_arena, xp->srp_iu_size,
|
|
M_BESTFIT | M_NOWAIT, &xp->srp_iu_offset);
|
|
mad_adapter_info.buffer = htobe64(xp->sc->srp_iu_phys + xp->srp_iu_offset + 24);
|
|
mad_adapter_info.tag = (uint64_t)xp;
|
|
memcpy((uint8_t *)xp->sc->srp_iu_queue + (uintptr_t)xp->srp_iu_offset,
|
|
&mad_adapter_info, sizeof(mad_adapter_info));
|
|
crq.valid = 0x80;
|
|
crq.format = 0x02;
|
|
crq.iu_data = htobe64(xp->sc->srp_iu_phys + xp->srp_iu_offset);
|
|
bus_dmamap_sync(sc->crq_tag, sc->crq_map, BUS_DMASYNC_PREWRITE);
|
|
phyp_hcall(H_SEND_CRQ, xp->sc->unit,
|
|
be64toh(((uint64_t *)(&crq))[0]),
|
|
be64toh(((uint64_t *)(&crq))[1]));
|
|
|
|
while (TAILQ_EMPTY(&sc->free_xferq))
|
|
vscsi_check_response_queue(sc);
|
|
|
|
/* Send SRP login */
|
|
vscsi_srp_login(sc);
|
|
while (sc->bus_logged_in == 0)
|
|
vscsi_check_response_queue(sc);
|
|
|
|
error = phyp_hcall(H_VIO_SIGNAL, sc->unit, 1); /* Enable interrupts */
|
|
}
|
|
|
|
static void
|
|
vscsi_intr(void *xsc)
|
|
{
|
|
struct vscsi_softc *sc = xsc;
|
|
|
|
mtx_lock(&sc->io_lock);
|
|
vscsi_check_response_queue(sc);
|
|
mtx_unlock(&sc->io_lock);
|
|
}
|
|
|
|
static void
|
|
vscsi_srp_response(struct vscsi_xfer *xp, struct vscsi_crq *crq)
|
|
{
|
|
union ccb *ccb = xp->ccb;
|
|
struct vscsi_softc *sc = xp->sc;
|
|
struct srp_rsp *rsp;
|
|
uint32_t sense_len;
|
|
|
|
/* SRP response packet in original request */
|
|
rsp = (struct srp_rsp *)((uint8_t *)sc->srp_iu_queue +
|
|
(uintptr_t)xp->srp_iu_offset);
|
|
ccb->csio.scsi_status = rsp->status;
|
|
if (ccb->csio.scsi_status == SCSI_STATUS_OK)
|
|
ccb->ccb_h.status = CAM_REQ_CMP;
|
|
else
|
|
ccb->ccb_h.status = CAM_SCSI_STATUS_ERROR;
|
|
#ifdef NOTYET
|
|
/* Collect fast fail codes */
|
|
if (crq->status != 0)
|
|
ccb->ccb_h.status = CAM_REQ_CMP_ERR;
|
|
#endif
|
|
|
|
if (ccb->ccb_h.status != CAM_REQ_CMP) {
|
|
ccb->ccb_h.status |= CAM_DEV_QFRZN;
|
|
xpt_freeze_devq(ccb->ccb_h.path, /*count*/ 1);
|
|
}
|
|
|
|
if (!(rsp->flags & SRP_RSPVALID))
|
|
rsp->response_data_len = 0;
|
|
if (!(rsp->flags & SRP_SNSVALID))
|
|
rsp->sense_data_len = 0;
|
|
if (!(rsp->flags & (SRP_DOOVER | SRP_DOUNDER)))
|
|
rsp->data_out_resid = 0;
|
|
if (!(rsp->flags & (SRP_DIOVER | SRP_DIUNDER)))
|
|
rsp->data_in_resid = 0;
|
|
|
|
if (rsp->flags & SRP_SNSVALID) {
|
|
bzero(&ccb->csio.sense_data, sizeof(struct scsi_sense_data));
|
|
ccb->ccb_h.status |= CAM_AUTOSNS_VALID;
|
|
sense_len = min(be32toh(rsp->sense_data_len),
|
|
ccb->csio.sense_len);
|
|
memcpy(&ccb->csio.sense_data,
|
|
&rsp->data_payload[be32toh(rsp->response_data_len)],
|
|
sense_len);
|
|
ccb->csio.sense_resid = ccb->csio.sense_len -
|
|
be32toh(rsp->sense_data_len);
|
|
}
|
|
|
|
switch (ccb->ccb_h.flags & CAM_DIR_MASK) {
|
|
case CAM_DIR_OUT:
|
|
ccb->csio.resid = rsp->data_out_resid;
|
|
break;
|
|
case CAM_DIR_IN:
|
|
ccb->csio.resid = rsp->data_in_resid;
|
|
break;
|
|
}
|
|
|
|
bus_dmamap_sync(sc->data_tag, xp->dmamap, BUS_DMASYNC_POSTREAD);
|
|
bus_dmamap_unload(sc->data_tag, xp->dmamap);
|
|
xpt_done(ccb);
|
|
xp->ccb = NULL;
|
|
}
|
|
|
|
static void
|
|
vscsi_login_response(struct vscsi_xfer *xp, struct vscsi_crq *crq)
|
|
{
|
|
struct vscsi_softc *sc = xp->sc;
|
|
struct srp_login_rsp *rsp;
|
|
|
|
/* SRP response packet in original request */
|
|
rsp = (struct srp_login_rsp *)((uint8_t *)sc->srp_iu_queue +
|
|
(uintptr_t)xp->srp_iu_offset);
|
|
KASSERT(be16toh(rsp->buffer_formats) & 0x3, ("Both direct and indirect "
|
|
"buffers supported"));
|
|
|
|
sc->max_transactions = be32toh(rsp->request_limit_delta);
|
|
device_printf(sc->dev, "Queue depth %d commands\n",
|
|
sc->max_transactions);
|
|
sc->bus_logged_in = 1;
|
|
}
|
|
|
|
static void
|
|
vscsi_cam_poll(struct cam_sim *sim)
|
|
{
|
|
struct vscsi_softc *sc = cam_sim_softc(sim);
|
|
|
|
vscsi_check_response_queue(sc);
|
|
}
|
|
|
|
static void
|
|
vscsi_check_response_queue(struct vscsi_softc *sc)
|
|
{
|
|
struct vscsi_crq *crq;
|
|
struct vscsi_xfer *xp;
|
|
int code;
|
|
|
|
mtx_assert(&sc->io_lock, MA_OWNED);
|
|
|
|
while (sc->crq_queue[sc->cur_crq].valid != 0) {
|
|
/* The hypercalls at both ends of this are not optimal */
|
|
phyp_hcall(H_VIO_SIGNAL, sc->unit, 0);
|
|
bus_dmamap_sync(sc->crq_tag, sc->crq_map, BUS_DMASYNC_POSTREAD);
|
|
|
|
crq = &sc->crq_queue[sc->cur_crq];
|
|
|
|
switch (crq->valid) {
|
|
case 0xc0:
|
|
if (crq->format == 0x02)
|
|
sc->bus_initialized = 1;
|
|
break;
|
|
case 0x80:
|
|
/* IU data is set to tag pointer (the XP) */
|
|
xp = (struct vscsi_xfer *)crq->iu_data;
|
|
|
|
switch (crq->format) {
|
|
case 0x01:
|
|
code = *((uint8_t *)sc->srp_iu_queue +
|
|
(uintptr_t)xp->srp_iu_offset);
|
|
switch (code) {
|
|
case SRP_RSP:
|
|
vscsi_srp_response(xp, crq);
|
|
break;
|
|
case SRP_LOGIN_RSP:
|
|
vscsi_login_response(xp, crq);
|
|
break;
|
|
default:
|
|
device_printf(sc->dev, "Unknown SRP "
|
|
"response code %d\n", code);
|
|
break;
|
|
}
|
|
break;
|
|
case 0x02:
|
|
/* Ignore management datagrams */
|
|
break;
|
|
default:
|
|
panic("Unknown CRQ format %d\n", crq->format);
|
|
break;
|
|
}
|
|
vmem_free(sc->srp_iu_arena, xp->srp_iu_offset,
|
|
xp->srp_iu_size);
|
|
TAILQ_REMOVE(&sc->active_xferq, xp, queue);
|
|
TAILQ_INSERT_TAIL(&sc->free_xferq, xp, queue);
|
|
break;
|
|
default:
|
|
device_printf(sc->dev,
|
|
"Unknown CRQ message type %d\n", crq->valid);
|
|
break;
|
|
}
|
|
|
|
crq->valid = 0;
|
|
sc->cur_crq = (sc->cur_crq + 1) % sc->n_crqs;
|
|
|
|
bus_dmamap_sync(sc->crq_tag, sc->crq_map, BUS_DMASYNC_PREWRITE);
|
|
phyp_hcall(H_VIO_SIGNAL, sc->unit, 1);
|
|
}
|
|
}
|