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344 lines
10 KiB
Python
344 lines
10 KiB
Python
#!/usr/bin/env python
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#
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# Copyright (c) 2014 Marcel Moolenaar
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions
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# are met:
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#
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# 1. Redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer.
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# 2. Redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in the
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# documentation and/or other materials provided with the distribution.
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#
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# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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#
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'''
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Simple diagnostics program fo the AMD Am89c900 series ILACC.
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This ethernet controller is emulated by VMware Fusion among
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possibly other virtualization platforms.
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The datasheet can be found here:
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http://support.amd.com/TechDocs/18219.pdf
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This example program sends a single DHCP discovery packet,
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waits 2 seconds and then iterates over the receive ring for
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a targeted packet.
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For this program to function, connect the network interface
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to a network with a DHCP server. In VMware Fusion this can
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best be done by configuring the interface as a NAT interface
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using the "Share with my Mac" setting.
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'''
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import ctypes
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import logging
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import os
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import sys
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import time
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sys.path.append('/usr/lib')
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import bus
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from bus import dma as busdma
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# ILACC initialization block definition
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class initblock(ctypes.LittleEndianStructure):
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_fields_ = [('mode', ctypes.c_uint32),
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('hwaddr', ctypes.c_uint8 * 6),
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('_pad1_', ctypes.c_uint16),
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('filter', ctypes.c_uint16 * 4),
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('rxdesc', ctypes.c_uint32),
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('txdesc', ctypes.c_uint32),
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('_pad2_', ctypes.c_uint32)]
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# ILACC ring buffer descriptor
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class bufdesc(ctypes.LittleEndianStructure):
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_fields_ = [('buffer', ctypes.c_uint32),
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('flags', ctypes.c_uint32),
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('length', ctypes.c_uint32),
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('_pad_', ctypes.c_uint32)]
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# The DHCP packet definition (incl. all headers)
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class packet(ctypes.BigEndianStructure):
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_pack_ = 1
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_fields_ = [('eth_dest', ctypes.c_uint8 * 6),
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('eth_src', ctypes.c_uint8 * 6),
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('eth_type', ctypes.c_uint16),
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('ip_vl', ctypes.c_uint8),
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('ip_de', ctypes.c_uint8),
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('ip_len', ctypes.c_uint16),
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('ip_id', ctypes.c_uint16),
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('ip_ff', ctypes.c_uint16),
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('ip_ttl', ctypes.c_uint8),
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('ip_proto', ctypes.c_uint8),
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('ip_cksum', ctypes.c_uint16),
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('ip_src', ctypes.c_uint32),
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('ip_dest', ctypes.c_uint32),
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('udp_src', ctypes.c_uint16),
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('udp_dest', ctypes.c_uint16),
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('udp_len', ctypes.c_uint16),
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('udp_cksum', ctypes.c_uint16),
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('bootp_op', ctypes.c_uint8),
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('bootp_htype', ctypes.c_uint8),
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('bootp_hlen', ctypes.c_uint8),
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('bootp_hops', ctypes.c_uint8),
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('bootp_xid', ctypes.c_uint32),
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('bootp_secs', ctypes.c_uint16),
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('bootp_flags', ctypes.c_uint16),
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('bootp_ciaddr', ctypes.c_uint32),
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('bootp_yiaddr', ctypes.c_uint32),
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('bootp_siaddr', ctypes.c_uint32),
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('bootp_giaddr', ctypes.c_uint32),
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('bootp_chaddr', ctypes.c_uint8 * 16),
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('bootp_sname', ctypes.c_uint8 * 64),
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('bootp_file', ctypes.c_uint8 * 128),
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('dhcp_magic', ctypes.c_uint32),
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('dhcp_options', ctypes.c_uint8 * 60)]
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MACFMT = '%02x:%02x:%02x:%02x:%02x:%02x'
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dev = 'pci0:2:1:0'
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logging.basicConfig(level=logging.DEBUG)
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pcicfg = bus.map(dev, 'pcicfg')
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logging.debug('pcicfg=%s (%s)' % (pcicfg, dev))
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vendor = bus.read_2(pcicfg, 0)
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device = bus.read_2(pcicfg, 2)
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if vendor != 0x1022 or device != 0x2000:
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logging.error('Not an AMD PCnet-PCI (vendor=%x, device=%x)' %
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(vendor, device))
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sys.exit(1)
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command = bus.read_2(pcicfg, 4)
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if not (command & 1):
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logging.info('enabling I/O port decoding')
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command |= 1
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bus.write_2(pcicfg, 4, command)
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if not (command & 4):
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logging.info('enabling bus mastering')
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command |= 4
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bus.write_2(pcicfg, 4, command)
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bus.unmap(pcicfg)
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io = bus.map(dev, '10.io')
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logging.debug('io=%s (%s)' % (io, dev))
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def delay(msec):
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time.sleep(msec / 1000.0)
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def ffs(x):
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y = (1 + (x ^ (x-1))) >> 1
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return y.bit_length()
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def ip_str(a):
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return '%d.%d.%d.%d' % ((a >> 24) & 255, (a >> 16) & 255, (a >> 8) & 255,
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a & 255)
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def mac_is(l, r):
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for i in range(6):
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if l[i] != r[i]:
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return False
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return True
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def mac_str(m):
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return MACFMT % (m[0], m[1], m[2], m[3], m[4], m[5])
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def rdbcr(reg):
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bus.write_2(io, 0x12, reg & 0xffff)
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return bus.read_2(io, 0x16)
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def wrbcr(reg, val):
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bus.write_2(io, 0x12, reg & 0xffff)
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bus.write_2(io, 0x16, val & 0xffff)
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def rdcsr(reg):
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bus.write_2(io, 0x12, reg & 0xffff)
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return bus.read_2(io, 0x10)
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def wrcsr(reg, val):
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bus.write_2(io, 0x12, reg & 0xffff)
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bus.write_2(io, 0x10, val & 0xffff)
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def start():
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wrcsr(0, 0x42)
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delay(100)
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def stop():
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wrcsr(0, 4)
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delay(100)
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mac = ()
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bcast = ()
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for o in range(6):
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mac += (bus.read_1(io, o),)
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bcast += (0xff,)
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logging.info('ethernet address = ' + MACFMT % mac)
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stop()
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wrbcr(20, 2) # reset
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wrcsr(3, 0) # byte swapping mode
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wrbcr(2, rdbcr(2) | 2) # Autoneg
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memsize = 32*1024
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bufsize = 1536
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nrxbufs = 16
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ntxbufs = 4
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logging.debug("DMA memory: size = %#x (TX buffers: %u, RX buffers: %u)" %
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(memsize, ntxbufs, nrxbufs))
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mem_tag = busdma.tag_create(dev, 16, 0, 0xffffffff, memsize, 1, memsize, 0, 0)
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dmamem = busdma.mem_alloc(mem_tag, 0)
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busseg = busdma.md_first_seg(dmamem, busdma.MD_BUS_SPACE)
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cpuseg = busdma.md_first_seg(dmamem, busdma.MD_VIRT_SPACE)
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busaddr = busdma.seg_get_addr(busseg)
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cpuaddr = busdma.seg_get_addr(cpuseg)
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logging.debug("DMA memory: CPU address: %#x, device address: %#x" %
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(cpuaddr, busaddr))
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addr_initblock = cpuaddr
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addr_rxdesc = addr_initblock + ctypes.sizeof(initblock)
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addr_txdesc = addr_rxdesc + ctypes.sizeof(bufdesc) * nrxbufs
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addr_rxbufs = addr_txdesc + ctypes.sizeof(bufdesc) * ntxbufs
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addr_txbufs = addr_rxbufs + bufsize * nrxbufs
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ib = initblock.from_address(addr_initblock)
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ib.mode = ((ffs(ntxbufs) - 1) << 28) | ((ffs(nrxbufs) - 1) << 20)
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for i in range(len(mac)):
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ib.hwaddr[i] = mac[i]
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for i in range(4):
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ib.filter[i] = 0xffff
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ib.rxdesc = busaddr + (addr_rxdesc - cpuaddr)
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ib.txdesc = busaddr + (addr_txdesc - cpuaddr)
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ib._pad1_ = 0
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ib._pad2_ = 0
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for i in range(nrxbufs):
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bd = bufdesc.from_address(addr_rxdesc + ctypes.sizeof(bufdesc) * i)
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bd.buffer = busaddr + (addr_rxbufs - cpuaddr) + bufsize * i
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bd.flags = (1 << 31) | (15 << 12) | (-bufsize & 0xfff)
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bd.length = 0
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bd._pad_ = 0
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for i in range(ntxbufs):
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bd = bufdesc.from_address(addr_txdesc + ctypes.sizeof(bufdesc) * i)
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bd.buffer = busaddr + (addr_txbufs - cpuaddr) + bufsize * i
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bd.flags = (15 << 12)
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bd.length = 0
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bd._pad_ = 0
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busdma.sync_range(dmamem, busdma.SYNC_PREWRITE, 0, addr_rxbufs - cpuaddr)
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# Program address of DMA memory
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wrcsr(1, busaddr)
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wrcsr(2, busaddr >> 16)
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delay(100)
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# Initialize hardware
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wrcsr(0, 1)
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logging.debug('Waiting for initialization to complete')
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csr = rdcsr(0)
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while (csr & 0x100) == 0:
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logging.debug('CSR=%#x' % (csr))
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csr = rdcsr(0)
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start()
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pkt = packet.from_address(addr_txbufs)
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ctypes.memset(addr_txbufs, 0, ctypes.sizeof(pkt))
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options = [53, 1, 1]
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for i in range(len(options)):
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pkt.dhcp_options[i] = options[i]
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pkt.dhcp_magic = 0x63825363
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for i in range(6):
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pkt.bootp_chaddr[i] = mac[i]
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pkt.bootp_hlen = 6
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pkt.bootp_htype = 1
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pkt.bootp_op = 1
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pkt.udp_len = ctypes.sizeof(pkt) - 34
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pkt.udp_dest = 67
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pkt.udp_src = 68
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pkt.ip_dest = 0xffffffff
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pkt.ip_cksum = 0x79a6
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pkt.ip_proto = 17
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pkt.ip_ttl = 64
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pkt.ip_len = ctypes.sizeof(pkt) - 14
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pkt.ip_vl = 0x45
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pkt.eth_type = 0x0800
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for i in range(6):
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pkt.eth_src[i] = mac[i]
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pkt.eth_dest[i] = bcast[i]
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pktlen = ctypes.sizeof(pkt)
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busdma.sync_range(dmamem, busdma.SYNC_PREWRITE, addr_txbufs - cpuaddr, bufsize)
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bd = bufdesc.from_address(addr_txdesc)
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bd.length = 0
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bd.flags = (1 << 31) | (1 << 25) | (1 << 24) | (0xf << 12) | (-pktlen & 0xfff)
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busdma.sync_range(dmamem, busdma.SYNC_PREWRITE, addr_txdesc - cpuaddr,
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ctypes.sizeof(bufdesc))
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wrcsr(0, 0x48)
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logging.info('DHCP discovery packet sent')
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# Now wait 2 seconds for a DHCP offer to be received.
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logging.debug('Waiting 2 seconds for an offer to be received')
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time.sleep(2)
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stop()
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busdma.sync_range(dmamem, busdma.SYNC_PREWRITE, addr_rxdesc - cpuaddr,
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ctypes.sizeof(bufdesc) * nrxbufs)
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for i in range(nrxbufs):
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bd = bufdesc.from_address(addr_rxdesc + ctypes.sizeof(bufdesc) * i)
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if (bd.flags & 0x80000000):
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continue
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pkt = packet.from_address(addr_rxbufs + i * bufsize)
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if mac_is(pkt.eth_dest, bcast):
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logging.debug('RX #%d: broadcast packet: length %u' % (i, bd.length))
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continue
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if not mac_is(pkt.eth_dest, mac):
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logging.debug('RX #%d: packet for %s?' % (i, mac_str(pkt.eth_dest)))
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continue
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logging.debug('RX %d: packet from %s!' % (i, mac_str(pkt.eth_src)))
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logging.info('Our IP address = %s' % (ip_str(pkt.ip_dest)))
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busdma.mem_free(dmamem)
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busdma.tag_destroy(mem_tag)
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bus.unmap(io)
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